Page 1
High performance CMOS quad operational amplifier
Inverting Input 2
Non-inverting Input 2
Non-inverting Input 1
CC
V
-
CC
V
1
2
3
4
8
5
6
7
9
10
11
12
13
14
+
Output 3
Output 4
Non-inverting Input 4
Inverting Input 4
Non-inverting Input 3
Inverting Input 3
-
+
+
-
+
-
+
Output 1
Inverting Input 1
Output 2
Features
■ Output voltage can swing to ground
■ Excellent phase margin on capacitive loads
■ Gain bandwidth product: 3.5 MHz
■ Unity gain stable
■ Two input offset voltage selections
TS274
DIP14
(Plastic package)
Description
The TS274 devices are low cost, quad
operational amplifiers designed to operate with
single or dual supplies. These operational
amplifiers use the ST silicon gate CMOS process
giving an excellent consumption-speed ratio.
These series are ideally suited for low
consumption applications.
Three power consumptions are availabl e thus
offering the best consumption-sp eed ratio f or you r
application:
■ I
= 10 µA/amp: TS27L4 (very low power)
CC
■ I
= 150 µA/amp: TS27M4 (low power)
CC
■ I
= 1 mA/amp: TS274 (standard)
CC
These CMOS amplifiers offer very high input
impedance and extremely lo w input curren ts . Th e
major advantage v er sus JFET devices is the very
low input currents drift with temperature (see
Figure 5 on page 6).
For enhanced features of TS274, in particular railto-rail capability and low offset voltage, two new
SO-14
(Plastic micropackage)
TSSOP14
(Thin shrink small outline package)
Pin connections (top view)
families, TSV91x and TSV99x will better suit low
voltage applications.
Table 1. Enhanced related families
Part
number
TSV914 2.5 - 5.5 I/O 1.5/4.5 10 80 1.1 8 4.5
TSV994 2.5 - 5.5 I/O 1.5/4.5 10 80 1.1
February 2008 Rev 3 1/14
V
CC
range (V)
Rail-to-
rail I/O
V
max
io
(mV)
Iib max
(pA)
A
vd
(dB)
min
ICC max
(mA)
GBP typ
(MHz)
20
(G ≥3)
SR typ
(V/µs)
10
Packages
SO-14,
TSSOP14
SO-14,
TSSOP14
www.st.com
14
Page 2
Absolute maximum ratings and operating conditions TS274
1 Absolute maximum ratings and operating conditions
Table 2. Absolute maximum ratings (AMR)
Symbol Parameter TS274C/AC TS274I/AI Unit
+
V
T
CC
V
V
I
I
oper
T
Supply voltage
Differential input voltage
id
Input voltage
in
Output current for V
o
Input current ±5 mA
in
Operating free-air temperature range 0 to +70 -40 to +125 °C
Storage temperature range -65 to +150 °C
stg
Thermal resistance junction to ambient
R
thja
SO-14
TSSOP14
DIP14
Thermal resistance junction to case
R
thjc
SO-14
TSSOP14
DIP14
HBM: human body model
ESD
MM: machine model
CDM: charged device model
1. All values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive
supply voltage.
4. Short-circuits can cause excessive heating and destructive dissipation. Values are typical.
5. Human body model: A 100pF capacitor is charged to the specified voltage, then discharged through a
1.5kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
6. Machine model: A 200pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5Ω). This is done for all couples of
connected pin combinations while the other pins are floating.
7. Charged device model: all pins and the package are charged together to the specified voltage and then
discharged directly to the ground through only one pin. This is done for all pins.
Table 3. Operating conditions
(3)
(1)
18 V
(2)
±18 V
-0.3 to 18 V
+
≥ 15V ±30 mA
CC
(4)
103
100
80
31
32
33
(5)
(6)
(7)
500 V
100 V
800 V
°C/W
°C/W
Symbol Parameter Value Unit
+
V
CC
V
icm
Supply voltage 3 to 16 V
Common mode input voltage range 0 to V
Operating free-air temperature range
T
oper
TS274C
TS274I
2/14
+
- 1.5 V
CC
0 to 70
-40 to 125
°C
Page 3
TS274 Block diagram and circuit schematics
2 Block diagram and circuit schematics
Figure 1. Block diagram
V
CC
Current
source
x I
differential
E
Input
Second
stage
E
Output
stage
Output
V
CC
3/14
Page 4
Block diagram and circuit schematics TS274
Figure 2. Schematic diagram (for 1/4 TS274)
15
T
12
T
10
T
11
T
8
T
6
T
Output
T
16
T
14
T
13
T
9
T
7
R1
C1
Input
2
T
5
CC
V
T
1
T
4
T
3
T
27
T
26
T
25
T
24
T
28
T
2
R
4/14
Input
23
T
18
T
17
T
19
T
29
T
22
T
21
T
20
T
CC
V
Page 5
TS274 Electrical characteristics
3 Electrical characteristics
Table 4. V
+
= +10V, V
CC
Symbol Parameter Conditions
Input offset voltage
V
io
Input offset voltage drift 2 2 µV/°C
DV
io
I
Input offset current
io
I
Input bias current
ib
V
High level output voltage
OH
Low level output voltage Vid = -100mV 50 50 mV
V
OL
A
Large signal voltage gain
vd
GBP Gain bandwidth product
CMR
SVR
Common mode rejection
ratio
Supply voltage rejection
ratio
(1)
(1)
-
CC
= 0V, T
V
= +25°C (unless otherwise specified)
amb
= 1.4V, Vic = 0V
o
TS274C/I
TS274AC/AI
≤ T
T
min
amb
TS274C/I
TS274AC/AI
Vic = 5V, Vo = 5V
T
≤ T
min
amb
Vic = 5V, Vo = 5V
T
≤ T
min
amb
V
= 100mV, RL = 10kΩ
id
T
≤ T
min
amb
V
= 5V, RL = 10kΩ,
iC
Vo = 1V to 6V
T
≤ T
min
amb
A
= 40dB, RL = 10kΩ,
v
CL = 100pF, fin = 100kHz
= 1V to 7.4V, Vo = 1.4V 65 80 65 80 dB
V
ic
+
V
= 5V to 10V, Vo = 1.4V 60 70 60 70 dB
CC
≤ T
≤ T
≤ T
≤ T
≤ T
max
max
max
max
max
TS274C/AC TS274I/AI
Min Typ Max Min Typ Max
1.1
0.9105
12
6.5
1
100
1
150
8.2
8.4 8.288.4
1.1
0.9105
12
6.5
1
200
1
300
8.1
10715 10615
3.5 3.5 MHz
Unit
mV
mV
pA
pA
V
V/mV
Supply current (per
I
CC
amplifier)
Output short circuit current Vo = 0V, Vid = 100mV 60 60 mA
I
o
I
Output sink current Vo = VCC, Vid = -100mV 45 45 mA
sink
SR Slew r ate at unity gain
φm Phase margin at unity gain
Overshoot factor 30 30 %
K
OV
Equivalent input noise
e
n
voltage
Av = 1, no load, Vo = 5V
T
≤ T
amb
≤ T
max
min
= 10kΩ, CL = 100pF,
R
L
= 3 to 7V
V
in
A
= 40dB, RL = 10kΩ,
v
CL = 100pF
f = 1kHz, R
= 100Ω 30 30 nV/√Hz
s
1000 1500
1600
1000 1500
1700
5.5 5.5 V/µs
40 40 Degrees
Vo1/Vo2Channel separation 120 120 dB
1. Maximum values including unavoidable inaccuracies of the industrial test.
5/14
µA
Page 6
Electrical characteristics TS274
5
4
3
2
1
0
-10 -8 -6 -4 -2 0
amb
id
T = 25˚C
V = 100mV
V = 5V
CC
OH
OUTPUT CURRENT, I (mA)
OUTPUT VO LTAG E, V (V)
OH
CC
V = 3V
Figure 3. Supply current (each amplifier) vs.
supply voltage
2.0
µ
1.5
CC
1.0
T = 25°C
amb
A = 1
V
V = V / 2
O CC
0.5
SUPPLY CURRENT, I ( A)
0 4 8 12 16
SUPPLY VOLTAGE, V (V)
CC
Figure 5. Input bias current vs. free-air
temperature
100
V = 10V
IB
CC
V = 5V
ic
Figure 4. High level output voltage vs. high
level output current
20
T = 25˚C
amb
V = 100mV
OH
16
id
V = 16V
CC
12
8
V = 10V
CC
4
OUTPUT VOLTAGE, V (V)
0
-50 -40 -30 -20 -10 0
OUTPUT CURRENT, I (mA)
OH
Figure 6. Low level output voltage vs. low
level output current
1.0
V = 3V
OL
0.8
CC
10
INPUT BIAS CURRENT, I (pA )
1
25 50 75 100 125
TEMPERATURE, T (˚C)
amb
Figure 7. High level output voltage vs. high
level output current
0.6
V = 5V
CC
0.4
T = 25°C
0.2
OUTPUT VOLTAGE, V (V)
amb
V = 0.5V
ic
V = -100mV
id
0 1 2 3
OUTPUT CURRENT, I (mA)
OL
Figure 8. Low level output voltage vs. low
level output current
3
V = 10V
CC
OL
V = 16V
2
CC
1
T = 25°C
amb
V = 0.5V
i
V = -100mV
OUTPUT VOLTAGE, V (V)
id
0 4 8 12 16 20
OUTPUT CURRENT, I (mA)
OL
6/14
Page 7
TS274 Electrical characteristics
Figure 9. Open loop frequency response and
phase shift
50
40
GAIN
30
20
10
GAIN (dB)
0
-10
10
PHASE
T = 25°C
amb
+
V=10V
CC
R = 10k
C = 100pF
A=100
23
L
L
VCL
10
Ω
10
Phase
Margin
Gain
Bandwidth
Product
4
10
5
10
0
45
90
135
180
7
6
10
FREQUENCY, f (Hz)
Figure 11. Gain bandwidth product vs. supply
voltage
5
4
3
Figure 10. Phase margin vs. capacitive load
70
T
= 25°C
amb
L
V
CC
Ω
=1
60
(Degrees)
m
φ
R = 10k
A
V=10V
50
PHAS E (Degrees)
40
30
PHASE MARGIN,
200
6040
CAPACITANCE, C
L
80
(pF )
Figure 12. Slew rate vs. supply voltage
7
T
= 25°C
6
5
amb
R = 10k
C = 100pF
Ω
L
L
SR
s)
μ
100
2
1
0
GAIN BANDW. PROD., GBP (MHz)
4 8 12 16
SUPPLY VOLTAGE, V
T
= 25°C
amb
L
L
V
=1
CC
Ω
(V)
R = 10k
C = 100pF
A
4
3
SLEW RATES, SR (V/
2
4 6 8 10 12 14 16
SUPPLY VO LTAGE, V (V)
SR
CC
Figure 13. Phase margin vs. supply voltage Figure 14. Input voltage noise vs. frequency
48
44
40
φ
36
T
= 25°C
amb
L
L
V
Ω
=1
R = 10k
32
C = 100pF
A
28
PHASE MARGIN, m (Degrees)
04 8
SUPPLY VO LTAGE, V (V)
12
16
CC
300
V
= 10V
CC
= 25°C
T
amb
R
=100
200
S
Ω
100
VOLTAGE (nV/VHz)
EQUIVALENT INPUT NOISE
0
110
100
1000
FREQUENCY (Hz)
7/14
Page 8
Macromodel TS274
4 Macromodel
4.1 Important note concerning this macromodel
Please consider the following remarks before using this macromodel.
● All models are a trade-off between accuracy and complexity (i.e. simulation time).
● Macromodels are not a substitute to breadboarding; rather, they confirm the validity of
a design approach and help to select surrounding component values.
● A macromodel emulates the nominal p erf ormance of a typical de vice within specified
operating conditions (temperature, supply voltage, for e xample). Thus the
macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the
main parameters of the product.
Data derived from macromodels used outside of the specified conditions (V
for example) or even worse, outside of the device operating conditions (V
example), is not reliable in any way.
4.2 Macromodel code
********************************
.SUBCKT TS27X 1 2 3 4 5
*** INP- = 1, INP+ =2, OUT = 3 VDD=4 VSS = 5
*** TYPE = TS271/TS272/TS274
.MODEL MDTH D IS=1E-8 KF=2.664E-16 CJO=10F
***INPUT STAGE
CIP 2 5 1E-12
CIN 1 5 1E-12
EIP 10 5 2 5 1
EIN 16 5 1 5 1
RIP 10 11 8
RIN 15 16 8
RIS 11 15 223.84
CPS 11 15 1E-9
DIP 11 120 MDTH 400E-12
DIN 15 140 MDTH 400E-12
RDEG1 12 120 4400
RDEG2 14 140 4400
VOFP 12 13 DC 0
VOFN 13 14 DC 0
IPOL 13 5 38E-6
***ICC
DICC1 4 31 MDTH 400E-12
DICC2 31 32 MDTH 400E-12
DICC3 32 33 MDTH 400E-12
DICC4 33 34 MDTH 400E-12
RICC 34 5 20E3
ICC 4 5 600E-6
***COMMON MODE INPUT LIMITATION
DINN 17 13 MDTH 400E-12
VIN 17 5 DC -0.1
, temperature,
CC
, V
icm
, for
CC
8/14
Page 9
TS274 Macromodel
DINR 15 18 MDTH 400E-12
VIP 4 18 DC 2.2
***GM1 STAGE
FGM1P 119 5 VOFP 1
FGM1N 119 5 VOFN 1
RAP 119 4 1E6
RAN 119 5 1E6
***GM2 STAGE
G2P 19 5 119 5 4E-4
G2N 19 5 119 4 4E-4
R2P 19 4 450E3
R2N 19 5 450E3
***COMPENSATION
CC 19 119 7p
***BUFFER
EBUF 20 5 19 5 1
***SHORT-CIRCUIT LIMITATIONS( ISINK, ISOURCE)
DOPM 19 22 MDTH 400E-12
DONM 21 19 MDTH 400E-12
HOPM 22 28 VOUT 910
VIPM 28 4 DC 50
HONM 21 27 VOUT 1222
VINM 5 27 DC 50
VOUT 3 23 DC 0
***VOH, VOL DEFINITIONS
DOP 19 25 MDTH 400E-12
VOP 4 25 2.5
DON 24 19 MDTH 400E-12
VON 24 5 0.92
***OUTPUT RESISTOR
ROUT 23 20 10
.ENDS
9/14
Page 10
Package information TS274
5 Package information
In order to meet environmental requ irements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related t o soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
5.1 DIP14 package information
Figure 15. DIP14 package mechanical drawing
Table 5. DIP14 package mechanical data
Millimeters Inches
Ref.
Min. Typ. Max. Min. Typ. Max.
a1 0.51 0.020
B 1.39 1.65 0.055 0.065
b0.5 0.020
b1 0.25 0.010
D200.787
E8.5 0.335
e 2.54 0.100
e3 15.24 0.600
F 7.1 0.280
I 5.1 0.201
L3.3 0.130
Z 1.27 2.54 0.050 0.100
10/14
Page 11
TS274 Package information
5.2 SO-14 package information
Figure 16. SO-14 package mechanical drawing
Table 6. SO-14 package mechanical data
Dimensions
Ref.
Min. Typ. Max. Min. Typ. Max.
A1.750.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C0.5 0.019
c1 45° (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
Millimeters Inches
L 0.5 1.27 0.019 0.050
M0.680.026
S 8° (max.)
11/14
Page 12
Package information TS274
5.3 TSSOP14 package information
Figure 17. TSSOP14 package mechanical drawing
A2
A
A1
b
e
D
c
E1
K
L
E
PIN 1 IDENTIFICATION
1
Figure 18. TSSOP14 package mechanical data
Dimensions
Ref.
Min. Typ. Max. Min. Typ. Max.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 4.9 5 5.1 0.193 0.197 0.201
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0°8°0°8°
L1 0.45 0.60 0.75 0.018 0.024 0.030
Millimeters Inches
12/14
Page 13
TS274 Ordering information
6 Ordering information
Table 7. Order codes
Order code
TS274CD
TS274CDT
TS274ACD
TS274ACDT
TS274CN
TS274ACN
TS274CPT
TS274ACPT
TS274ID
TS274IDT
TS274AID
TS274AIDT
TS274IN
TS274AIN
TS274IPT
TS274AIPT
Temperature
range
0°C, +70°C
-40°C, +125°C
Package Packing Marking
SO-14
DIP14 Tube
TSSOP14 Tape & reel
SO-14
DIP14 Tube
TSSOP14 Tape & reel
Tube or
Tape & reel
Tube or
Tape & reel
274C
274AC
TS274CN
TS274ACN
274C
274AC
274I
274AI
TS274IN
TS274AIN
274I
274AI
7 Revision history
Table 8. Document revision history
Date Revision Changes
19-Nov-2001 1 Initial release.
07-Apr-2006 2
01-Feb-2008 3
ESD protection inserted in Table 2. on page 2.
Thermal resistance junction to case information added see Table 2.
on page 2.
Macromodel insertion in Section 4 on page 8.
Added information on enhanced related families of devices on cover
page.
Removed TS274B version in AMR table and in order codes table.
13/14
Page 14
TS274
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