1
2
3
45
6
7
8
CC
+
-
-
+
-
+
CC
1 - Output 1
2 - Inverting Input 1
3 - Non-inverting Input 1
4 - V
5 - Non-inverting Input 2
6 - Inverting Input 2
7 - Output 2
8 - V
TS272C,I,M
HIGH PERFORMANCE
CMOS DUAL OPERATIONAL AMPLIFIERS
■ OUTPUT VOLTAGE CAN SWING TO
GROUND
■ EXCELLENT PHASE MARGIN ON
CAPACITIVE LOADS
■ GAIN BANDWIDTH PRODUCT: 3.5MHz
■ STABLE AN D LOW OFFSET VOLTAGE
■ THREE INPUT OFFSET VOLTAGE
SELECTIONS
DESCRIPTION
The TS272 devices are low cost, dual operational
amplifiers designed to o perate with single or dua l
supplies. These operat iona l amplifiers us e the ST
silicon gate CMOS process allowing an excellent
consumption-speed ratio. These series are ideally
suited for low consumption applications.
Three power consumpt ions are av ailable a llowing
to have always the best consumption-speed ratio:
❑ I
= 10µA/amp.: TS27L2 (very low power)
CC
❑ I
= 150µA/amp.: TS27M2 (low power)
CC
❑ I
= 1mA/amp.: TS272 (standard)
CC
These CMOS amplifiers offer very high input impedance and extremely low input currents. The
major advantage versus JFET devices is the very
low input currents drift with temperature (see figure 2 ).
N
DIP8
(Plastic Package )
D
SO8
(Plastic Micropackage )
P
TSSOP8
(Thin Shrink Small Outline Package)
PIN CONNECTIONS (top view)
ORDER CODE
Part Number Temperature Range
TS272C/AC/BC 0°C, +70°C
TS272I/AI/BI -40°C, +125°C
TS272M/AM/BM -55°C, +125°C
Example : TS272ACN
N = Dual in Line Package (DIP)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
P = Thin Shrink Small Outline Package (TSSOP) - only available
in Tape & Reel (PT)
November 2001
Package
NDP
•••
•••
•••
1/9
TS272C,I,M
E
E
Input
differential
Second
stage
Output
stage
Output
CC
V
CC
V
Current
source
x I
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter TS272C/AC/BC TS272I/AI/BI TS272M/AM/BM Unit
+
V
T
T
1. All values, except differential voltage are with respect to network ground terminal.
2. Dif ferential vo l ta ges are the non-i nverting inpu t terminal with respect to the inv erting input terminal.
3. The magnitude of the in put and the output voltages mu st never exceed t he m agnitude of the positive supply voltage.
Supply Voltage
CC
V
id Differential Input Voltage
V
Input Voltage
i
I
Output Current for V
o
I
Input Current ±5 mA
in
Operating Free-Air Temperature Range 0 to +70 -40 to +125 -55 to +125 °C
oper
Storage Temperature Range -65 to +150 °C
stg
1)
2)
3)
+
≥ 15V
CC
18 V
±18 V
-0.3 to 18 V
±30 mA
OPERATING CONDITIONS
Symbol Parameter Value Unit
+
V
V
Supply Voltage 3 to 16 V
CC
Common Mode Input Voltage Range
icm
0 to V
CC
+
- 1.5
V
2/9
SCHEMATIC DIAGRAM (for 1/2 TS272)
TS272C,I,M
15
T
12
T
10
T
11
T
8
T
6
T
Output
7
T
16
T
14
T
13
T
9
T
R1
C1
Input
2
T
5
CC
V
T
1
T
4
T
3
T
27
T
26
T
25
T
24
T
Input
28
T
23
T
2
R
T
17 18
T
19
T
29
T
22
T
21
T
20
T
CC
V
3/9
TS272C,I,M
ELECTRICAL CHARACTERISTICS
+
V
= +10V, V
CC
Symbol Parameter
Input Offset Vo ltage
V
io
DV
Input Offset Voltage Drift 2 2 µV/°C
io
Input Offset Current note
I
io
Input Bias Current - see note 1
I
ib
High Level Output Voltage
V
OH
V
Low Level Output Voltage
OL
Large Signal Voltage Gain
A
vd
GBP
CMR
SVR
I
K
V
o1/Vo2
1. Maximum values including unav oidable inaccuracies of the industrial test.
Gain Bandwidth Product
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio
I
CC
Output Short Circuit Current
I
o
Output Sink Current
sink
Slew Rate at Unity Gain
SR
Phase Margin at Unity Gain
m
φ
Overshoot Factor 30 30 %
OV
Equivalent Input Noise Voltage
e
n
Channel Separation 120 120 dB
-
= 0V, T
CC
= 1.4V, Vic = 0V TS272C/I/M
V
O
= +25°C (unless otherwise specified)
amb
TS272AC/AI/AM
TS272B/C/I/M
T
≤ T
min
amb
≤ T
max
TS272C/I/M
TS272AC/AI/AM
TS272B/C/I/M
1)
Vic = 5V, VO = 5V
T
≤ T
amb
≤ T
max
min
Vic = 5V, VO = 5V
T
≤ T
min
= 100mV, RL = 10k
V
id
T
min
= -100mV
V
id
V
= 5V, RL = 10k
iC
T
min
= 40dB, RL = 10k
A
v
= 1V to 7.4V, Vo = 1.4V
V
iC
V
CC
≤ T
≤ T
≤ T
amb
amb
amb
≤ T
≤ T
max
max
Vo = 1V to 6V
Ω,
max
Ω,
+
= 5V to 10V, Vo = 1.4V
Ω
CL = 100pF, fin = 100kHz
Supply Current (per amplifier)
= 1, no load, Vo = 5V
A
v
T
≤ T
amb
≤ T
= 100
s
max
Ω
min
= 0V, Vid = 100mV
V
o
= VCC, Vid = -100mV
V
o
R
= 10kΩ, CL = 100pF, Vi = 3 to 7V
L
= 40dB, RL = 10kΩ, CL = 100pF
A
v
f = 1kHz, R
TS272C/AC/BC
TS272I/AI/BI
TS272M/AM/BM
Unit
Min. Typ. Max. Min. Typ. Max.
1.1
10
0.9
0.25
12
5
2
0.25
6.5
3
1
100
1
150
8.2
8.4 8.288.4 V
1.1
0.9
1
1
10
5
2
12
6.5
3
200
300
mV
pA
pA
8.1
50 50
mV
10715 10615 V/mV
3.5 3.5
65 80 65 80
60 70 60 70
1000 1500
1000 1500
1600
60 60
45 45
5.5 5.5
40 40
30 30
1700
MHz
dB
dB
µA
mA
mA
V/µs
Degrees
nV
----------- Hz
4/9
TYPICAL CHARACTERISTICS
TS272C,I,M
Figure 1 : Supply Cur r en t ( e ac h am p li fi e r) versus
Supply Voltage
2.0
)
A
m
CC
1.5
1.0
0.5
T= 2 5 C
amb
A=1
V=V /2
OC C
°
V
SUPPLY CURRENT, I (
0
4 8 12 16
SUPPLY VOLTAGE, V (V)
CC
Figure 2 : Input Bias Current versus Free Air
Temperature
100
V = 10V
CC
V=5V
IB
i
Figure 3b : High Level Output Voltage versus
High Level Output Current
20
T = 25 C
V =100mV
16
H
O
12
8
4
OUTPUT VOL T AG E, V (V)
0
-50 -40 -30 -20 -10 0
°
amb
id
V = 10V
CC
OUTPUT CURRENT,I (mA)
V = 16V
CC
OH
Figure 4a : Low Level Output Voltage versus Low
Level Output Current
1.0
V
=3V
OL
0.8
CC
10
INPUT BIAS CURRENT, I (p A)
1
25 50 75 100 125
TEMPERATURE, T (°C)
amb
Figure 3a : High Level Output Voltage versus
High Level Output Current
5
T = 25 C
amb
4
V =100mV
OH
id
3
2
1
OUTPUT VOLTAGE, V (V)
0
-10 -8 -6 -4 -2 0
°
V=5V
CC
V=3V
CC
OUTPUT CURRENT,I (mA)
OH
0.6
V= 5 V
CC
0.4
T= 2 5 ° C
amb
0.2
OUTPUT VOLTAGE, V (V)
V = 0.5V
ic
V = -100mV
id
0123
OUTPUT CURR ENT, I (mA)
OL
Figure 4b : Low Level Output Voltage versus Low
Level Output Current
3
(V)
OL
2
1
OUTPUT VOLTAGE, V
0 4 81 21 62 0
V= 1 0 V
CC
V= 1 6 V
CC
T = 25°C
amb
V=0.5V
i
V = -100mV
id
OUTPUT CURRENT, I (m A)
OL
5/9
TS272C,I,M
Figure 5 : O pen Loop F requency Respons e and
Phase Shift
50
40
30
20
10
GAIN (dB)
0
-10
10
PHASE
T = 25°C
amb
+
V= 1 0 V
CC
R = 10k
C = 100pF
A= 1 0 0
23
Ω
L
L
VCL
10
10
FREQUENCY, f (Hz)
GAIN
Phase
Margin
Gain
Bandwidth
Product
4
5
10
10
0
45
90
135
PHASE (Degrees)
180
7
6
10
Figure 6 : Gain Bandwidth Product versus Supply
Voltage
5
4
3
Figure 8 : Phase Margin versus Capac itive L oad
70
T
= 25°C
amb
L
V
CC
Ω
=1
60
(Degrees)
m
φ
R = 10k
A
V=1 0 V
50
40
30
PHASE MARGIN,
20 0
60 40
CAPACITAN CE, C
L
(pF )
80
100
Figure 9 : Sle w Rate versus Supply Voltage
7
T
= 25°C
6
5
amb
R = 10k
C = 100pF
Ω
L
L
SR
s)
µ
2
1
0
GAIN BANDW. PROD., GBP (M Hz)
4 8 12 16
SUPPLY VO LTAGE, V
T
= 25°C
amb
L
L
V
=1
CC
Ω
(V)
R = 10k
C = 100pF
A
Figure 7 : Pha se Margin versus Supply Voltage
48
44
40
φ
36
T
= 25°C
amb
R = 10k
32
C = 100pF
A
28
PHASE MARGIN, m (Degrees)
04 8
Ω
L
L
=1
V
12
SUPPLY VO LTAGE, V (V)
CC
1
4
3
SR
SLEW RATES, SR (V/
2
4 6 8 10 12 14 1 6
SUPPLY VOLTAGE, V (V)
CC
Figure 10 : Input Voltage Noise versus
Frequency
300
V
= 10V
CC
= 25°C
T
amb
R
=100
200
100
VOLTAGE (nV/VHz)
EQUIVALENT INPUT NO ISE
0
11 0
FREQUENCY (Hz)
S
100
Ω
1000
6/9
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC DIP
TS272C,I,M
Dimensions
Min. Typ. Max. Min. Typ. Max.
A 3.32 0.131
a1 0.51 0.020
B 1.15 1.65 0.045 0.065
b 0.356 0.55 0.014 0.022
b1 0.204 0.304 0.008 0.012
D 10.92 0.430
E 7.95 9.75 0.313 0.384
e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300
F 6.6 0260
i 5.08 0.200
L 3.18 3.81 0.125 0.150
Z 1.52 0.060
Millimeters Inches
7/9
TS272C,I,M
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC MICROPACKAGE (SO)
L
C
A
a2
b
e3
D
8
1
M
5
4
s
F
c1
a3
a1
E
b1
Millimeters Inches
Dimensions
Min. Typ. Max. Min. Typ. Max.
A 1.75 0.069
a1 0.1 0.25 0.004 0.010
a2 1.65 0.065
a3 0.65 0.85 0.026 0.033
b 0.35 0.48 0.014 0.019
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.020
c1 45° (typ.)
D 4.8 5.0 0.189 0.197
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F 3.8 4.0 0.150 0.157
L 0.4 1.27 0.016 0.050
M 0.6 0.024
S 8° (max.)
8/9
TS272C,I,M
PACKAGE MECHANICAL DATA
8 PINS - THIN SHRINK SMALL OUTL INE PAC KAGE (TSSOP)
c
E1
A
A2
A1
D
b
Millimeters Inches
Dimensions
Min. Typ. Max. Min. Typ. Max.
A 1.20 0.05
A1 0.05 0.15 0.01 0.006
A2 0.80 1.00 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.15
c 0.09 0.20 0.003 0.012
D 2.90 3.00 3.10 0.114 0.118 0.122
E 6.40 0.252
E1 4.30 4.40 4.50 0.169 0.173 0.177
e 0.65 0.025
k 0° 8° 0° 8°
l 0.50 0.60 0.75 0.09 0.0236 0.030
L 0.45 0.600 0.75 0.018 0.024 0.030
L1 1.000 0.039
0.25mm
.010 inch
GAGE PLANE
PLANE
SEATING
5
5
8
8
PIN 1 IDENTIFICATION
k
L
L
L1
L1
C
E
4
e
1
14
Information furnished is bel ieved to be accurate and reliable. However, STMicroe lectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No li cense is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific at ions
mentioned in this publication ar e subject to change without notice. This publication supersedes and replaces all information
previously supplied. S TMicroelectronics products are not authorized for use as critica l components in life suppo rt devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics
© 2001 STM icroelectr o n ics - Printed in Italy - All Righ ts Reserved
STMicr o el ectronics GROU P OF COMPANIES
Australi a - Brazil - Can ada - China - Finland - France - Germany - Hon g Ko ng - India - Israel - Italy - Japa n - M al aysia
Malta - Mor occo - Singapore - Spain - Sweden - Switzerl and - United Ki ngdom - United States
© http://www.st.com
9/9