The TDA7419 is a high performance signal processor specifically designed for car radio applications.
The device includes a high performance audiopro-
Figure 2. Block Diagram
MUTE
SAOUT SACLK
SAOUT SACLK
Spectrum
Spectrum
Analyzer
Analyzer
MUTE
gure 1. Package
SO-28
Table 1. Order Codes
Part NumberPackage
TDA7419SO-28
TDA7419TRSO-28 in Tape & Reel
cessor with fully integrated audio filters. The digital
control allows programming in a wide range of filter
characteristics. By the use of BICMOS-process and
linear signal processing low distortion and low noise
are obtained.
SE1: stereo single-ended input
SE2: stereo single-ended input
SE3 / AC2IN: stereo single-ended input / DSO filter input
In-Gain 0 to 15dB, 1dB steps
internal offset-cancellation (AutoZero)
separate second source-selector
Mixing stagemixable to front speaker-outputs
Loudness2nd order frequency response
programmable center frequency (400Hz/800Hz/2400Hz)
15dB with 1dB steps
selectable low & high frequency boost
selectable flat-mode (constant attenuation)
Volume+15dB to -79dB with 1dB step resolution
soft-step control with programmable blend times
Bass2nd order frequency response
center frequency programmable in 4 steps (60Hz/80Hz/100Hz/200Hz)
Q programmable 1.0/1.25/1.5/2.0
DC gain programmable
-15 to 15dB range with 1dB resolution
Middle2nd order frequency response
center frequency programmable in 4 steps (500Hz/1KHz/1.5KHz/2.5KHz)
Q programmable 0.5/0.75/1.0/1.25
DC gain programmable
-15 to 15dB range with 1dB resolution
Treble2nd order frequency response
center frequency programmable in 4 steps (10KHz/12.5KHz/15KHz/17.5KHz)
-15 to 15dB range with 1dB resolution
Spectrum analyzerseven bandpass filters
2nd order frequency response
programmable Q factor for different visual appearance
analog output
controlled by external serial clock
Speaker4 independent soft step speaker controls, +15dB to -79dB with 1dB steps
Independent programmable mix input with 50% mixing ratio for front speakers
direct mute
Subwoofer2nd order low pass filter with programmable cut off frequency
single-ended mono output
independent soft step level control, +15dB to -79dB with 1dB steps
Mute Functionsdirect mute
digitally controlled SoftMute with 3 programmable mute-times(0.48ms/0.96ms/
123ms)
Effectgain effect, or high pass effect with fixed external components
4/30
TDA7419
4ELECTRICAL CHARACTERISTICS
Table 6. Electrical Characteristcs
V
= 8.5V; T
S
SymbolParameterTest ConditionMin. Typ.Max.Unit
SUPPLY
VsSupply Voltage88.510V
I
S
INPUT SELECTOR
R
in
V
CL
S
IN
G
IN MIN
G
IN MAX
G
STEP
V
DC
V
offset
DIFFERENTIAL STEREO INPUTS
R
in
CMRRCommon Mode Rejection RatioV
e
No
MIXING CONTROL
M
LEVEL
G
MAX
A
MAX
A
STEP
LOUDNESS CONTROL
A
MAX
A
STEP
f
Peak
VOLUME CONTROL
G
MAX
A
MAX
A
STEP
E
A
E
T
V
DC
= 25°C; RL= 10kΩ ; all gains = 0dB; f = 1kHz; unless otherwise specified
Attenuation Set ErrorG = -20 to +20dB-0.750+0.75dB
G = -79 to -20dB-403dB
Tracking Error2dB
DC StepsAdjacent Attenuation Steps-30.13mV
From 0dB to G
MIN
-50.55mV
RMS
RMS
5/30
TDA7419
Table 6. Electrical Characteristcs (continued)
V
= 8.5V; T
S
SymbolParameterTest ConditionMin. Typ.Max.Unit
SOFT MUTE
A
MUTE
T
D
V
TH Low
V
TH High
R
PU
V
PU
BASS CONTROL
FcCenter Frequencyf
Q
BASS
C
RANGE
A
STEP
DC
GAIN
MIDDLE CONTROL
C
RANGE
A
STEP
f
c
Q
BASS
TREBLE CONTROL
C
RANGE
A
STEP
fcCenter Frequencyf
= 25°C; RL= 10kΩ ; all gains = 0dB; f = 1kHz; unless otherwise specified
amb
Mute Attenuation80 100dB
Delay TimeT10.481ms
T20.962ms
T370123170ms
Low Threshold for SM Pin1V
High Threshold for SM Pin2.5V
Internal pull-up resistor324558
Internal pull-up Voltage3.3V
546066Hz
728088Hz
90100110Hz
180200220Hz
0.911.1
1.11.251.4
1.31.51.7
1.822.2
Quality FactorQ
C1
f
C2
f
C3
f
C4
1
Q
2
Q
3
Q
4
Control Range±14±15±16dB
Step Resolution0.511.5dB
Bass-DC-GainDC = off-10+1dB
DC = on (shelving filter, use for
-4.4dB
cut only)
Control Range±14±15±16dB
Step Resolution0.511.5dB
Center Frequencyf
Quality FactorQ
C1
f
C2
f
C3
f
C4
1
Q
2
Q
3
Q
4
400500600Hz
0.811.2kHz
1.21.51.8kHz
22.53kHz
0.450.50.55
0.650.750.85
0.911.1
1.11.251.4
Clipping Level±14±15±16dB
Step Resolution0.511.5dB
C1
f
C2
f
C3
f
C4
81012kHz
1012.515kHz
121518kHz
1417.521kHz
kΩ
6/30
TDA7419
Table 6. Electrical Characteristcs (continued)
V
= 8.5V; T
S
SymbolParameterTest ConditionMin. Typ.Max.Unit
SPEAKER ATTENUATORS
G
MAX
A
MAX
A
STEP
A
MUTE
E
E
V
DC
AUDIO OUTPUTS
V
CL
R
OUT
R
L
C
L
V
DC
SUBWOOFER ATTENUATOR
G
MAX
A
MAX
A
STEP
A
MUTE
E
E
V
DC
SUBWOOFER LOWPASS
f
LP
HPF EFFECT
G
MAX
G
MIN
A
STEP
SPECTRUM ANALYZER CONTROL
V
SAOut
f
C1
f
C2
f
C3
f
C4
f
C5
f
C6
f
C7
QQuality FactorQ11.621.81.98
f
SAClk
t
Sadel
= 25°C; RL= 10kΩ ; all gains = 0dB; f = 1kHz; unless otherwise specified
amb
Max Gain141516dB
Max Attenuation-83-79-75dB
Step Resolution0.511.5dB
Mute Attenuation8090dB
Attenuation Set Error2dB
DC StepsAdjacent Attenuation Steps-50.15mV
Clipping leveld = 0.3%1.82V
Output impedance30100Ω
Output Load Resistance2kΩ
Output Load Capacitor10nF
DC Voltage Level3.84.04.2V
Max Gain141516dB
Max Attenuation-83-79-75dB
Step Resolution0.511.5dB
Mute Attenuation8090dB
Attenuation Set Error2dB
DC StepsAdjacent Attenuation Steps-515mV
Lowpass Corner Frequencyf
f
f
LP1
LP2
LP3
728088Hz
108120132Hz
144160176Hz
Max Gain212223dB
Min Gain345dB
Step Resolution1.522.5dB
Output Voltage Range03.3V
Center Frequency Band 15.56269Hz
Center Frequency Band 2141157173Hz
Center Frequency Band 3356392436Hz
Center Frequency Band 40.911.1kHz
Center Frequency Band 52.262.512.76kHz
Center Frequency Band 65.706.346.98kHz
Center Frequency Band 714.41617.6kHz
Q23.153.53.85
Clock Frequency3100kHz
Analog Output Delay Time2µs
RMS
7/30
TDA7419
Table 6. Electrical Characteristcs (continued)
V
= 8.5V; T
S
SymbolParameterTest ConditionMin. Typ.Max.Unit
t
repeat
t
intres
GENERAL
e
NO
S/NSignal to Noise Ratioall gain = 0dB flat; V
DDistortionV
S
C
= 25°C; RL= 10kΩ ; all gains = 0dB; f = 1kHz; unless otherwise specified
amb
Spectrum Analyzer Repeat Time50ms
Internal Reset Time4.5ms
Output NoiseBW=20Hz to 20 kHz all gain =
1220µV
0dB
BW=20Hz to 20 kHz Output
615µV
muted
= 1V
IN
=2V
o
RMS
; all stages 0dB0.010.1%
RMS
100dB
Channel Separation left/right8090dB
5DESCRIPTION OF THE AUDIOPROCESSOR
5.1Input stages
In the basic configuration, one stereo quasi-differential and three (two in case of DSO applications) single
ended stereo inputs are available.
5.1.1 Quasi-differential stereo Input (QD)
The QD input is implemented as a buffered quasi-differential stereo stage with 100k input-impedance at
each input. The attenuation is fixed to -3dB in order to adapt the incoming signal level.
The input-impedance at each input is 100k and the attenuation is fixed to -3dB for incoming signals. The
input for SE3 is also configurable as part of the interface for external filters in DSO applications (AC2IN)
Figure 4. Input Stage
QD_L
QD_G
QD_R
SE1_L
SE1_R
SE2_L
SE2_R
AC2IN_L/SE3L
AC2IN_R/SE3R
QD
SE1
SE2
SE3
QD
SE4
SE1
SE2
SE3
Main
Source
In Gain
8/30
Second
Source
Output Stage
TDA7419
5.2AutoZero
The AutoZero allows a reduction of the number of pins as well as external components by canceling any
offset generated by or before the In-Gain-stage (Please notice that externally generated offsets, e.g. generated through the leakage current of the coupling capacitors, are not canceled).
The auto-zeroing is started every time the input source is changed and needs max. 0.3ms for the alignment. To avoid audible clicks the Audio processor is muted before the loudness stage during this time.
The AutoZero feature is only present in the main signal-path.
5.2.1 AutoZero-Remain
In some cases, for example if the P is executing a refresh cycle of the IIC-Bus-programming, it is not useful to start a new AutoZero-action because no new source is selected and an undesired mute would appear at the outputs. For such applications, it can be switched in the AutoZero-Remain-Mode (Bit 6 of the
subaddress-byte). If this bit is set to high, the AutoZero will not be invoked and the old adjustment-value
remains.
5.3Loudness
There are four parameters programmable in the loudness stage:
5.3.1 Attenuation
Figure 5 shows the attenuation as a function of frequency at f
= 400Hz
P
Figure 5. Loudness Attenuation @ f
5
0
-5
-10
-15
-20
10
= 400Hz.
P
100
1K
10K
9/30
TDA7419
5.3.2 Peakr Frequency
Figure 6 shows the three possible peak-frequencies 400Hz , 800Hz and 2.4kHz.
Figure 6. Loudness Center frequencies @ Attn. = 15dB
5
0
-5
-10
-15
-20
10
100
1K
5.3.3 Low & High Frequency Boost
Figure 7 shows the different Loudness-shapes in low & high frequency boost.
Figure 7. Loudness Attenuation , fC = 2.4KHz
5
0
-5
-10
-15
10K
10/30
-20
10
100
1K
10K
5.3.4 Flat Mode
In flat mode the loudness stage works as a 0dB to -15dB attenuator.
TDA7419
5.4SoftMute
2
The digitally controlled SoftMute stage allows muting/demuting the signal with a I
slope. The mute process can either be activated by the SoftMute pin or by the I
C-bus programmable
2
C-bus. This slope is real-
ized in a special S-shaped curve to mute slow in the critical regions (see Figure 8).
For timing purposes the Bit0 of the I2C-bus output register is set to 1 from the start of muting until the end
of demuting.
Figure 8. Sofmute Timing
1
EXT.
MUTE
+SIGNAL
REF
-SIGNAL
1
2
I
C BUS
OUT
D97AU634
Time
Note: Please notice that a started Mute-action is always terminated and could not be interrupted by a change of the mute -signal
5.5SoftStep-Volume
When the volume-level is changed audible clicks could appear at the output. The root cause of those clicks
could either be a DC-Offset before the volume-stage or the sudden change of the envelope of the audiosignal. With the SoftStep feature both kinds of clicks could be reduced to a minimum and are no more
audible. The blend-time from one step to the next is programmable in four steps.
Figure 9. SoftStep Timing
V
OUT
1dB
0.5dB
SS Time
-0.5dB
-1dB
Note: For steps more than 0.5dB the SoftStep mode should be deactivated because it could generate a hard 1dB step during the blend-time.
D00AU1170
Time
11/30
TDA7419
5.6Bass
There are four parameters programmable in the bass stage:
5.6.1 Attenuation
Figure 9 shows the attenuation as a function of frequency at a center frequency of 80Hz.
Figure 10. Bass Control @ f
15.0
10.0
5.0
= 80Hz, Q = 1
C
dB
0.0
-5.0
-10.0
-15.0
10.0100.01.0K10.0K
Hz
5.6.2 Center Frequency
Figure 11 shows the four possible center frequencies 60, 80, 100 and 200Hz.
Figure 11. Bass center Frequencies @ Gain = 15dB, Q = 1
16
12
8
4
0
-4
10
12/30
100
1K
10K
5.6.3 Quality Factors
Figure 12 shows the four possible quality factors 1, 1.25, 1.5 and 2.
Figure 12. Bass Quality factors @ Gain = 14dB, fC = 80Hz
15.0
12.5
10.0
7.5
5.0
2.5
TDA7419
0.0
10.0100.01.0K10.0K
5.6.4 DC Mode
It is used for cut only for shelving filter. In this mode the DC-gain is increased by 4.4dB. Inaddition the programmed center frequency and quality factor is decreased by 25% which can be used to reach alternative center frequencies or quality factors.
Figure 13. Bass normal and DC Mode @ Gain = 14dB, fC = 80Hz
15.0
12.5
10.0
7.5
5.0
2.5
0.0
10.0100.01.0K10.0K
Note: The center frequency, Q and DC-mode can be set fully independently.
13/30
TDA7419
5.7Middle
There are three parameters programmable in the middle stage:
5.7.1 Attenuation
Figure 14 shows the attenuation as a function of frequency at a center frequency of 1kHz.
Figure 14. Middle Control @ f
= 1 kHz, Q = 1
C
5.7.2 Center Frequency
Figure 14 shows the four possible center frequencies 500Hz, 1kHz, 1.5kHz and 2.5kHz.
Figure 15. Middle center Frequencies @ Gain = 14dB, Q = 1
14/30
5.7.3 Quality Factors
Figure 16 shows the four possible quality factors 0.5, 0.75, 1 and 1.25.
Figure 16. Middle Quality factors @ Gain = 14dB, fc = 1kHz
TDA7419
5.8Treble
There are two parameters programmable in the treble stage:
5.8.1 Attenuation
Figure 16 shows the attenuation as a function of frequency at a center frequency of 17.5kHz.
Figure 17. Treble Control @ f
20
15
10
5
0
-5
-10
-15
= 17.5kHz
C
-20
10
100
1K
10K
15/30
TDA7419
5.8.2 Center Frequency
Figure 18 shows the four possible center frequencies 10k, 12.5k, 15k and 17.5kHz.
Figure 18. Treble Center Frequencies @ Gain = 15dB
20
15
10
5
0
-5
10
100
1K
10K
5.9Subwoofer Filter
The subwoofer lowpass filter has butterworth characteristics with programmable cut-off frequency (80/
120/160Hz)
Figure 19. Subwoofer Control
16/30
TDA7419
5.10 Spectrum Analyzer
A fully integrated seven-band spectrum analyzer with programmable quality factor is present. The spectrum analyzer consists of seven band pass filters with rectifier and sample capacitor that stores the maximum peak signal level since the last read cycle. This peak signal level can be read by a microprocessor
at the SAout-pin. To allow easy interfacing to an analog port of the microprocessor, the output voltage at
this pin is referred to device ground.
The microprocessor starts a read cycle with the negative going clock edge at the SAclk input. On the following positive clock edges, the peak signal level for the band pass filters is subsequently switched to
SAout. Each analog output data is valid after the time t
whenever SAclk remains high for the time t
. Note that a proper reset requires the clock signal SAclk
intres
to be held at high potential. Figure 20 shows the block diagram and figure 21 illustrates the read cycle
timing of the spectrum analyzer.
Figure 20. Spectrum analyzer block diagram
. A reset of the sample capacitors is induced
Sadel
Figure 21. Timing of the spectrum analyzer
17/30
TDA7419
5.11 AC-Coupling
In some applications additional signal manipulations are desired, such as additional band equalizations.
For this purpose, an AC-Coupling can be placed before the loudness attenuator or speaker-attenuators,
which can be activated or internally shorted by I
attenuator is available at the AC-Outputs. The input-impedance of this AC-Inputs is 50kΩ.
Figure 22. Diagram of AC coupling
2
C-Bus. In short condition, the input-signal of the speaker-
ACINR
Speakers
To Output
From Input MUX
InGain
ACOUTR ACOUTL
Filters
ACINL
5.12 DSO Applications
For DSO applications, DSO filter is available for additional processing after the speaker control. It is a 2nd
order Butterworth highpass filter with selectable flat mode. Figure 23 shows the diagram of the DSO that
includes an external RC network.
Figure 23. DSO diagram
External RC network
From speaker
18/30
ACOUT
/AC2OUT
SE3IN
/AC2IN
ACIN
/FILO
Gain Control
To
output
TDA7419
5.13 Output Selector and Mixing
The output-selector allows the front and rear speakers to connect to different sources. The setup of the
output selector is shown in Figure 24. A Mixing-stage is placed after the front speaker-attenuator and can
be set to mixing-mode. Having a full volume-attenuator for the mix-signal, the stage offers a wide flexibility
to adapt the mixing levels.
Figure 24. Output Selector
Mix_in
Attenuator
Main
Second
BassL+BassR
Attenuator
Attenuator
Subwoofer
filter
Attenuator
Front
Rear
Subwoofer
output
5.14 Audioprocessor Testing
In the test mode, which can be activated by setting bit D7 of the IIC subaddress byte and bit D0 of the
testing audioprocessor byte, several internal signals are available at the SE1R pin. In this mode, the input
resistance of 100kOhm is disconnected from the pin. Internal signals available for testing are listed in the
data-byte specification.
5.15 Test Circuit
Figure 25. Test Circuit
19/30
TDA7419
6I2C BUS SPECIFICATION
6.1Interface Protocol
The interface protocol comprises:
– a start condition (S)
– a chip address byte (the LSB determines read/write transmission)
– a subaddress byte
– a sequence of data (N-bytes + acknowledge)
– a stop condition (P)
– the max. clock speed is 500kbits/s
– 3.3V logic compatible
6.1.1 Receive Mode
S100 0 100R/WACKTSAZAIA4A3A2A1A0ACKDATAACKP
S = Start
R/W = "0" -> Receive Mode (Chip can be programmed by µP)
"1" -> Transmission Mode (Data could be received by µP)
ACK = Acknowledge
P = Stop
TS = Testing mode
AZ = Auto zero remain
AI = Auto increment
6.1.2 Transmission Mode
1000100R/WACKXXXXXXXSMACKP
S
SM = Soft mute activated for main channel
X = Not Used
The transmitted data is automatic updated after each ACK. Transmission can be repeated without new
chip address.
6.1.3 Reset Condition
A Power-On-Reset is invoked if the Supply-Voltage is below than 3.5V. After that the following data is written automatically into the registers of all subaddresses:
DC Coupling (without DSO)
AC coupling after InGain
DC Coupling (with DSO)
AC coupling after Bass
TDA7419
Table 19. Testing Audio Processor (17)
MSBLSBFUNCTION
D7D6D5D4D3D2D1D0
Audio Processor Testing Mode
off
0
on
1
Test Multiplexer
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
xxNot used
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
x
x
x
x
x
x
x
x
Left InGain
Left InGain
Left Loudness
Left Loudness
Left Volume
Left Volume
Left Treble
Left Treble
Left Middle
SMCLK
Left Bass
VrefSCR
VGB1.26
SSCLK
Clock200
Mon
Ref5V5
BPout<1>
BPout<2>
BPout<3>
BPout<4>
BPout<5>
BPout<6>
BPout<7>
27/30
TDA7419
Figure 26. SO-28 Mechanical Data & Package Dimensions
DIM.
A2.650.104
a10.10.30.0040.012
b0.350.490.0140.019
b10.230.320.0090.013
C0.50.020
c145° (typ.)
D17.718.10.6970.713
E1010.65 0.3940.419
e1.270.050
e316.510.65
F7.47.60.2910.299
L0.41.270.0160.050
S8
mminch
MIN.TYP.MAX. MIN.TYP.MAX.
(max.)
°
OUTLINE AND
MECHANICAL DATA
SO-28
28/30
Table 20. Revision History
DateRevisionDescription of Changes
November 20041First Issue
March 20052Inserted new values in Electrical Characteristics
TDA7419
29/30
TDA7419
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners