Features
● Fully integrated signal processor optimized
for car radio applications
● Fully programmable by i
● Includes audioprocessor, stereo decoder
with noise blanker and multipath detector
● Softmute function
● Programmable roll-off compensation
● No external components
2
c bus
TDA7407
Advanced car signal processor
LQFP44
Description
The TDA7407 is the newcomer of the CSP family
introduced by TDA7460/61. It uses the same
innovative concepts and design technologies
allowing fully software programmability through
2
I
C bus and overall cost optimisation for the
system designer.
Order codes
Part number Package Packing
TDA7407 LQFP44 Tray
TDA7407TR LQFP44 Tape and reel
The device includes a three band audioprocessor
with configurable inputs, and absence of external
components for filter settings, a last generation
stereo decoder with multipath detector, and a
sophisticated stereo blend and noise cancellation
circuitry. Strength points of the CSP approach are
flexibility and overall cost/room saving in the
application, combined with high performances.
January 2007 Rev 3 1/46
www.st.com
1
Contents TDA7407
Contents
1 Block diagram and pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1 ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 Audio processor part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 List of features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.1 Input multiplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.2 Volume control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.3 Bass control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.4 Mid control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.5 Treble control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.6 Speaker control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1.7 Mute functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3 Stereo decoder part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1 Notes to the characteristics: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Noise blanker part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5 Multipath detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1 Description of the audioprocessor part . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1.1 Input multiplexer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1.2 Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1.3 AutoZero . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1.4 AutoZero remain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1.5 Multiplexer output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.1.6 Softmute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1.7 BASS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1.8 Attenuation (80Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.9 Center frequency (60, 70, 80, 100Hz) . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.10 Quality factors (1, 1.25, 1.5, 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.11 DC mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.12 MID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.13 Attenuation (1kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/46
TDA7407 Contents
5.1.14 Center frequency (500, 1k, 1.5k, 2k Hz) . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.15 Quality factor (2 at 1kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.16 Treble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.17 Attenuation (17.5kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.18 Center frequency (10, 12.5, 15, 17.5kHz) . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.19 AC coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.20 Speaker Attenuator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2 Functional description of the stereo decoder . . . . . . . . . . . . . . . . . . . . . . 26
5.2.1 Stereo decoder Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2.2 Ingain + Infilter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2.3 Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2.4 De-emphasis and Highcut. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.2.5 PLL and pilot tone detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.2.6 Field strength control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.2.7 LEVEL Input and Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2.8 Stereoblend control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2.9 Highcut control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2.10 Functional description of the noiseblanker . . . . . . . . . . . . . . . . . . . . . . . 29
5.2.11 Trigger path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.2.12 Automatic noise controlled threshold adjustment (ATC) . . . . . . . . . . . . 30
5.3 Automatic threshold control mechanism . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.3.1 Automatic threshold control by the stereoblend voltage . . . . . . . . . . . . 31
5.3.2 Over deviation detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.4 Functional description of the multipath detector . . . . . . . . . . . . . . . . . . . . 31
5.4.1 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.4.2 Quality detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.4.3 AF Search Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.5 Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6 I2C Bus interface description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.1 Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2 Auto increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
7 Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3/46
Contents TDA7407
9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4/46
TDA7407 List of tables
List of tables
Table 1. Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 3. Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 5. Audio processor electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 6. Stereo decoder electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 7. Noise blanker electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 8. Multipath electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 9. Quality detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 10. Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 11. Transmitted data (send mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 12. Subaddress (receive mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 13. Input selector (subaddress 0H). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 14. Volume and speaker attenuation (subaddress 1H, 4H, 5H, 6H, 7H) . . . . . . . . . . . . . . . . . 36
Table 15. Treble filter (subaddress 2H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 16. Bass filter (subaddress 3H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 17. Soft mute and bass programming (subaddress 8H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 18. Stereo decoder (subaddress 9H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 19. Noiseblanker (subaddress AH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 20. High Cut (subaddress BH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 21. Field strength Control (subaddress CH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 22. Configuration (subaddress DH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 23. Stereo decoder adjustment (subaddress EH). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 24. Testing (subaddress FH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 25. New quality / control (subaddress 10H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 26. Mid filter (subaddress 11H). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 27. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
5/46
List of figures TDA7407
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. Pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Vn timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 4. Trigger threshold vs.VPEAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 5. Deviation controlled trigger adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 6. Fieldstrength controlled trigger adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 7. Input stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 8. Softmute timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 9. Bass control @ fc = 80Hz, Q = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 10. Bass center @ Gain = 14dB, Q =1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 11. Bass quality factors @ Gain =14dB, fc = 80Hz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 12. Bass normal and DC mode @ Gain = 14dB, fc = 80Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 13. Mid control @ fc=1kHz, Q=1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 14. Mid center frequency @ Gain=14dB, Q1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 15. Mid Q factor @ fc=1kHz, Gain=14dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 16. Treble control @ fc = 17.5KHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 17. Treble center frequencies @ Gain = 14dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 18. Block diagram of the stereo decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 19. Signals during stereo decoder's softmute. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 20. Internal Stereoblend characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 21. Relation between internal and external LEVEL voltage and setup of stereoblend . . . . . . . 28
Figure 22. High cut characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 23. Block Diagram of the Noiseblanker . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 24. Block diagram of the multipath detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 25. Mute control logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6/46
TDA7407 Block diagram and pin connections
1 Block diagram and pin connections
Figure 1. Block diagram
Figure 2. Pin connections (top view)
TAPE R
TAPE L
CREF
44 43 42 413940 38 37 36 35 34
1
CDR
CDL
N.C.
AFS
AM
N.C.
2
3
4
5
6
7
8
9
10
12 13 14 15 16
N.C.
MPX
LEVEL
CDROUT
CDGND
CDLOUT
PHONE-
PHONE+
REF
ACINLF
V
MPIN
ACINRR
ACINRF
171118 19 20 21 22
N.C.
MUXL
MPOUT
ACINLR
N.C.
N.C.
MUXR
ACOUTL
ACOUTR
QUAL
SMUTE
33
N.C.
32
OUT LF
31
OUT RF
30
OUT LR
29
OUT RR
28
N.C.
27
V
26
GND
25
N.C.
24
SDA
23
SCL
PINCON-TDA7407
S
7/46
Block diagram and pin connections TDA7407
Table 1. Pin Description
N. Name Function Type
1 CDR CD right channel input I
2 CDROUT CD output right channel O
3 CDGND CD input common ground I
4 CDLOUT CD output left channel O
5 CDL CD input left channel I
6nc -
7 PH - Differential phone input - I
8 PH + Differential phone input + I
9 AFS AFS drive I
10 AM AM input I
11 nc -
12 MPX FM stereo decoder input I
13 nc -
14 LEVEL Level input stereo decoder I
15 MPIN Multipath input I
16 MPOUT Multipath output O
17 nc -
18 MUXL Multiplexer output left channel O
19 MUXR Multiplexer output right channel O
20 nc -
21 QUAL Stereo decoder quality output O
22 SMUTE Soft mute drive I
2
23 SCL I
24 SDA I
C clock line I
2
C data line I/O
25 nc -
26 GND Supply ground S
27 VS Supply voltage S
28 nc -
29 OUTRR Right rear speaker output O
30 OUTLR Left rear speaker output O
31 OUTRF Right front spaeaker output O
32 OUTLF Left front speaker output O
33 nc -
34 ACOUTR Pre-speaker AC output right channel O
35 ACOUTL Pre-speaker AC output left channel O
8/46
TDA7407 Block diagram and pin connections
Table 1. Pin Description (continued)
N. Name Function Type
36 nc -
37 ACINLR Pre-speaker input left rear channel I
38 ACINRR Pre-speaker input right rear channel I
39 ACINRF Pre-speaker input right front channel I
40 ACINLF Pre-speaker input left front channel I
41 VREF Reference voltage output O
42 CREF Reference capacitor pin S
43 TAPEL Tape input left I
44 TAPER Tape input right I
Pin type legend: I = Input ; O = Output; I/O = Input/Output; S = Supply; nc = not connected
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
S
T
amb
T
stg
Table 3. Supply
Symbol Parameter Test Condition Min. Typ. Max. Unit
V
S
I
S
SVRR Ripple rejection @ 1KHz
Table 4. Thermal data
Symbol Parameter Value Unit
R
th-j pins
1.1 ESD
Operating supply voltage 10.5 V
Operating ambient temperature range -40 to 85 °C
Operating storage temperature range -55 to 150 °C
Supply voltage 7.5 9 10 V
Supply current VS = 9V 30 35 40 mA
Audioprocessor (all filters flat) 50 60 dB
Stereo decoder + audioprocessor 45 55 dB
Thermal resistance junction to pins (max) 85 °C/W
All pins are protected against ESD according to the MIL883 standard.
9/46
Audio processor part TDA7407
2 Audio processor part
2.1 List of features
2.1.1 Input multiplexer
● Quasi differential CD and cassette stereo input
● AM mono input
● Phone differential input
● Multiplexer signal after In-Gain available at separate pins
2.1.2 Volume control
● 1dB attenuator
● Max. gain 15dB
● Max. attenuation 79dB
2.1.3 Bass control
nd
● 2
● Q-factor programmable in 4 steps
● Center frequency programmable in 4(5) steps
● DC gain programmable
● ±15 x 1dB steps
order frequency response
2.1.4 Mid control
nd
● 2
● Q-factor programmable in 2 steps
● Center frequency programmable in 4 steps
● ±15 x 1dB steps
order frequency response
2.1.5 Treble control
nd
● 2
● Center frequency programmable in 4 steps
● ±15 x 1dB steps
order frequency response
2.1.6 Speaker control
● 4 independent speaker controls in 1dB steps
● max gain 15dB
● max. attenuation 79dB
10/46
TDA7407 Audio processor part
2.1.7 Mute functions
● Direct mute
● Digitally controlled softmute with 4 programmable mute time.
2.2 Electrical characteristics
.
Table 5. Audio processor electrical characteristics
(V
= 9V; T
S
specified)
Symbol Parameter Test condition Min. Typ. Max. Unit
Input selector
R
Input resistance all inputs except phone 70 100 130 KΩ
in
Clipping level 2.2 2.6 V
CL
Input separation 80 100 dB
IN
Min. input gain -1 0 1 dB
Max. input gain 13 15 17 dB
Step resolution 0.5 1 1.5 dB
STEP
DC steps
DC
G
G
IN MAX
G
V
V
S
IN MIN
= 25°C; RL = 10KΩ; all gains = 0dB; f = 1KHz; unless otherwise
amb
Adjacent gain step -5 0.5 5 mV
GMIN to GMAX -10 5 10 mV
RMS
Differential CD stereo input
R
Input resistance
in
CMRR
Common mode rejection
ratio
Output noise @ speaker
e
N
outputs
Differential phone input
Input resistance Differential 40 56 KΩ
R
in
CMRR
Common mode rejection
ratio
Volu m e cont r o l
G
A
A
Max gain 13 15 17 dB
MAX
Max attenuation 70 79 dB
MAX
Step resolution 0.5 1 1.5 dB
STEP
E
Attenuation set error
A
Differential 70 100 130 KΩ
Common mode 70 100 130 KΩ
V
= 1V
CM
= 1V
V
CM
20Hz to 20KHz flat; all stages
0dB
= 1V
V
CM
V
= 1V
CM
@ 1KHz 45 70 dB
RMS
@ 10KHz 45 60 dB
RMS
615mV
@ 1KHz 40 70 dB
RMS
@ 10KHz 40 60 dB
RMS
G = -20 to 20dB -1.25 0 1.25 dB
G = -60 to 20dB -4 0 3 dB
E
Tracking error 2 dB
T
11/46
Audio processor part TDA7407
Table 5. Audio processor electrical characteristics (continued)
(V
= 9V; T
S
= 25°C; RL = 10KΩ; all gains = 0dB; f = 1KHz; unless otherwise
amb
specified)
Symbol Parameter Test condition Min. Typ. Max. Unit
V
DC
DC steps
Soft mute/AFS
A
MUTE
V
TH low
V
TH high
R
Mute attenuation 80 100 dB
T
Delay time
D
Low threshold for SM-/AFS- Pin
High threshold for SM-/AFS-Pin 2.5 V
Internal pull-up resistor 45 KΩ
PD
Bass control
C
RANGE
A
Control range ±13 ±15 ±17 dB
Step resolution 0.5 1 1.5 dB
STEP
Center frequency
f
C
Adjacent attenuation steps 0.1 3 mV
From 0dB to GMIN 0.5 5 mV
T1 0.48 ms
T2 0.96 ms
T3 40.4 ms
T4 324 ms
(1)
f
C1
f
C2
f
C3
54 60 66 Hz
63 70 77 Hz
72 80 88 Hz
1V
100
f
C4
90
(150)
(2)
110 Hz
Q
1
Q
Q
BASS
Quality factor
2
Q
3
Q
4
DC = off -1 0 1 dB
DC
GAIN
Bass-DC-gain
DC = on 3.5 4.4 5.5 dB
MID control
C
RANGE
A
Control range ±13 ±15 ±17 dB
Step resolution 0.5 1 1.5 dB
STEP
f
C1
f
f
Center frequency
C
C2
f
C3
f
C4
12/46
0.911.1
1.1 1.25 1.4
1.3 1.5 1.7
1.822.2
450 500 550 Hz
0.911.1kHz
1.35 1.5 1.65 kHz
1.822.2kHz
TDA7407 Audio processor part
Table 5. Audio processor electrical characteristics (continued)
(V
= 9V; T
S
= 25°C; RL = 10KΩ; all gains = 0dB; f = 1KHz; unless otherwise
amb
specified)
Symbol Parameter Test condition Min. Typ. Max. Unit
Q
MID
Quality factor
Treble con t ro l
C
RANGE
A
1. The SM pin is active low (mute = 0)
2. See note in programming section
Control range ±13 ±15 ±17 dB
Step resolution 0.5 1 1.5 dB
STEP
Center frequency
f
C
Q
1
Q
2
f
C1
f
C2
f
C3
f
C4
0.911.1
1.822.2
81012KHz
10 12.5 15 KHz
12 15 18 KHz
14 17.5 21 KHz
13/46
Stereo decoder part TDA7407
SN
3 Stereo decoder part
Table 6. Stereo decoder electrical characteristics
(V
= 9V; de-emphasis time constant = 50μs,V
S
fm= 1KHz, Gv = 6dB. T
= 25°C; unless otherwise specified)
amb
Symbol Parameter Test condition Min. Typ. Max. Unit
= 500mV (75KHz deviation),
MPX
V
R
G
MPX input level Gv = 3.5dB 0.5 1.25 V
in
Input resistance 70 100 130 KΩ
in
Min. input gain 1.5 3.5 4.5 dB
MIN
GMAX Max. input gain 8.5 11 12.5 dB
GSTEP Step resolution 1.75 2.5 3.25 dB
SVRR
Supply voltage ripple
rejection
Vripple = 100mV; f = 1KHz 35 60 dB
α Max. channel separation 30 50 dB
THD Total harmonic distortion 0.02 0.3 %
--------------
N
ratio
A-weighted, S = 2V
RMS
80 91 dB
Signal plus noise to noise
+
Mono / stereo switch
V
PTHST1
V
PTHST0
V
PTHMO1
V
PTHMO0
Pilot threshold voltage for Stereo, PTH = 1 10 15 25 mV
Pilot threshold voltage for Stereo, PTH = 0 15 25 35 mV
Pilot threshold voltage for Mono, PTH = 1 7 12 17 mV
Pilot threshold voltage for Mono, PTH = 1 10 19 25 mV
PLL
Δf/f Capture range 0.5 %
RMS
De-emphasis and highcut
t
HC50
t
HC75
t
HC50
t
HC75
De-emphasis time constant
De-emphasis time constant
Highcut time constant
Highcut time constant
Bit 7, Subadr, 10 = 0,
V
Bit 7, Subadr, 10 = 1,
V
Bit 7, Subadr, 10 = 0,
V
Bit 7, Subadr, 10 = 1,
V
Stereo blend and highcut control
REF5V Internal reference voltage 4.7 5 5.3 V
T
CREF5V
L
Gmin
L
Gmax
Temperature coefficient 3300 ppm
Min. LEVEL gain -1 0 1 dB
Max. LEVEL gain 8 10 12 dB
14/46
LEVEL
LEVEL
LEVEL
LEVEL
>> V
>> V
>> V
>> V
HCH
HCH
HCL
HCL
25 50 75 μs
50 75 100 μs
100 150 200 μs
150 225 300 μs
TDA7407 Stereo decoder part
Table 6. Stereo decoder electrical characteristics (continued)
(V
= 9V; de-emphasis time constant = 50μs,V
S
fm= 1KHz, Gv = 6dB. T
= 25°C; unless otherwise specified)
amb
Symbol Parameter Test condition Min. Typ. Max. Unit
= 500mV (75KHz deviation),
MPX
L
Gstep
VSBL
VSBL
VSBL
VHCH
VHCH
VHCH
VHCL
VHCL
VHCL
LEVEL gain step resolution 0.3 0.67 1 dB
Min. voltage for mono 25 29 33 %REF5V
min
Min. voltage for mono 54 58 62 %REF5V
max
Step resolution 2.2 4.2 6.2 %REF5V
step
Min. voltage for NO highcut 38 42 46 %REF5V
min
Min. voltage for NO highcut 62 66 70 %REF5V
max
Step resolution 5 8.4 12 %REF5V
step
Min. voltage for full highcut 12 17 22 %VHCH
min
Max. voltage for full highcut 28 33 38 %VHCH
max
Step resolution 2.2 4.2 6.2 %VHCH
step
Carrier and harmonic suppression at the output
α19 Pilot signal f = 19KHz 40 50 dB
α38 Subcarrier f = 38KHz 75 dB
α57 Subcarrier f = 57KHz 62 dB
α76 Subcarrier f = 76KHz 90 dB
Intermodulation (Note 1)
α2f
α3f
mod
mod
= 10KHz, f
= 13KHz, f
= 1KHz 65 dB
spur
= 1KHz 75 dB
spur
Traffic Ratio (Note 2)
α57 Signal f = 57KHz 70 dB
SCA - Subsidiary communications authorization (note 3)
α67 Signal f = 67KHz 75 dB
ACI - Adjacent channel interference (note 4)
α114 Signal f = 114KHz 95 dB
α190 Signal f = 190KHz 84 dB
15/46
Stereo decoder part TDA7407
3.1 Notes to the characteristics:
1. Intermodulation suppression:
V
α2
α3
O signal()at1kHz()
------------------------------------------------------- -=
V
O spurious()at1kHz()
V
O signal()at1kHz()
------------------------------------------------------- -=
V
O spurious()at1kHz()
measured with: 91% pilot signal; fm = 10kHz or 13kHz.
2. Traffic radio (V.F.) suppression: measured with: 91% stereo signal;
9% pilot signal; fm = 1kHz; 5% subcarrier (f = 57kHz, fm = 23Hz AM, m = 60%)
α57 V.W > F.()
3. SCA (Subsidiary Communications Authorization) measured with: 81% mono signal;
9% pilot signal; fm = 1kHz; 10% SCA - subcarrier (fs = 67kHz, unmodulated).
α67
V
O signal()at1kHz()
------------------------------------------------------- -=
V
O spurious()at9kHz()
4. ACI (Adjacent Channel Interference):
α114
V
O signal()at1kHz()
------------------------------------------------------- -=
V
O spurious()at4kHz()
; fs = (2 x 10kHz) - 19kHz
= (3 x 13kHz) - 38kHz
; f
s
V
O signal()at1kHz()
----------------------------------------------------------------------------=
V
O spurious()at1kHz 23kHz±()
; Fs =(2 x 38kHz) - 67kHz
; Fs = 110kHz - (3 x 38kHz)
V
α114
O signal()at1kHz()
------------------------------------------------------- -=
V
O spurious()at4kHz()
= 186kHz - (5 x 38kHz)
; F
s
measured with: 90% mono signal; 9% pilot signal; fm =1kHz; 1% spurious signal
(fs = 110kHz or 186kHz, unmodulated).
16/46
TDA7407 Noise blanker part
4 Noise blanker part
n
● internal 2
● programmable trigger threshold
● trigger threshold dependent on high frequency noise with programmable gain
● additional circuits for deviation and fieldstrength dependent trigger adjustment
● very low offset current during hold time due to opamps wMOS inputs
● four selectable pulse suppression times
● programmable noise rectifier charge/discharge current
Table 7. Noise blanker electrical characteristics
Symbol Parameter Test condition Min. Typ. Max. Unit
V
TR
V
TRNOISE
V
RECT
V
RECT DEV
V
RECT FS
d
order 140kHz high pass filter
meas. with V
Trigger threshold
Noise controlled
trigger threshold
(1) (2)
(3)
= 0.9V
meas. with V
= 1.5V
V
Rectifier voltage
V
V
Deviation dependent
rectifier voltage
(4)
Fieldstrength
controlled rectifier
voltage
(5)
means. with
V
(75KHz dev.)
means. with
V
V
(fully mono)
NBT = 111
NBT = 110
NBT = 101
NBT = 100
PEAK
NBT = 011
NBT = 010
NBT = 001
NBT = 000
NCT = 00
NCT = 01
PEAK
NCT = 10
NCT = 11
= 0mV NRD
MPX
= 50mV; f = 150KHz 1.5 1.7 2.1 V
MPX
= 200mV; f = 150KHz 2.2 2.5 2.9 V
MPX
(7)
= 00 0.5 0.9 1.3 V
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
30
35
40
45
50
55
60
65
260
220
180
140
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
OVD = 11 0.5 0.9(off) 1.3 V
OVD = 10 0.9 1.2 1.5 V
= 800mV
MPX
OVD = 01 1.7 2.0 2.3 V
OVD = 00 2.5 2.8 3.1 V
FSC = 11 0.5 0.9(off) 1.3 V
MPX
LEVE
= 0mV
L << V
SBL
FSC = 10 0.9 1.4 1.5 V
FSC = 01 1.7 1.9 2.3 V
FSC = 00 2.1 2.4 3.1 V
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
OP
OP
OP
OP
OP
OP
OP
OP
OP
OP
OP
OP
OP
OP
OP
OP
17/46
Noise blanker part TDA7407
Table 7. Noise blanker electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit
BLT = 00 TBD 38 TBD μs
T
Suppression pulse
S
duration
(6)
Signal HOLDN in
testmode
BLT = 10 TBD 32 TBD μs
BLT = 01 TBD 25.5 TBD μs
BLT = 00 TBD 22 TBD μs
(5)
NRD = 00
V
RECTADJ
Noise rectifier
discharge adjustment
(7)
Signal PEAK in
testmode
NRD = 01
NRD = 10
NRD = 11
SR
Noise rectifier charge
PEAK
Signal PEAK in
testmode
PCH = 0
PCH = 1
MPNB = 00
V
ADJMP
Noise rectifier
adjustment through
multipath
(9)
Signal PEAK in
testmode
MPNB = 01
MPNB = 10
MPNB = 11
1. All Thresholds are measured using a pulse with TR =2ms, THIGH = 2ms and TF = 10ms. The repetition
rate must not increase the PEAK voltage
2. NBT represents the Noiseblanker Byte bits D2, D0 for the noise blanker trigger threshold
3. NAT represents the Noiseblanker Byte bit pair D4, D3 for the noise controlled triggeradjustment
4. OVD represents the Noiseblanker Byte bit pair D7, D6 for the over deviation detector
5. FSC represents the Fieldstrength Byte bit pair D1, D0 for the fieldstrength control
6. BLT represents the Speaker RR Byte bit pair D7, D6 for the blanktime adjustment
7. NRD represents the Configuration Byte bit pair D1, D0 for the noise rectifier discharge adjustment
8. PCH represents the Stereo decoder Byte bit D5 for the noise rectifier charge current adjustment
9. MPNB represents the HighCut Byte bit D7 and the Fieldstrength Byte D7 for the noise rectifier multipath
adjustment
10. By design / characterization functionally guaranteed through dedicated test mode structure
(10)
(5)
(10)
(5)
(10)
(5)
(10)
(8) (10)
(8)
(10)
(9)
(10)
(9)
(10)
(9)
(10)
(9)
(10)
0.3
0.8
1.3
2.0
10
20
0.3
0.5
0.7
0.9
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
(10)
V/ms
V/ms
V/ms
V/ms
mV/μs
mV/μs
V/ms
V/ms
V/ms
V/ms
Figure 3. Vn timing diagram
V
IN
V
OP
DC
D97AU636
18/46
T
RTHIGH
T
F
Time
TDA7407 Noise blanker part
Figure 4. Trigger threshold vs.V
VTH
8 STEPS
65mV
30mV
PEAK
MIN. TRIG. THRESHOLD
0.9V
D97AU648
Figure 5. Deviation controlled trigger adjustment
V
PEAK
(V
)
OP
NOISE CONTROLLED
TRIG. THRESHOLD
1.5V
V
PEAK(V)
00
260mV(00)
220mV(01)
180mV(10)
140mV(11)
2.8
2.0
1.2
0.9
D97AU649
32.5 45 75
20
DETECTOR OFF (11)
Figure 6. Fieldstrength controlled trigger adjustment
V
PEAK
MONO STEREO
»3V
NOISE
noisy signal
D97AU650
ATC_SB OFF (11)
good signal
01
10
DEVIATION(KHz)
2.4V(00)
1.9V(01)
1.4V(10)
0.9V
E'
19/46
Multipath detector TDA7407
5 Multipath detector
● Internal 19kHz band pass filter
● Programmable band pass and rectifier gain
● two pin solution fully independent usable for external programming
● selectable internal influence on Stereoblend
Table 8. Multipath electrical characteristics
Symbol Parameter Test condition Min. Typ. Max. Unit
f
CMP
G
BPMP
G
RECTMP
Center frequency of
multipath-bandpass
Bandpass gain
Rectifier gain
stereo decoder locked on pilot tone 19 KHz
, D1 configuration byte = 00 6 dB
bits D
2
, D1 configuration byte = 10 12 dB
bits D
2
, D1 configuration byte = 01 16 dB
bits D
2
bits D
, D1 configuration byte = 11 18 dB
2
, D6 configuration byte = 00 7.6 dB
bits D
7
bits D
, D6 configuration byte = 01 4.6 dB
7
, D6 configuration byte = 10 0 dB
bits D
7
, D6 configuration byte = 11 off dB
bits D
7
bit D5 configuration byte = 0 0.5 μA
I
CHMP
I
DISMP
Table 9. Quality detector
Rectifier charge current
configuration byte = 1 1.0 μA
bit D
5
Rectifier discharge current 0.5 1 1.5 mA
Symbol Parameter Test Condition Min. Typ. Max. Unit
A Multipath Influence factor Addr. 12 / Bit 5+6
B Noise influence factor Addr. 16 / Bit 1+2
00
01
10
11
00
01
10
11
0.7
0.85
1.00
1.15
15
12
9
6
dB
dB
dB
dB
dB
dB
dB
dB
20/46
TDA7407 Multipath detector
5.1 Description of the audioprocessor part
5.1.1 Input multiplexer
● CD quasi differential
● Cassette stereo
● Phone differential
● AM mono
● Stereo decoder input.
5.1.2 Input stages
Most of the input stages have remained the same as in preceeding ST audioprocessors with
the exception of the CD inputs (see Figure 7). In the meantime there are some CD players
on the market having a significant high source impedance which strongly affects the
common mode rejection of the normal differential input stage. The additional buffer of the
CD input avoids this drawback and offers the full common mode rejection even with those
CD players.
The output of the CD stage is permanently available of the CD out-pins
5.1.3 AutoZero
In order to reduce the number of pins, there is no AC coupling between the In-Gain and the
following stage, so that any offset generated by or before the In-Gain stage would be
transferred or even amplified to the output. To avoid that effect a special offset cancellation
stage called AutoZero is implemented.
This stage is located before the volume block to eliminate all offsets generated by the stereo
decoder, the input stage and the In-Gain (please notice that externally generated offsets,
e.g. generated through the leakage current of the coupling capacitors, are not cancelled).
Auto-zeroing is started every time the DATA-BYTE 0 is selected and takes a time of max.
0.3ms. To avoid audible clicks the audioprocessor is muted before the volume stage during
this time.
5.1.4 AutoZero remain
In some cases, for example if the μP is executing a refresh cycle of the I2C bus
programming, it is not useful to start a new AutoZero action because no new source is
selected and an undesired mute would appear at the outputs. For such applications the
TDA7407 could be switched in the "Auto Zero Remain mode" (Bit 6 of the subaddress byte).
If this bit is set to high, the DATABYTE 0 could be loaded without invoking the AutoZero and
the old adjustment value remains.
5.1.5 Multiplexer output
The output signal of the input multiplexer is available at separate pins (please see the block
diagram). This signal represents the input signal amplifier by the In-Gain stage and is also
going into the mixer stage.
21/46
Multipath detector TDA7407
5.1.6 Softmute
The digitally controlled softmute stage allows muting/demuting the signal with a I2C bus
programmable slope. The mute process can either be activated by the softmute pin or by the
2
I
C bus. The slope is realized in a special S shaped curve to mute slow in the critical
regions.
Figure 7. Input stages
CD+
PHONE+
PHONE-
CASSETTE
CD-
100K
1
1
100K
100K
15K 15K
+
-
15K 15K
27K 28K
+
-
27K 28K
CD OUT
IN GAIN
AM
MPX
100K
100K
STEREO DECODER
D98AU854A
Figure 8. Softmute timing
1
EXT.
MUTE
+SIGNAL
REF
-SIGNAL
1
2
I
C BUS
OUT
D97AU634
Time
Note: Please notice that a started Mute action is always terminated and could not be interrupted
by a change of the mute signal.
For timing purposes the Bit 3 of the I
2
C bus output register is set to 1 from the start of muting
until the end of demuting.
5.1.7 BASS
There are four parameters programmable in the bass stage: (see figs 9, 10, 11, 12):
22/46
TDA7407 Multipath detector
5.1.8 Attenuation (80Hz)
Figure 9 shows the attenuation as a function of frequency at a center frequency of 80Hz.
5.1.9 Center frequency (60, 70, 80, 100Hz)
Figure 10 shows the four possible center frequencies 60,70,80 and 100Hz.
5.1.10 Quality factors (1, 1.25, 1.5, 2)
Figure 11 shows the four possible quality factors 1, 1.25, 1.5 and 2.
5.1.11 DC mode
In this mode the DC gain is increased by 5.1dB. In addition the programmed center
frequency and quality factor is decreased by 25%, which can be used to reach alternative
center frequencies or quality factors. (see Figure 12)
5.1.12 MID
There are 3 parameters programmable in the mid stage (see figures13, 14 and 15)
5.1.13 Attenuation (1kHz)
Figure 13 shows the attenuation as a function of frequency at a center frequency of 1kHz.
5.1.14 Center frequency (500, 1k, 1.5k, 2k Hz)
Figure 14 shows the four possible center frequencies 500Hz, 1kHz, 1.5kHz and 2kHz.
5.1.15 Quality factor (2 at 1kHz)
Figure 15 shows the two possible quality factors 1 and 2 at a center frequency of 1kHz.
5.1.16 Treble
There are two parameters programmable in the treble stage (see figures 16, and17):
5.1.17 Attenuation (17.5kHz)
Figure 16 shows the attenuation as a function of frequency at a center frequency of
17.5KHz.
5.1.18 Center frequency (10, 12.5, 15, 17.5kHz)
Figure 17 shows the four possible Center Frequency (10, 12.5, 15 and 17.5kHz).
5.1.19 AC coupling
In some applications additional signal manipulations are desired, for example surround
sound or more band equalizing. For this purpose AC Coupling is placed before the speaker
attenuators, which can be activated or internally shorted by Bit7 in the Bass/Treble
configuration byte. In short condition the input signal of the speaker attenuator is available at
23/46
Multipath detector TDA7407
AC Outputs and the AC Input could be used as additional stereo inputs. The input
impedance of the AC Inputs is always 50KΩ.
5.1.20 Speaker Attenuator
The speaker attenuators have exactely the same structure and range like the volume stage.
Figure 9. Bass control @ fc = 80Hz, Q = 1 Figure 10. Bass center @ Gain = 14dB, Q =1
15.0
10.0
5.0
0.0
-5.0
-10.0
-15.0
10.0 100. 0 1. 0K 10. 0K
Figure 11. Bass quality factors @ Gain =14dB,
fc = 80Hz
15.0
12.5
10.0
7.5
5.0
2.5
0.0
10.0 100. 0 1.0K 10.0K
15.0
12.5
10.0
7.5
5.0
2.5
0.0
10.0 100.0 1.0K 10. 0K
Figure 12. Bass normal and DC mode @ Gain
= 14dB, fc = 80Hz
15.0
12.5
10.0
7.5
5.0
2.5
0.0
10.0 100.0 1. 0K 10.0K
Note: In general the center frequen cy, Q and DC-mode c an be set
independently. The ex ception from this rule is the mode ( 5/xx1111xx)
where the center frequency is set to 150Hz instead of 100Hz.
24/46
TDA7407 Multipath detector
Figure 13. Mid control @ fc=1kHz, Q=1 Figure 14. Mid center frequency @
Gain=14dB, Q1
15.0
10.0
5.0
0.0
-5.0
-10.0
-15.0
10.0 100.0 1.0K 10.0K
Figure 15. Mid Q factor @ fc=1kHz,
15.0
12.5
10.0
7.5
5.0
2.5
0.0
10.0 100.0 1.0K 10. 0K
Figure 16. Treble control @ fc = 17.5KHz
Gain=14dB
15.0
12.5
15.0
10.0
10.0
7.5
5.0
2.5
0.0
10.0 100. 0 1.0K 10 .0K
Figure 17. Treble center frequencies@
Gain = 14dB
5.0
0.0
-5.0
-10. 0
-15. 0
10. 0 100.0 1. 0K 10. 0K
25/46
Multipath detector TDA7407
5.2 Functional description of the stereo decoder
The stereo decoder part of the TDA7407 (see Figure 18) contains all functions necessary to
demodulate the MPX signal like pilot tone dependent MONO/STEREO switching as well as
"stereoblend" and "highcut" functions.
5.2.1 Stereo decoder Mute
The TDA7407 has a fast and easy to control RDS mute function which is a combination of
the audioprocessor's softmute and the high ohmic mute of the stereo decoder. If the stereo
decoder is selected and a softmute command is sent (or activated through the SM pin), the
stereo decoder will be set automatically to the high ohmic mute condition after the audio
signal has been softmuted.
Hence a checking of alternate frequencies could be performed. To release the system from
the mute condition, the unmute command must be sent: the stereo decoder is unmuted
immediately and the audioprocessor is softly unmuted. Figure 19 shows the output signal
VO as well as the internal stereo decoder mute signal. This influence of Softmute on the
stereo decoder mute can be switched off by setting bit 3 of the Softmute byte to "0". A stereo
decoder mute command (bit 0, stereo decoder byte set to "1") will set the stereo decoder in
any case independently to the high ohmic mute state.
Figure 18. Block diagram of the stereo decoder
26/46
TDA7407 Multipath detector
Figure 19. Signals during stereo decoder's softmute
SOFTMUTE
COMMAND
t
STD MUTE
t
V
O
Figure 20. Internal Stereoblend characteristics
If any other source than the stereo decoder is selected the decoder remains muted and the
MPX pin is connected to Vref to avoid any discharge of the coupling capacitor through
leakage currents.
5.2.2 Ingain + Infilter
The Ingain stage allows to adjust the MPX signal to a magnitude of about 1Vrms internally
which is the recommended value. The 4th order input filter has a corner frequency of 80KHz
and is used to attenuate spikes and nose and acts as an anti allasing filter for the following
switch capacitor filters.
CS [dB]
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
012
LEVELINTERN [V]
D97AU638
345
t
5.2.3 Demodulator
In the demodulator block the left and the right channel are separated from the MPX signal.
In this stage also the 19 kHz pilot tone is cancelled. For reaching a high channel separation
the TDA7407 offers an I
compensate the lowpass behaviour of the tuner section. If the tuner attenuation at 38kHz is
in a range from 4.2% to 31.0% the TDA7407 needs no external network in front of the MPX
pin. Within this range an adjustment to obtain at least 40dB channel separation is possible.
The bits for this adjustment are located together with the fieldstrength adjustment in one
byte. This gives the possibility to perform an optimization step during the production of the
car radio where the channel separation and the fieldstrength control are trimmed.
2
C bus programmable roll-off adjustment which is able to
27/46
Multipath detector TDA7407
5.2.4 De-emphasis and Highcut.
The lowpass filter for the de-emphasis allows to choose between a time constant of 50μs
and 75μs (bit D7, stereo decoder byte).
The highcut control range will be in both cases τ
range (between VHCH and VHCL) the LEVEL signal is converted into a 5 bit word which
controls the lowpass time constant between τ
remain always 5 bits independently of the absolute voltage range between the VHCH and
VHCL values.
The highcut function can be switched off by I
5.2.5 PLL and pilot tone detector
The PLL has the task to lock on the 19kHz pilotone during a stereo transmission to allow a
correct demodulation. The included detector enables the demodulation if the pilot tone
reaches the selected pilot tone threshold V
detector output (signal STEREO, see block diagram) can be checked by reading the status
byte of the TDA7407 via I
2
C bus.
5.2.6 Field strength control
The fieldstrength input is used to control the high cut and the stereoblend function. In
addition the signal can be also used to control the noiseblanker thresholds and as input for
the multipath detector.
Figure 21. Relation between internal and external LEVEL voltage and setup of
stereoblend
INTERNAL
VOLTAGES
REF 5V
SETUP OF VST
LEVEL INTERN
= 2 · τ
HC
...3 · τ
Deemp
2
C bus (bit D7, fieldstrength byte set to "0").
. Two different thresholds are available. The
PTHST
INTERNAL
VOLTAGES
REF 5V
. Inside the highcut control
Deemp
. There by the resolution will
Deemp
SETUP OF VMO
LEVEL INTERN
LEVEL
VSBL
VSTVMO
t
FIELDSTRENGHT VOLTAGE
Figure 22. High cut characteristics
LOWPASS
TIME CONSTANT
3•τ
Deemp
τ
Deemp
28/46
VSBL
D97AU640
58%
50%
42%
33%
D97AU639
VMO
FIELDSTRENGHTVHCHVHCL
VST
t
FIELDSTRENGHT VOLTAGE
TDA7407 Multipath detector
5.2.7 LEVEL Input and Gain
To suppress undesired high frequency modulation on the highcut and stereoblend function
the LEVEL signal is lowpass filtered firstly.
The filter is a combination of a 1st order RC lowpass at 53kHz (working as anti-aliasing
filter) and a 1st-order switched capacitor lowpass at 2.2kHz. The second stage is a
programmable gain stage to adapt the LEVEL signal internally to different IF device (see
Testmode section 5 LEVELINTERN).
The gain is widely programmable in 16 steps from 0dB to 10dB (step = 0.67dB). These 4
bits are located together with the roll off bits in the "Stereo decoder adjustment" byte to
simplify a possible adaptation during the production of the car radio.
5.2.8 Stereoblend control
The stereoblend control block converts the internal LEVEL voltage (LEVEL INTERN) into an
demodulator compatible analog signal which is used to control the channel separation
between 0dB and the maximum separation. Internally this control range has a fixed upper
limit which is the internal reference voltage REF5V. The lower limit can be programmed
between 29.2% and 58%, of REF5V in 4.167% steps (see Figure 21).
To adjust the external LEVEL voltage to the internal range two values must be defined: the
LEVEL gain LG and VSBL (see Figure 21). To adjust the voltage where the full channel
separation is reached (VST) the LEVEL gain LG has to be defined. The following equation
can be used to estimate the gain:
L
-------------------------------------------------------------------------------------- -=
G
Field strenght voltage [STEREO]
REF5V
The gain can be programmed through 4 bits in the "Stereo Decoder Adjustment" byte.
The MONO voltage VMO (0dB channel separation) can be choosen selecting VSBLAll
necessary internal reference voltages like REF5V are derived from a bandgap circuit.
Therefore they have a temperature coefficient near zero. This is useful if the fieldstrength
signal is also temperature compensated.
But most IF devices apply a LEVEL voltage with a TC of 3300ppm. The TDA7407 offers this
TC for the reference voltages, too. The TC is selectable with bit D7 of the "stereo decoder
adjustment" byte.
5.2.9 Highcut control
The highcut control setup is similar to the stereoblend control setup: the starting point VHCH
can be set with 2 bits to be 42, 50, 58 or 66% of REF5V whereas the range can be set to be
17, 22, 28 or 33% of VHCH (Figure 22).
5.2.10 Functional description of the noiseblanker
In the automotive environment the MPX signal is disturbed by spikes produced by the
ignition, for example; the wiper motor. The aim of the noiseblanker part is to cancel the
audible influence of the spikes.
Therefore the output of the stereo decoder is held at the actual voltage for a time between
22 and 38μs (programmable).
29/46
Multipath detector TDA7407
The block diagram of the noiseblanker is given in Figure 23.
In the first stage the spikes must be detected but to avoid wrong triggering on high
frequency (white) noise, a complex trigger control is implemented. Behind the trigger stage
a pulse former generates the "blanking" pulse. To avoid any crosstalk to the signal path the
noiseblanker is supplied by his own biasing circuit.
5.2.11 Trigger path
The incoming MPX signal is highpass filtered, amplified and rectified. This second order
highpass filter has a corner frequency of 140kHz.
The rectified signal, RECT, is lowpass filtered to generate a signal called PEAK. Also noise
with a frequency 140kHz increases the PEAK voltage. The resulting voltage can be adjusted
by use of the noise rectifier discharge current.
The PEAK voltage is fed to a threshold generator, which adds to the PEAK voltage a DC
dependent threshold VTH. Both signals, RECT and PEAK+VTH are fed to a comparator
which triggers a re-triggerable monoflop. The monoflop's output activates the sample and
hold circuits in the signal path for selected duration.
Figure 23. Block Diagram of the Noiseblanker
MPX
MPX
RECTIFIER
LOWPASS
CONTROL
D98AU856
RECT
+
-
VTH
+
PEAK
+
MONOFLOP HOLDN
THRESHOLD
GENERATOR
ADDITIONAL
THRESHOLD
CONTROL
5.2.12 Automatic noise controlled threshold adjustment (ATC)
There are mainly two independent possibilities for programming the trigger threshold:
a) the low threshold in 8 steps (bits D0 to D2 of the noiseblanker byte)
b) the noise adjusted threshold in 4 steps (bits D3 and D4 of the noiseblanker byte,
see Figure 23).
The low threshold is active in combination with a good MPX signal without any noise; the
PEAK voltage is less than 1V. The sensitivity in this operation is high.
If the MPX signal is noisy the PEAK voltage increases due to the higher noise, which is also
rectified. With increasing of the PEAK voltage the trigger threshold increases, too. This
particular gain is programmable in 4 steps.
30/46
TDA7407 Multipath detector
5.3 Automatic threshold control mechanism
5.3.1 Automatic threshold control by the stereoblend voltage
Besides the noise controlled threshold adjustment there is an additional possibility for
influencing the trigger threshold. It is depending on the stereoblend control.
The point where the MPX signal starts to become noisy is fixed by the RF part. Therefore
also the starting point of the normal noise-controlled trigger adjustment is fixed. In some
cases the behaviour of the noiseblanker can be improved by increasing the threshold even
in a region of higher fieldstrength.
Sometimes a wrong triggering occures for the MPX signal often shows distortion in this
range which can be avoided even if using a low threshold. Because of the overlap of this
range and the range of the stereo/mono transition it can be controlled by stereoblend.
This threshold increase is programmable in 3 steps or switched off with bits D0 and D1 of
the fieldstrength control byte.
5.3.2 Over deviation detector
If the system is tuned to stations with a high deviation the noiseblanker can trigger on the
higher frequencies of the modulation. To avoid this wrong behaviour, which causes noise in
the output signal, the noiseblanker offers a deviation dependent threshold adjustment.
By rectifying the MPX signal a further signal representing the actual deviation is obtained. It
is used to increase the PEAK voltage. Offset and gain of this circuit are programmable in 3
steps with the bits D6 and D7 of the stereo decoder byte (the first step turns off the detector,
see fig. 18).
5.4 Functional description of the multipath detector
Using the internal multipath detector the audible effects of a multipath condition can be
minimized. A multipath condition is detected by rectifying the 19kHz spectrum in the
fieldstrength signal.An external capacitor is used to define the attack and decay times (see
block diagram Figure 24). the MPOUT pin is used as detector output connected to a
capacitor of about 47nF and additionally the MPIN pin is selected to be the fieldstrength
input.
Using the configuration, an external user requirement adaptation is given in Figure 24.
To keep the old value of the Multipath Detector during an AF-jump, the external capacitor
can be disconnected by the MP Hold switch. This switch can be controlled directly by the
AFS Pin.
Selecting the "internal influence" in the configuration byte, the channel separation is
automatically reduced during a multipath condition according to the voltage appearing at the
MP_OUT pin. A possible application is shown in Figure 24.
31/46
Multipath detector TDA7407
Figure 24. Block diagram of the multipath detector
5.4.1 Programming
To obtain a good multipath performance an adaptation is necessary. Therefore the gain of
the 19kHz bandpass is programmable in four steps as well as the rectifier gain. The attack
and decay times can be set by the external capacitor value.
5.4.2 Quality detector
The TDA7407 offers a quality detector output which gives a voltage representing the FM
reception conditions. To calculate this voltage the MPX noise and the multipath detector
output are summed according to the following formula:
Quality = 1.6 (V
The noise signal is the PEAK signal without additional influences. The factor "a" can be
programmed from 0.7 to 1.15. the output is a low impedance output able to drive external
circuitry as well as simply fed to an A/D converter for RDS applications.
-0.8V)+ a (REF5V - V
noise
MPOUT
)
5.4.3 AF Search Control
The TDA7407 is supplied with several functionality to support AF checks using the stereo
decoder. As mentioned already before the high ohmic mute feature avoids any clicks during
the jump condition. It is possible at the same time, to evaluate the noise and multipath
content of the alternate frequency, by using the quality detector output. Therefore the
multipath detector is switched automatically to a small time constant. No additional pin
(AFS) is implemented in order to separate the audioprocessor mute and stereo decoder AF
functions. In Figure 25 the block diagram and control functions of the complete AFS
functionality is shown (please note that the pins AFS and SM are active low as well as all
control bits indicated by an overbar).
5.5 Test mode
During the test mode, which can be activated by setting bit D0 of the testing byte and bit D5
of the subaddress byte to "1", several internal signals are available at the CASSR pin.
During this mode the input resistor of 100kOhm is disconnected from the pin. The internal
signals available are shown in the software specification.
32/46
TDA7407 Multipath detector
Figure 25. Mute control logic
33/46
I2C Bus interface description TDA7407
6 I2C Bus interface description
6.1 Interface protocol
The interface protocol comprises:
– a start condition (S)
– a chip address byte (the LSB bit determines read / write transmission)
– a subaddress byte
– a sequence of data (N-bytes + acknowledge)
– a stop condition (P
Table 10. Addresses
Chip address Subaddress Data 1 to data n
MSB LSB MSB LSB MSB LSB
S 1 000110R/WACKXAZTIA3A2A1A0ACK DATA ACKP
D97AU627
S = Start
ACK = Acknowledge
AZ = AutoZero Remain
T = Testing
I = Auto increment
P = Stop
Max clock speed 500kbits/s
The transmitted data is automatically updated after each ACK. Transmission can be
repeated without new chip address.
6.2 Auto increment
If bit I in the subaddress byte is set to "1", the autoincrement of the subaddress is enabled.
Table 11. Transmitted data (send mode)
MSB LSB
XXXXSTSMXX
SM = Soft mute activated
ST = Stereo
X = Not Used
34/46
TDA7407 I2C Bus interface description
Table 12. Subaddress (receive mode)
MSB LSB Function
I3 I2 I1 I0 A3 A2 A1 A0
AutoZero Remain
0
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
off
on
Testmode
off
on
Auto Increment Mode
off
on
0
Input Multiplexer
1
Volume
0
Tr eb l e
1
Bass
0
Speaker attenuator LF
1
Speaker attenuator RF
0
Speaker attenuator LR
1
Speaker attenuator RR
0
Soft Mute / Bass Prog.
1
Stereo Decoder
0
Noiseblanker
1
High Cut Control
0
Fieldstrength & Quality
1
Configuration
0
EEPROM
1
Testing
0
New Quality/Control
1
Middle Filter
35/46
Data byte specification TDA7407
7 Data byte specification
After power on reset all register are set to 11111110
Table 13. Input selector (subaddress 0H)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
Source selector
0
0
0
CD
0
0
1
Cassette
0
1
0
Phone
0
1
1
AM
1
0
0
Stereo Decoder
1
0
1
AC Inputs Front
1
1
0
Mute
1
1
1
AC inputs Rear
In-Gain
0
0
0
0
0
0
0
1
:
:
:
:
1
1
1
0
1
1
1
1
0
1
Table 14. Volume and speaker attenuation (subaddress 1H, 4H, 5H, 6H, 7H)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
1
0
0
1
1
1
1
:
:
:
:
:
:
:
1
0
0
1
0
0
0
1
0
0
1
0
0
0
1
0
0
0
1
1
1
:
:
:
:
:
:
:
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
0
0
0
0
1
0
0
0
1
0
:
:
:
:
:
0
1
0
0
1
0
1
0
0
1
0
0
0
0
0
0
0
0
:
:
1
1
0
0
:
:
1
1
1
1
X1 1XXXXXMute
15dB
14dB
:
1 dB
0 dB
Coupl. front speaker
external
internal
1
:
not used configurations
1
0
1
+15dB
:
:
1
+1dB
0
0dB
0
0dB
1
-1dB
:
:
1
-15dB
0
-16dB
:
:
0
-78dB
1
-79dB
36/46
TDA7407 Data byte specification
Table 15. Treble filter (subaddress 2H)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
Treble steps
0
0
0
0
0
-15dB
0
0
0
0
1
-14dB
:
:
:
:
:
:
0
1
1
1
0
-1dB
0
1
1
1
1
0dB
1
1
1
1
1
0dB
1
1
1
1
0
+1dB
:
:
:
:
:
:
1
0
0
0
1
+14dB
1
0
0
0
0
+15dB
Treble center frequency
0
0
0
1
1
0
1
1
0
1
Table 16. Bass filter (subaddress 3H)
10.0KHz
12.5KHz
15.0KHz
17.5KHz
Coupl. rear speaker
external (AC)
internal
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
Bass Steps
0
0
0
0
0
-15dB
0
0
0
0
1
-14dB
:
:
:
:
:
:
0
1
1
1
0
-1dB
0
1
1
1
1
0dB
1
1
1
1
1
0dB
1
1
1
1
0
+1dB
:
:
:
:
:
:
1
0
0
0
1
+14dB
1
0
0
0
0
+15dB
Bass Q factor
0
0
0
1
1
0
1
1
1.0
1.25
1.50
2.0
Bass DC mode
0
1
off
on
37/46
Data byte specification TDA7407
Table 17. Soft mute and bass programming (subaddress 8H)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
Mute
Enable Soft Mute
Disable Soft Mute
Mutetime = 0.48ms
0
0
0
Mutetime = 0.96ms
0
1
1
Mutetime = 40.4ms
1
0
0
1
1
1
0
0
0
1
1
0
1
1
1
1
0
0
0
1
1
0
1
1
Mutetime = 324ms
Stereo decoder Soft Mute Influence = on
Stereo decoder Soft Mute Influence = off
Bass center frequency
Center Frequency = 60 Hz
Center Frequency = 70 Hz
Center Frequency = 80 Hz
Center Frequency = 100Hz
Center Frequency = 150Hz
Noise blanker time
38ms
25.5ms
32ms
22ms
1 Only for Bass Q-Factor = 2.0
Table 18. Stereo decoder (subaddress 9H)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
01STD Unmuted
STD Muted
0
0
0
1
1
0
1
1
0
1
0
1
0
1
0
1
0
1
In Gain 11dB
In Gain 8.5dB
In Gain 6dB
In Gain 3.5dB
Stereo decoder = on
Stereo decoder = off
Forced Mono
Mono/Stereo switch automatically
Noiseblanker PEAK charge current low
Noiseblanker PEAK charge current high
Pilot Threshold HIGH
Pilot Threshold LOW
De-emphasis 50μs
De-emphasis 75μs
38/46
TDA7407 Data byte specification
Table 19. Noiseblanker (subaddress AH)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
Low Threshold 65mV
0
0
1
Low Threshold 60mV
0
1
0
Low Threshold 55mV
0
1
1
Low Threshold 50mV
1
0
0
Low Threshold 45mV
1
0
1
Low Threshold 40mV
1
1
0
Low Threshold 35mV
1
1
1
Low Threshold 30mV
0
0
0
1
1
0
1
1
Noise Controlled Threshold 320mV
Noise Controlled Threshold 260mV
Noise Controlled Threshold 200mV
Noise Controlled Threshold 140mV
0
1
0
0
0
1
1
0
1
1
Table 20. High Cut (subaddress BH)
Noise blanker OFF
Noise blanker ON
Over deviation Adjust 2.8V
Over deviation Adjust 2.0V
Over deviation Adjust 1.2V
Over deviation Detector OFF
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
01High Cut OFF
High Cut ON
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
Max. High Cut 2dB
Max. High Cut 5dB
Max. High Cut 7dB
Max. High Cut 10dB
VHCH at 42% REF 5V
VHCH at 50% REF 5V
VHCH at 58% REF 5V
VHCH at 66% REF 5V
VHCL at 16.7% VHCH
VHCL at 22.2% VHCH
VHCL at 27.8% VHCH
VHCL at 33.3% VHCH
Strong Multipath influence on PEAK 18K
0
1
OFF
ON (18K Discharge if VMPOUT <2.5V)
39/46
Data byte specification TDA7407
Table 21. Field strength Control (subaddress CH)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
VSBL at 29% REF 5V
0
0
1
VSBL at 33% REF 5V
0
1
0
VSBL at 38% REF 5V
0
1
1
VSBL at 42% REF 5V
1
0
0
VSBL at 46% REF 5V
1
0
1
VSBL at 50% REF 5V
1
1
0
VSBL at 54% REF 5V
1
1
1
VSBL at 58% REF 5V
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
1
Table 22. Configuration (subaddress DH)
MSB LSB Function
Noiseblanker Field strength Adj 2.3V
Noiseblanker Field strength Adj 1.8V
Noiseblanker Field strength Adj 1.3V
Noiseblanker Field strength Adj OFF
Quality Detector Coefficient a = 0.7
Quality Detector Coefficient a = 0.85
Quality Detector Coefficient a = 1.0
Quality Detector Coefficient a = 1.15
Multipath off influence on PEAK discharge
-1V/ms (at MPout = 2.5V
D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
1
1
0
1
1
0
0
1
0
0
1
1
1
0
1
0
1
0
0
0
1
1
0
1
1
Noise Rectifier Discharge Resistor
R = infinite
R = 56kΩ
R = 33kΩ
R =18kΩ
Multipath Detector Bandpass Gain
6dB
12dB
16dB
18dB
Multipath Detector internal influence
ON
OFF
Multipath Detector Charge Current 0.5μA
Multipath Detector Charge Current 1μA
Multipath Detector Reflection Gain
Gain = 7.6dB
Gain = 4.6dB
Gain = 0dB
disabled
40/46
TDA7407 Data byte specification
Table 23. Stereo decoder adjustment (subaddress EH)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
Roll Off Compensation
0
0
0
:
0
:
0
1
1
1
:
1
:
1
0
0
0
0
0
0
0
0
1
:
:
:
1
1
1
Table 24. Testing (subaddress FH)
0
0
0
not allowed
0
0
1
7.2%
0
1
0
9.4%
:
:
:
:
1
0
0
13.7%
:
:
:
:
1
1
1
20.2%
0
0
0
not allowed
0
0
1
19.6%
0
1
0
21.5%
:
:
:
:
1
0
0
25.3%
:
:
:
:
1
1
1
31.0%
Level Gain
0
1
0
:
1
0dB
0.66dB
1.33dB
:
10dB
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
Stereo decoder test signals
OFF
0
Test signals enabled if bit D5 of the
1
subaddress (test mode bit) is set to "1", too
0
1
External Clock
Internal Clock
41/46
Data byte specification TDA7407
Table 24. Testing (subaddress FH) (continued)
MSB LSB Function
Testsignals at CASS_R
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
VHCCH
Level intern
Pilot magnitude
VCOCON; VCO Control Voltage
Pilot threshold
HOLDN
NB threshold
F228
VHCCL
VSBL
not used
not used
PEAK
not used
REF5V
not used
VCO
0
1
OFF
ON
Audioprocessor test mode
0
enabled if bit D5 of the subaddress(test
mode bit) is set to "1"
1
OFF
Note: This byte is used for testing or evaluation purposes only and must not be set to other values
than the default "11111110" in the application!
Table 25. New quality / control (subaddress 10H)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
Reference generation
0
Internal Reference-Divider
1
External Reference Force
Quality Noise Gain
0
0
0
1
1
0
1
1
15dB
12dB
9dB
6dB
0
1
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SC Clock Mode
Fast Mode
Normal Mode
TDA7407 Data byte specification
Table 25. New quality / control (subaddress 10H) (continued)
MSB LSB Function
Auto Zero
0
1
0
1
Off
On
Smoothing Filter
On
Off
0
1
Enable AF Pin
Enable Pin
Disable Pin
0
1
AF Pin ST Decoder Mute Influence
On
Off
Table 26. Mid filter (subaddress 11H)
MSB LSB Function
D7 D6 D5 D4 D3 D2 D1 D0
Attenuation
0
0
0
0
0
-15dB
0
0
1
1
1
-14dB
:
:
:
:
:
:
0
1
1
1
0
-1dB
0
1
1
1
1
0dB
1
1
1
1
1
0dB
1
1
1
1
0
+1dB
:
:
:
:
:
:
1
0
0
0
1
+14dB
1
0
0
0
0
+15dB
Middle Center frequency
0
0
0
1
1
0
1
1
500Hz
1.0kHz
1.5kHz
2.0kHz
01 Mid Q Factor 1.02.0
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Package information TDA7407
8 Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
DIM.
A 1.60 0.063
A1 0.05 0.15 0.002 0.006
A2 1.35 1.40 1.45 0.053 0.055 0.057
B 0.30 0.37 0.45 0.012 0.015 0.018
C 0.09 0.20 0.004 0.008
D 11.80 12.00 12.20 0.464 0.472 0.480
D1 9.80 10.00 10.20 0.386 0.394 0.401
D3 8.00 0.315
E 11.80 12.00 12.20 0.464 0.472 0.480
E1 9.80 10.00 10.20 0.386 0.394 0.401
E3 8.00 0.315
e0.80 0.031
L 0.45 0.60 0.75 0.018 0.024 0.030
L1 1.00 0.039
k 0˚(min.), 3.5˚(typ.), 7˚(max.)
ccc 0.10 0.0039
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
OUTLINE AND
MECHANICAL DATA
LQFP44 (10 x 10 x 1.4mm)
44/46
0076922 E
TDA7407 Revision history
9 Revision history
Table 27. Document revision history
Date Revision Changes
04-Oct-2004 1 Initial release.
01-Apr-2005 2 Style sheet changed to comply with corporate guidelines.
22-Jan-06 3 Package change, layout changes, text modifications.
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TDA7407
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