ST MICROELECTRONICS TDA 7293 Datasheet

®
TDA7293
120V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY
VERY HIG H OPERATI NG VOLTAGE R ANGE (±50V)
DMOS POWER STAGE HIGH OUTPUT POWER (100W @ THD =
L
= 8Ω, VS = ±40V) MUTING/STAND- BY FUNC TION S NO SWITCH ON/OFF NOISE VERY LOW DISTORTION VERY LOW NOISE SHORT CIRCUIT PROTECTED (WITH NO IN-
PUT SIGNAL APPLIED) THERMAL SHUTDOWN CLIP DETECTOR MODULARITY (MORE DEVICES CAN BE
EASILY CONNECTED IN PARALLEL TO DRIVE VERY LOW IMPEDANCES)
DESCRIPTION
The TDA7293 is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications (Home Stereo, self powered loudspeakers, Top-
Figure 1: Typical Application and Test Circuit
MULTIPOWER BCD TECHNOLOGY
Multiwatt15
ORDERING NUMBER:
TDA7293V
class TV). Thanks to the wide voltage range and to the high out current c apability it is able to sup­ply the highest power into both 4Ω and 8Ω loads.
The built in muting function with turn on delay simplifies the remote operation avoiding switching on-off noises. Parallel mode is made possible by connecting more device through of pin11. High out put power can be delivered to very low impedance loads, so optimizing the thermal dissipation of the system.
VMUTE
VSTBY
October 2002
R3 22K
C2
R2
22µF
680
C1 470nF
R1 22K
R5 10K
R4 22K
C3 10µF C4 10µF
IN- 2
IN+
3
4
SGND (**)
10
MUTE
9
STBY
(*) see Application note (**) for SLAVE function
C7 100nF C6 1000µF
BUFFER DRIVER
11
713
-
+
MUTE
STBY
1 STBY-GND
THERMAL
SHUTDOWN
-Vs -PWVs
C9 100nF C8 1000µF
-Vs
+Vs
+PWVs+Vs
S/C
PROTECTION
158
14
12
6 5
D97AU805A
OUT
BOOT LOADER
C5
22µF
BOOTSTRAP
CLIP DET
(*)
VCLIP
1/14
TDA7293
PIN CONNECTION (Top view)
-VS (POWER) OUT +V
(POWER)
S
BOOTSTRAP LOADER BUFFER DRIVER MUTE STAND-BY
-V
(SIGNAL)
S
+V
(SIGNAL)
S
BOOTSTRAP CLIP AND SHORT CIRCUIT DETECTOR SIGNAL GROUND NON INVERTING INPUT INVERTING INPUT STAND-BY GND
TAB CONNECTED TO PIN 8
15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
D97AU806
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
S
V
1
V
2
- V
V
2
V
3
V
4
V
5
V
6
V
9
V
10
V
11
V
12
I
O
P
tot
T
op
, T
T
stg
Supply Voltage (No Signal) V
STAND-BY
GND Voltage Referred to -VS (pin 8) 90 V Input Voltage (inverting) Referred to -VS 90 V Maximum Differential Inputs
3
Input Voltage (non inverting) Referred to -VS 90 V Signal GND Voltage Referred to -VS 90 V Clip Detector Voltage Referred to -VS 120 V Bootstrap Voltage Referred to -VS 120 V Stand-by Voltage Referred to -VS 120 V Mute Voltage Referred to -VS 120 V Buffer Voltage Referred to -VS 120 V Bootstrap Loader Voltage Referred to -VS 100 V Output Peak Current 10 A Power Dissipation T
= 70°C50W
case
Operating Ambient Temperature Range 0 to 70 Storage and Junction Temperature 150
j
60 V
±
30 V
±
C
°
C
°
THERMAL DATA
Symbol Description
Thermal Resistance Junction-case 1 1.5
2/14
R
th j-case
Typ
Max Unit
C/W
°
TDA7293
ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit V
T
= 25°C, f = 1 kHz; unless otherwise specified).
amb
= ±40V, RL = 8, Rg = 50 ;
S
Symbol Parameter Test Condition Min. Typ. Max. Unit
V
I I
V
I
OS
P
Supply Range
S
Quiescent Current 50 100 mA
q
Input Bias Current 0.3 1
b
Input Offset Voltage -10 10 mV
OS
Input Offset Current 0.2 RMS Continuous Output Power d = 1%:
O
R
= 4
VS = ± 29V,
Ω;
L
d = 10%
= 4Ω ; VS = ±29V
R
L
d Total Harmonic Distortion (**) PO = 5W; f = 1kHz
P
= 0.1 to 50W; f = 20Hz to 15kHz
O
I
SC
Current Limiter Threshold VS ≤ ± 40V 6.5 A
12
±
75 80
90 100
100
0.005
80
50 V
±
0.1
SR Slew Rate 5 10 V/µs
G G e
R
SVR Supply Voltage Rejection f = 100Hz; V
T
Open Loop Voltage Gain 80 dB
V
Closed Loop Voltage Gain (1) 29 30 31 dB
V
Total Input Noise A = curve
N
f = 20Hz to 20kHz
Input Resistance 100 k
i
= 0.5Vrms 75 dB
ripple
Thermal Protection DEVICE MUTED 150
S
1 310
DEVICE SHUT DOWN 160
STAND-BY FUNCTION
V V
ATT
I
q st-by
ST on ST off
Stand-by on Threshold 1.5 V Stand-by off Threshold 3.5 V Stand-by Attenuation 70 90 dB
st-by
Quiescent Current @ Stand-by 0.5 1 mA
MUTE FUNCTION
V V
ATT
Mon Moff
Mute on Threshold 1.5 V Mute off Threshold 3.5 V Mute AttenuatIon 60 80 dB
mute
(Ref: to pin 1)
(Ref: to pin 1)
CLIP DETECTOR
Duty Duty Cycle ( pin 5) THD = 1% ; RL = 10KΩ to 5V 10 %
THD = 10% ;
30 40 50 %
RL = 10KΩ to 5V
I
CLEAK
SLAVE FUNCTION pin 4
V
Slave
V
Master
Note (1): Note:
Note (**):
SlaveThreshold 1V Master Threshold 3 V
Vmin
G
26dB
Pin 11 only for modular connection. Max external load 1MΩ/10 pF, only for test purpose
Tested with optimized Application Board (see fig. 2)
(Ref: to pin 8 -V
PO = 50W 3
)
S
A
µ
A
µ
W
W
% %
V
µ
V
µ
C
°
C
°
A
µ
3/14
TDA7293
Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1)
4/14
TDA7293
APPLICATION SUGGES TION S (see Test and Application Circuits of the Fig. 1)
The recommended values of t he external components are t hose shown on t he application circuit o f Fig­ure 1. Different values can be used; the following table can help the designer.
COMPONENTS SUGGESTED VALUE PURPOSE
LARGER THAN
SUGGESTED
R1 (*) 22k INPUT RESISTANCE INCREASE INPUT
IMPEDANCE
R2 680
CLOSED LOOP GAIN
DECREASE OF GAIN INCREASE OF GAIN
SMALLER THAN
SUGGESTED
DECREASE INPUT
IMPEDANCE
SET TO 30dB (**)
R3 (*) 22k INCREASE OF GAIN DECREASE OF GAIN
R4 22k ST-BY TIME
CONSTANT
LARGER ST-BY
ON/OFF TIME
SMALLER ST-BY
ON/OFF TIME;
POP NOISE
R5 10k MUTE TIME
CONSTANT
C1 0.47µF INPUT DC
DECOUPLING
LARGER MUTE
ON/OFF TIME
SMALLER MUTE
ON/OFF TIME HIGHER LOW
FREQUENCY
CUTOFF
C2 22µF FEEDBACK DC
DECOUPLING
HIGHER LOW FREQUENCY
CUTOFF
C3 10µF MUTE TIME
CONSTANT
C4 10µF ST-BY TIME
CONSTANT
LARGER MUTE
ON/OFF TIME
LARGER ST-BY
ON/OFF TIME
SMALLER MUTE
ON/OFF TIME
SMALLER ST-BY
ON/OFF TIME;
POP NOISE
C5 22µFXN (***) BOOTSTRAPPING SIGNAL
C6, C8 1000µF SUPPLY VOLTAGE
C7, C9 0.1µF SUPPLY VOLTAGE
(*) R1 = R3 for pop optimization (**) Closed Loop Gain has to be ≥ 26dB (***) Multiplay this value for the number of modular part connected
D98AU821
S
)
Slave function: pin 4 (Ref to pin 8 -V
+3V
-V
S
-V
+1V
S
-V
S
MASTER
UNDEFINED
SLAVE
DEGRADATION AT LOW FREQUENCY
BYPASS
DANGER OF
BYPASS
OSCILLATION
Note:
If in the application, the speakers are connected via long wires, it is a good rule to add between the output and GND, a Boucherot Cell, in order to avoid dangerous spurious oscillations when the speakers terminal are shorted.
The suggested Boucherot Resistor is 3.9/2W and the capacitor is 1µF.
5/14
TDA7293
INTRODUCTION
In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the per­formance obtained from the best discrete de­signs.
The task of realizing this linear integrated circuit in conventional bipolar technology is made ex­tremely difficult by the occurence of 2nd break­down phoenomenon. It limits the safe operating area (SOA) of the power devices, and, as a con­sequence, the maximum attainable output power, especially in presence of highly reactive loads.
Moreover, full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated pro­tection circuits.
To overcome these substantial drawbacks, the use of power MOS devices, which are immune from secondary breakdown is highly desirable.
The device described has therefore been devel­oped in a mixed bipolar-MOS high voltage tech­nology called BCDII 100/120.
1) Output Stage
The main design task in developping a po wer op­erational amplifier, independently of the technol­ogy used, is that of realization of the output stage.
The solution shown as a principle shematic by Fig3 represents the DMOS unity - gain output buffer of the TDA7293.
This large-signal, high-power buffer must be ca­pable of handling extremely high current and volt­age levels while maintaining acceptably low har­monic distortion and good behaviour over
frequency response; moreover, an accurate con­trol of quiescent current is required.
A local linearizing feedback, provided by differen­tial amplifier A, is used to fullfil the above require­ments, allowing a simple and effective quiescent current setting.
Proper biasing of the power output transistors alone is however not enough to guarantee the ab­sence of crossover distortion.
While a linearization of the DC transfer charac­teristic of the stage is obtained, the dynamic be­haviour of the system must be taken into account.
A significant aid in keeping the distortion contrib­uted by the final stage as low as possible is pro­vided by the compensation scheme, which ex­ploits the direct connection of the Miller capacitor at the amplifier’s output to introduce a local AC feedback path enclosing the output stage itself.
2) Protections
In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overload condi­tions.
Due to the absence of the 2nd breakdown phe­nomenon, the SOA of the power DMOS tr ansis­tors is delimited only by a maximum dissipation curve dependent on the duration of the applied stimulus.
In order to fully exploit the capabilities of the power transistors, the protection scheme imple­mented in this device combines a conventional SOA protection circuit with a novel local tempera­ture sensing technique which " dynamically" con­trols the maximum dissipation.
Figure 3: Principle Schematic of a DMOS unity-gain buffer.
6/14
Figure 4: Turn ON/OFF Suggested Sequence
+Vs
(V)
+40
-40
-Vs V
IN
(mV)
V
ST-BY
PIN #9
(V)
5V
TDA7293
V
MUTE
PIN #10
(V)
I
Q
(mA)
V
OUT (V)
OFF
ST-BY
5V
PLAY
MUTE MUTE
In addition to the overload protection described above, the device features a thermal shutdown circuit which initially puts the device into a muting state (@ Tj = 150 Tj = 160
o
C).
o
C) and then into stand-by (@
Full protection against electrostatic discharges on every pin is included.
Figure 5: Single Signal ST-BY/MUTE Control
Circuit
MUTE STBY
MUTE/
ST-BY
20K
10K 30K
1N4148
10µF10µF
D93AU014
3) Other Features The device is provided with both stand-by and
ST-BY OFF
D98AU817
mute functions, independently driven by two CMOS logic compatible input pins.
The circuits dedicated to the switching on and off of the amplifier have been carefully optimized to avoid any kind of uncontrolled audible transient at the output.
The sequence that we recommend during the ON/OFF transients is shown by Figure 4.
The application of figure 5 shows the possibility of using only one command for both st-by and mute functions. On both the pins, the maximum appli­cable range corresponds to the oper ating supply voltage.
APPLICATION INFORMATION
HIGH-EFFICIENCY Constraints of implementing high power solutions
are the power dissipation and the size of the power supply. These are both due to the low effi­ciency of conventional AB class amplifier ap­proaches.
Here below (figure 6) is described a circuit pro­posal for a high efficiency amplifier which can be adopted for both HI-FI and CAR-RADIO applica­tions.
7/14
TDA7293
The TDA7293 is a monolithic MOS power ampli­fier which can be operated at 100V supply voltage (120V with no signal applied) while delivering out­put currents up to ±6.5 A. This allows the use of this device as a very high power amplifier (up to 180W as peak power with T.H.D.=10 % and Rl = 4 Ohm); the only drawback is the power dissipation, hardly manageable in the above power range. The typical junction-to-case thermal resistance of the TDA7293 is 1 avoid that, in worst case conditions, the chip tem­perature exceedes 150 of the heatsink must be 0.038 bient temperature of 50
o
C/W (max= 1.5 oC/W). To
o
C, the thermal resistance
o
o
C).
C/W (@ max am-
As the above value is pratically unreachable; a high efficiency system is needed in those cases where the continuous RMS output power is higher than 50-60 W. The TDA7293 was designed to work also in higher efficiency way. For this reason there are four power supply pins: two intended for the signal part and two for the power part. T1 and T2 are two power transistors that only operate when the output power reaches a certain threshold (e.g. 20 W). If the output power in­creases, these transistors are switched on during the portion of t he signal where more output volt­age swing is needed, thus "bootstrapping" the power supply pins (#13 and #15).
The current generators formed by T4, T7, zener diodes Z1, Z2 and resistors R7,R8 define the minimum drop across the power MOS transistors of the TDA7293. L1, L2, L3 and the snubbers C9, R1 and C10, R2 stabilize the loops formed by the "bootstrap" circuits and the output stage of the TDA7293.
By considering again a maximum average output power (music signal) of 20W, in case of the high efficiency application, the thermal resistance value needed from the heatsink is
o
C/W (Vs =±50 V and Rl= 8 Ohm).
2.2 All components (TDA7293 and power transis­tors T1 and T2) can be placed on a 1.5
o
C/W heatsink, with the power darlingtons electrically insulated from the heatsink. Since the total power dissipation is less than that of a usual class AB amplifier, additional cost sav­ings can be obtained while optimizing the power supply, even with a high heatsink .
BRIDGE APPLICATION
Another application suggestion is the BRIDGE configuration, where two TDA7293 are used. In this application, the value of the load must not be lower than 8 Ohm for dissipation and current capability reasons. A suitable field of application includes HI-FI/TV subwoofers realizations.
The main advantages offered by this solution are:
- High power performances with limited supply voltage level.
- Considerably high output power even with high load values (i.e. 16 Ohm).
With Rl= 8 Ohm, Vs = ±25V the maximum output power obtainable is 150 W, while with Rl=16 Ohm, Vs = ±40V the maximum Pout is 200 W.
APPLICATION NOTE: (ref. fig. 7) Modular Application (more Devices in Parallel)
The use of the modular application lets very high power be delivered to very low impedance loads. The modular application implies one device to act as a master and the others as slaves.
The slave power stages are driven by the master devic e and wo rk in par allel al l t o gether, while the in­put and the ga in stages of the slave device are dis­abled, t he figure below shows t he connectio ns re­quired to co nfi g ure tw o dev ic es to w o rk toge the r.
The master chip connections are the same as the normal single ones.
The outputs can be conne cted together with -
out the need of any ballast resistance.
The slave SGND pin must be tied to the nega­tive supply.
The slave ST-BY and MUTE pins must be con­nected to the master ST-BY and MUTE pins.
The bootstrap lines must be connected to­gether and the bootstrap capacitor must be in­creased: for N devices the boostrap capacitor must be 22µF times N.
The slave IN-pin must be connected to the negative supply.
THE BOOTSTRAP CAPACITOR
For compatibility purpose with the previous de­vices of the family, the boostrap capacitor can be connected both between the bootstrap pin (6) and the output pin (14) or between the boostrap pin (6) and the bootstrap loader pin (12). When the bootcap is connected between pin 6 and 14, the maximum supply voltage in presence of output signal is limited to 100V, due the boot­strap capacitor overvoltage. When the bootcap is connected between pins 6 and 12 the maximum supply voltage extend to the full voltage that the technology can stand: 120V.
This is accomplished by the clamp introduced at the bootstrap loader pin (12): this pin follows the output voltage up to 100V and remains clamped at 100V for higher output voltages. This feature lets the output voltage swing up to a gate-source
S
voltage from the positive supply (V
-3 to 6V).
8/14
Figure 6: High Efficiency Application Circuit
TDA7293
+50V
D6
1N4001
PLAY
ST-BY
D5
1N4148
D1 BYW98100
C12 330nF
INC7
C13 10µF
R13 20K
R14 30K
R15 10K
10µF
D2 BYW98100
R20 20K
R21 20K
+25V
GND
-25V
-50V
C1
1000µF
63V
C2
1000µF
63V
C3
100nF
C4
100nF
C5
1000µF
35V
C6
1000µF
35V
100nF
R22
10K
R23
10K
C8
100nF
C9
330nF
C10
330nF
D7
1N4001
R1
2
R2
2
Figure 6a: PCB and Component Layout of the fig. 6
C14
R12 13K
3
4
TDA7293
9
1
815
10
137
BDX53A
R17 270
L1 1µH
2
14
6
12
L2 1µH
R19 270
BDX54A
T3
BC394
T1
D3 1N4148
R3 680
R16 13K
C15
22µF
D4 1N4148
T2
T6
BC393
C11 22µF
L3 5µH
R18 270
R4 270R5270
T4
BC393
Z1 3.9V
Z2 3.9V
T7
BC394
R9 270
R6
20K
R7
3.3K
R8
3.3K
R10 270
D97AU807C
T5
BC393
1.8nF
1.8nF
T8
BC394
R11 20K
C16
C17
OUT
P
ot
9/14
TDA7293
Figure 6b: PCB - Solder Side of the fig. 6.
Figure 7: Modular Application Circuit
SGND
MUTE
STBY
C3 10µF
SGND
MUTE
STBY
IN- 2
IN+
C4 10µF
IN- 2
IN+ 3
R3 22K
3
4
10
9
4
10 9
MASTER
VMUTE
VSTBY
SLAVE
C2
22µF
R5 10K
R4 22K
680
C1 470nF
R1 22K
R2
C7 100nF C6 1000µF
BUFFER DRIVER
713
-
+
MUTE STBY
1 STBY-GND
C7 100nF C6 1000µF
-
+
MUTE STBY
1 STBY-GND
11
THERMAL
SHUTDOWN
-Vs -PWVs
C9 100nF C8 1000µF
-Vs
BUFFER DRIVER
713
11
THERMAL
SHUTDOWN
-Vs -PWVs
C9 100nF C8 1000µF
-Vs
+Vs
+PWVs+Vs
S/C
PROTECTION
158
+Vs
+PWVs+Vs
S/C
PROTECTION
158
14
12
6 5
14
12
6 5
OUT
BOOT LOADER
C5
47µF
BOOTSTRAP CLIP DET
OUT
BOOT LOADER
BOOTSTRAP
D97AU808D
C10
100nF
R7 2
10/14
TDA7293
Figure 8a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE)
Figure 8b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE)
11/14
TDA7293
Figure 9: Distortion vs Output Power
T.H.D (%)
10
5 2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.002
0.001
Vs = +/-29V
Rl = 4 Ohm
f = 1KHz
210051020 50
Pout (W)
f = 20 KHz
Figure 10: Distortion vs Output Power
T.H.D (%)
10
5 2
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.002
0.001
Vs = +/-40V Rl = 8 Ohm
2 10051020 50
Pou t (W)
f = 20 KHz
f = 1KHz
Figure 11: Distortion vs Frequency
T.H.D. (%)
10
1
0.1
0.01
0.001
00.1110100
VS= +/- 35 V Rl= 8 Ohm
Pout=100 mW
Po=50 W
Frequen cy (K Hz)
Figure 12: Modular Application Derating Rload
vs Vsupply (ref. fig. 7)
6
5
4
3
2
Forbidden A rea
1
Minimum Allovable Load (ohm)
Pd > 50W at T
0
20 25 30 35 40 45 50
Supply Voltage (+/-Vcc)
case
=70°C
Figure 13: Modular Application Pd vs Vsupply
(ref. fig. 7)
60
Dissipated Power for each
50
device of the modular application
40
4ohm
30
20
Pdissipated (W)
10
0
20 25 30 35 40 45 50
Supply Voltage (+/-Vcc)
Pd limit at Tcase=70°C
8ohm
Figure 14: Output Power vs. Supply Voltage
Po (W)
120 110 100
90 80 70 60 50 40 30 20 10
0
10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
Rl=8 Ohm f= 1 KHz
T.H.D.=10 %
THD=0.5 %
Vs (+/-V)
12/14
TDA7293
13/14
TDA7293
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