Page 1
very high voltage PowerMESH™ Power MOSFET
Features
Typ e V
STW9N150 1500 V < 2.5 Ω 8 A 320 W
■ 100% avalanche tested
■ Avalanche ruggedness
■ Gate charge minimized
■ Very low intrinsic capacitances
■ High speed switching
■ Very low on-resistance
DSS
Application
R
DS(on)
I
D
STW9N150
N-channel 1500 V - 1.8 Ω - 8 A - TO-247
Pw
3
2
1
TO-247
■ Switching applications
Description
Using the well consolidated high voltage MESH
OVERLAY™ process, STMicroelectronics has
designed an advanced family of Power MOSFETs
with outstanding performances. The strengthened
layout coupled with the company’s proprietary
edge termination structure, gives the lowest
R
switching characteristics.
Table 1. Device summary
per area, unrivalled gate charge and
DS(on)
Order code Marking Package Packaging
STW9N150 9N150 TO-247 Tube
Figure 1. Internal schematic diagram
January 2008 Rev 2 1/12
www.st.com
12
Page 2
Contents STW9N150
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
Page 3
STW9N150 Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
I
DM
P
V
V
Drain-source voltage (VGS = 0) 1500 V
DS
Gate- source voltage ± 30 V
GS
Drain current (continuous) at TC = 25 °C 8 A
I
D
I
Drain current (continuous) at TC = 100 °C 5 A
D
(1)
Drain current (pulsed) 32 A
Total dissipation at TC = 25 °C 320 W
TOT
Derating factor 2.56 W/°C
T
T
1. Pulse width limited by safe operating area
Operating junction temperature
J
Storage temperature
stg
-55 to 150 °C
Table 3. Thermal data
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case max 0.39 °C/W
Rthj-amb Thermal resistance junction-ambient max 50 °C/W
T
Maximum lead temperature for soldering purpose 300 °C/W
J
Table 4. Avalanche characteristics
Symbol Parameter Max value Unit
I
AR
E
Avalanche current, repetitive or not-repetitive
(pulse width limited by T
max)
J
Single pulse avalanche energy
AS
(starting T
= 25 °C, ID = IAR, VDD = 50 V)
J
8A
720 mJ
3/12
Page 4
Electrical characteristics STW9N150
2 Electrical characteristics
(Tcase =25°C unless otherwise specified)
Table 5. On /off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on
Drain-source
breakdown voltage
Zero gate voltage
drain current (V
GS
Gate-body leakage
current (V
DS
= 0)
= 0)
= 1 mA, VGS = 0 1500 V
I
D
V
= Max rating
DS
= Max rating, TC=125 °C
V
DS
10
500µAµA
VGS = ± 30 V ± 100 nA
Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V
Static drain-source on
resistance
V
= 10 V, ID = 4 A 1.8 2.5 Ω
GS
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Forward
(1)
g
fs
C
C
C
C
oss eq.
transconductance
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
Equivalent Output
capacitance
R
Gate input resistance
g
= 15 V, ID = 4 A 7.5 S
V
DS
3255
= 25 V, f = 1 MHz, VGS = 0
V
DS
294
22.4
= 0, VDS = 0 to 1200 V 118 pF
V
GS
f=1MHz Gate DC Bias=0
Test signal level=20 mV
2.4 Ω
open drain
pF
pF
pF
Q
Q
Q
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Total gate charge
g
Gate-source charge
gs
Gate-drain charge
gd
VDD = 1200 V, ID = 8 A,
VGS = 10 V
(see Figure 15)
4/12
89.3
15.8
50.4
nC
nC
nC
Page 5
STW9N150 Electrical characteristics
Table 7. Switching times
Symbol Parameter Test conditions Min. Typ. Max Unit
t
d(on)
t
d(off)
Turn-on delay time
t
Rise time
r
Turn-off-delay time
t
Fall time
f
= 750 V, ID = 4 A,
V
DD
= 4.7 Ω, V
R
G
(see Figure 14)
GS
= 10 V
41
14.7
86
52
Table 8. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
t
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Source-drain current
(1)
Source-drain current (pulsed)
(2)
Forward on voltage I
Reverse recovery time
rr
Reverse recovery charge
rr
Reverse recovery current
Reverse recovery time
rr
Reverse recovery charge
rr
Reverse recovery current
= 8 A, VGS = 0 1.6 V
SD
= 8 A, di/dt = 100 A/µs
I
SD
= 60 V
V
DD
(see Figure 16)
I
= 8 A, di/dt = 100 A/µs
SD
= 60 V TJ = 150 °C
V
DD
(see Figure 16)
988
9.5
19.3
884
8.2
18.6
8
32AA
ns
ns
ns
ns
ns
µC
A
ns
µC
A
5/12
Page 6
Electrical characteristics STW9N150
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Normalized BV
vs temperature Figure 7. Static drain-source on resistance
DSS
6/12
RDS(on)
(Ω)
1.9
GS =10V
V
1.8
1.7
1.6
1.5
0123456
HV41520
I
D(A)
Page 7
STW9N150 Electrical characteristics
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
VGS
(V)
10
VDD =1200V
I
D =8A
GS =10V
V
HV41500
8
6
4
2
0
0 20406080100Qg (nC)
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 11. Normalized on resistance vs
temperature
Figure 12. Source-drain diode forward
characteristics
Figure 13. Maximum avalanche energy vs
temperature
EAS
(mJ)
700
D = 8A
I
600
500
400
300
200
100
0
0 25 50 75 100
HV41480
125
TJ (˚C)
7/12
Page 8
Test circuits STW9N150
3 Test circuits
Figure 14. Switching times test circuit for
resistive load
Figure 16. Test circuit for inductive load
switching and diode recovery times
Figure 15. Gate charge test circuit
Figure 17. Unclamped Inductive load test
circuit
Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform
8/12
Page 9
STW9N150 Package mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
9/12
Page 10
Package mechanical data STW9N150
TO-247 MECHANICAL DATA
DIM.
A 4.85 5.15 0.19 0.20
A1 2.2 0 2.60 0 .086 0.102
b 1.0 1.40 0.039 0.055
b1 2.0 2.40 0.079 0.094
b2 3.0 3.40 0.118 0.134
c 0.40 0.80 0.015 0.03
D 19.85 20 .15 0.781 0.793
E 15. 45 15.75 0.608 0.620
e5.45 0.214
L 14.20 14.80 0.560 0.582
L1 3.70 4.30 0.14 0.17
L2 18.50 0.728
øP 3.55 3.65 0.140 0.143
øR 4.50 5.50 0.177 0.216
S5.50 0.216
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
10/12
Page 11
STW9N150 Revision history
5 Revision history
Table 9. Document revision history
Date Revision Changes
24-May-2007 1 First release
04-Jan-2007 2 Document status promoted from preliminary data to datasheet
11/12
Page 12
STW9N150
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