
This is information on a product in full production.
N-channel 600 V, 0.135 Ω typ., 20 A MDmesh™ II
Power MOSFET in a TO-247 package
Datasheet - production data
AM01475v1_noTab_noZen
D(2)
G(1)
S(3)
Features
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
Applications
Switching applications
Description
Figure 1: Internal schematic diagram
Table 1: Device summary
This device is an N-channel Power MOSFET
developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the
company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
efficiency converters.

Contents
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1 Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package information ....................................................................... 9
4.1 TO-247 package information ............................................................. 9
5 Revision history ............................................................................ 11

Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Total dissipation at TC = 25 °C
Peak diode recovery voltage slope
Storage temperature range
Operating junction temperature range
Notes:
(1)
Pulse width limited by safe operating area.
(2)
ISD ≤ 20 A, di/dt ≤ 400 A/µs, V
DS(peak)
≤ V
(BR)DSS, VDD
≤ 80% V
(BR)DSS
Thermal resistance junction-case
Thermal resistance junction-ambient
Single pulse avalanche current (pulse width limited by
T
jmax
)
Single pulse avalanche energy (starting TJ=25 °C, ID=IAS,
VDD=50 V)
1 Electrical ratings
Table 2: Absolute maximum ratings
Table 3: Thermal data
Table 4: Avalanche characteristics

Electrical characteristics
Drain-source
breakdown voltage
Zero gate voltage drain
current
VGS = 0 V, VDS = 600 V,
TC= 125 °C
(1)
Gate-body leakage
current
Static drain-source onresistance
Notes:
(1)
Defined by design, not subject to production test.
VDS = 50 V, f = 1 MHz,
VGS = 0 V
Reverse transfer
capacitance
Equivalent output
capacitance
VGS = 0 V, VDS = 0 to 480 V
VDD = 480 V, ID = 20 A,
VGS = 10 V
(see Figure 14: "Test circuit for
gate charge behavior")
Notes:
(1)
C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when VDS
increases from 0 to 80% V
DS
VDD = 300 V, ID = 10 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 13: "Test circuit for
resistive load switching times"
and Figure 18: "Switching time
waveform")
2 Electrical characteristics
(T
= 25 °C unless otherwise specified)
CASE
Table 5: On/off states
Table 6: Dynamic
Table 7: Switching times

Electrical characteristics
Source-drain current
(pulsed)
ISD = 20 A, di/dt = 100 A/µs
VDD = 60 V
(see Figure 15: "Test circuit for
inductive load switching and
diode recovery times")
ISD = 20 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 15: "Test circuit for
inductive load switching and
diode recovery times" )
Notes:
(1)
Pulse width limited by safe operating area.
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Table 8: Source-drain diode

Electrical characteristics
Figure 2: Safe operating area
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Static drain-source on-resistance
Figure 7: Gate charge vs gate-source voltage
2.1 Electrical characteristics (curves)

Electrical characteristics
Figure 8: Capacitance variations
Figure 9: Normalized gate threshold voltage vs
temperature
Figure 10: Normalized on-resistance vs temperature
Figure 11: Source-drain diode forward
characteristics
Figure 12: Normalized V
(BR)DSS
vs temperature

Figure 13: Test circuit for resistive load
switching times
Figure 14: Test circuit for gate charge
behavior
Figure 15: Test circuit for inductive load
switching and diode recovery times
Figure 16: Unclamped inductive load test
circuit
Figure 17: Unclamped inductive waveform
Figure 18: Switching time waveform
3 Test circuits

4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.1 TO-247 package information
Figure 19: TO-247 package outline

Table 9: TO-247 package mechanical data

Modified Table 6: "Dynamic" and Table 8: "Source-drain diode"
Modified Section 2.1: "Electrical characteristics (curves)"
Minor text changes
5 Revision history
Table 10: Document revision history

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