
This is information on a product in full production.
STB20N95K5, STF20N95K5,
STP20N95K5, STW20N95K5
N-channel 950 V, 0.275 Ω typ., 17.5 A MDmesh™ K5
Power MOSFETs in D²PAK, TO-220FP, TO-220 and TO-247
Datasheet - production data
Features
Figure 1: Internal schematic diagram
Industry’s lowest R
Industry’s best FoM (figure of merit)
Ultra-low gate charge
DS(on)
x area
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
These very high voltage N-channel Power
MOSFETs are designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
Table 1: Device summary

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Contents
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1 Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 9
4 Package information ..................................................................... 10
4.1 D2PAK package information ............................................................ 10
4.2 TO-220FP package information ...................................................... 13
4.3 TO-220 type A package information ................................................ 15
4.4 TO-247 package information ........................................................... 17
4.5 D2PAK packing information ............................................................. 19
5 Revision history ............................................................................ 21

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Total dissipation at TC = 25 °C
Gate-source human body model (R= 1,5 kΩ,
C = 100 pF)
Insulation withstand voltage (RMS) from all
three leads to external heat sink (t = 1 s;
TC = 25 °C)
Peak diode recovery voltage slope
Operating junction temperature range
Storage temperature range
Notes:
(1)
Pulse width limited by safe operating area.
(2)
ISD ≤ 17.5 A, di/dt ≤ 100 A/μs; VDS peak ≤ V
(BR)DSS
(3)
VDS ≤ 760 V
Thermal resistance junction-case
Thermal resistance junction-ambient
Thermal resistance junction-pcb
Notes:
(1)
When mounted on 1 inch² FR-4 board, 2 Oz Cu.
Avalanche current, repetitive or not repetitive (pulse width limited by T
jmax.
)
Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V)
1 Electrical ratings
Table 2: Absolute maximum ratings
Table 3: Thermal data
Table 4: Avalanche characteristics

Electrical characteristics
STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Drain-source breakdown voltage
Zero-gate voltage drain current
VGS = 0 V, VDS = 950 V
VGS = 0 V, VDS = 950 V
TC = 125 °C
(1)
Gate body leakage current
Static drain-source on-resistance
Notes:
(1)
Defined by design, not subject to production test.
VDS = 100 V, f = 1 MHz,
VGS = 0 V
Reverse transfer capacitance
Equivalent capacitance energy
related
VGS = 0 V, VDS = 0 to
760 V
Equivalent capacitance time
related
Intrinsic gate resistance
VDD = 760 V,
ID = 17.5 A
VGS= 10 V
(see Figure 20: "Test
circuit for gate charge
behavior")
Notes:
(1)
C
o(er)
is a constant capacitance value that gives the same stored energy as C
oss
while VDS is rising from 0 to
80% V
DSS
.
(2)
C
o(tr)
is a constant capacitance value that gives the same charging time as C
oss
while VDS is rising from 0 to
80% V
DSS
.
2 Electrical characteristics
TC = 25 °C unless otherwise specified
Table 5: On/off-state
Table 6: Dynamic

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Electrical characteristics
VDD= 475 V, ID = 9 A, RG = 4.7 Ω
VGS = 10 V
(see Figure 19: "Test circuit for resistive
load switching times" and Figure 24:
"Switching time waveform")
Source-drain
current (pulsed)
ISD = 17.5 A, di/dt = 100 A/µs,
VDD = 60 V
(see Figure 21: "Test circuit for
inductive load switching and diode
recovery times")
ISD = 17.5 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 21: "Test circuit for
inductive load switching and diode
recovery times")
Notes:
(1)
Pulse width limited by safe operating area
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Gate-source breakdown voltage
Table 7: Switching times
Table 8: Source-drain diode
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD
performance of the device. The Zener voltage facilitates efficient and cost-effective device
integrity protection, thus eliminating the need for additional external componentry.
Table 9: Gate-source Zener diode

Electrical characteristics
STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Figure 2: Safe operating area for D²PAK and TO-220
Figure 3: Thermal impedance for D²PAK and
TO-220
Figure 4: Safe operating area for TO-220FP
Figure 5: Thermal impedance for TO-220FP
Figure 6: Safe operating area for TO-247
Figure 7: Thermal impedance for TO-247
2.1 Electrical characteristics (curves)

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Electrical characteristics
Figure 8: Output characteristics
Figure 9: Transfer characteristics
Figure 10: Gate charge vs gate-source voltage
Figure 11: Static drain-source on-resistance
Figure 12: Capacitance variation
Figure 13: Output capacitance stored energy

Electrical characteristics
STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Figure 14: Normalized gate threshold voltage vs
temperature
Figure 15: Normalized on-resistance vs
temperature
Figure 16: Maximum avalanche energy vs. starting TJ
Figure 17: Normalized V
(BR)DSS
vs. temperature
Figure 18: Source-drain diode forward characteristics

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Figure 19: Test circuit for resistive load
switching times
Figure 20: Test circuit for gate charge
behavior
Figure 21: Test circuit for inductive load
switching and diode recovery times
Figure 22: Unclamped inductive load test
circuit
Figure 23: Unclamped inductive waveform
Figure 24: Switching time waveform
AM01469v10
47 kΩ
2.7 kΩ
1 kΩ
IG= CONST
100 Ω
D.U.T.
+
pulse width
V
GS
2200
μF
V
G
V
DD
RL
3 Test circuits

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.1 D2PAK package information
Figure 25: D²PAK (TO-263) type A package outline

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Table 10: D²PAK (TO-263) type A package mechanical data

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Figure 26: D²PAK (TO-263) recommended footprint (dimensions are in mm)

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
4.2 TO-220FP package information
Figure 27: TO-220FP package outline

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Table 11: TO-220FP package mechanical data

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
4.3 TO-220 type A package information
Figure 28: TO-220 type A package outline

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Table 12: TO-220 type A mechanical data

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
4.4 TO-247 package information
Figure 29: TO-247 package outline

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Table 13: TO-247 package mechanical data

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
4.5 D2PAK packing information
Figure 30: Tape outline

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Figure 31: Reel outline
Table 14: D²PAK tape and reel mechanical data

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
Corrected VGS value in Table 2: Absolute maximum ratings.
Inserted device in D2PAK.
Document status promoted from preliminary data to datasheet.
Added: Section 2.1: Electrical characteristics (curves)
Updated Section 4: Package mechanical data.
Added Section 5: Packaging mechanical data. Minor text changes.
Figure 9: Transfer characteristics has been updated.
Updated title, features, description and schematic diagram in cover
page.
Minor text changes in Section 1: "Electrical ratings" and Section 2:
"Electrical characteristics".
Updated Section 2.1: "Electrical characteristics (curves)"
Updated package information section.
5 Revision history
Table 15: Document revision history

STB20N95K5, STF20N95K5, STP20N95K5,
STW20N95K5
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