ST MICROELECTRONICS STW15N80K5 Datasheet

STB15N80K5, STF15N80K5,

D(2, TAB)

G(1)

S(3)

AM01476v1

TO-220

1

2

3

TAB

1

2

3

TO-220FP

TO-247

D2PAK

1

2

3

STP15N80K5, STW15N80K5

N-channel 800 V, 0.3 Ω typ., 14 A MDmesh™ K5 Power MOSFETs

in D2PAK, TO-220FP, TO-220 and TO-247 packages

Datasheet − production data

TAB

3

1

Figure 1. Internal schematic diagram

Table 1. Device summary

Features

Order code V

STB15N80K5 STF15N80K5 35 W STP15N80K5

800 V 0.375 Ω 14 A

STW15N80K5

• Industry’s lowest R

• Industry’s best figure of merit (FoM)

• Ultra low gate charge

• 100% avalanche tested

• Zener-protected

DS

R

DS(on)

max I

x area

P

D

TOT

190 W

Applications

• Switching applications

Description

These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency.

Order code Marking Package Packaging

2

STB15N80K5

PAK Tape and reel

D

STF15N80K5 TO-220FP

15N80K5

TubeSTP15N80K5 TO-220

STW15N80K5 TO-247

October 2014 DocID023468 Rev 3 1/23

This is information on a product in full production.

www.st.com

23

Contents STB15N80K5, STF15N80K5, STP 15N8 0K5, STW 15N8 0K5

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.1 STB15N80K5, D²PAK (TO-263) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

4.2 STP15N80K5, TO-220 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.3 STF15N80K5, TO-220FP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.4 STW15N80K5, TO-247 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5 Packaging information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum rat ings

Value

Symbol Parameter

2

PAK,

D

TO-220, TO-247

TO-220FP

Unit

Gate- source volta ge ± 30 V Drain current (continuous) at TC = 25 °C 14 14 Drain current (continuous) at TC = 100 °C 8.8 8.8

(2)

Drain current (pulse d) 56 56 Total dissipation at TC = 25 °C 190 35 W

I

DM

P

V

GS

I

D

I

D

TOT

Max current during repetitive or single

I

AR

E

AS

pulse avalanche (pulse width limited by T

jmax

Single pulse avalanche energy (starting TJ = 25 °C, ID=IAS, VDD= 50 V)

Insulation withstand voltage (RMS) from

V

iso

dv/dt

T

stg

1. Limited by package.

2. Pulse width limited by safe operating area.

3. ISD ≤ 14 A, di/dt ≤ 100 A/µs, V

all three leads to external heat sink (t=1 s;T

(3)

Peak diode recovery voltage slope 4.5 V/ns Operating junction temperature

j

=25 °C)

C

Storage temperature

≤ V

Peak

)

(BR)DSS

(1)

A A A

4A

150 mJ

2500 V

-55 to 150 °C

Table 3. Thermal data

Symbol Parameter

R

thj-case

R

thj-amb

R

thj-pcb

1. When mounted on 1inch² FR-4 board, 2 oz Cu.

Thermal resistance junction-case max

Thermal resist a nc e jun cti on-amb max 62.5 50 62.5

(1)

Thermal resistance junction-pcb max 30

DocID023468 Rev 3 3/23

Value

TO-220 TO-247 D

0.66 3.6

2

PAK TO-220FP

Unit

°C/W

Electrical characteristics STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

2 Electrical characteristics

(T

= 25 °C unless otherwise specified).

CASE

T a ble 4. On/off states

Symbol Parameter T est cond ition s Min. T yp . Max. Uni t

V

(BR)DSS

V

R

I

DSS

I

GSS

GS(th)

DS(on)

Drain-source breakdown voltage (V

GS

= 0)

Zero gate voltage drain current (V

GS

= 0)

Gate body leakage current (V

= 0)

DS

Gate threshold volta ge V Static drain-source on

resistance

= 1 mA 800 V

I

D

V

= 800 V 1 µA

DS

V

= 800 V, Tc=125 °C 50 µA

DS

= ± 20 V ±10 µA

V

GS

= VGS, ID = 100 µA 3 4 5 V

DS

= 10 V , ID= 7 A 0.3 0.375 Ω

V

GS

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

C

o(tr)

C

o(er)

Input capacitance

iss

Output capacitance - 85 - pF

oss

Reverse transfer

rss

capacitance Equivalent c apac itance tim e

(1)

V

=100 V, f=1 MHz, VGS=0

DS

V

Equivalent capacitance

(2)

GS

energy rel ated

- 1100 - pF

-1.5- pF

-113- pF

-49-pF

R

Q Q Q

1. Time related is defined as a constant equivalent capacitance giving the same charging time as C VDS increases from 0 to 80% V

2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as C when V

Intrinsic gate resistance f = 1MHz, ID=0 - 4.5 - Ω

G

Total gate charg e

g

Gate-source charge - 6 - nC

gs

Gate-drain charge - 22 - nC

gd

DSS

increases from 0 to 80% V

DS

DSS

= 640 V, ID = 14 A

V

DD

V

=10 V

GS

(see Figure 20)

4/23 DocID023468 Rev 3

-32-nC

when

oss

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Electrical characteristics

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

d(on)

t

d(off)

Turn-on delay time

= 400 V, ID = 7 A,

V

t

Rise time - 17.6 - ns

r

Turn-of f del ay time - 44 - ns

t

Fall time - 10 - ns

f

DD

R

=4.7 Ω, VGS=10 V

G

(see Figure 19 and 24)

-19-ns

T a ble 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

SD

I

SDM

V

SD

t

Q

I

RRM

t

Q

I

RRM

1. Pulsed: pulse duration = 300µs, duty cycle 1.5%

Source-drain current - 14 A Source-drain current (pulsed) - 56 A

(1)

Forward on voltage ISD= 14 A, VGS=0 - 1.5 V Reverse recovery time

rr

Reverse recovery charge - 8.2 μC

rr

Reverse recovery current - 37 A Reverse recovery time ISD= 14 A,VDD= 60 V

rr

Reverse recovery charge - 10 μC

rr

Reverse recovery current - 35 A

I

= 14 A, VDD= 60 V

SD

di/dt = 100 A/µs,

(see Figure 21)

di/dt=100 A/µs, Tj=150 °C

(see Figure 21)

- 445 ns

- 580 ns

Table 8. Gate-source Zener diode

Symbol Parameter Test conditions Min. Typ. Max Unit

V

(BR)GSO

Gate-source breakdown voltage IGS= ± 1mA, ID= 0 30 - - V

The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD capability of the device. The Zener voltage is appropriate for efficient and cost-effective intervention to protect the device integrity. These integrated Zener diodes thus eliminate the need for external components.

DocID023468 Rev 3 5/23

Electrical characteristics STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

I

D

10

1

100

V

DS

(V)

10

(A)

Operation in this area is

Limited by max R

DS(on)

1µs

10µs

100µs

10ms

Tj=150°C Tc=25°C

Single pulse

1ms

0.1

AM15432v1

I

D

10

1

0.1

1

100

V

DS

(V)

10

(A)

Operation in this area is

Limited by max R

DS(on)

1µs

10µs

100µs

10ms

Tj=150°C Tc=25°C

Single pulse

1ms

0.1

0.01

AM15433v1

I

D

10

1

100

V

DS

(V)

10

(A)

Operation in this area is

Limited by max R

DS(on)

1µs

10µs

100µs

10ms

Tj=150°C Tc=25°C

Single pulse

1ms

0.1

AM15434v1

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for D2PAK and

Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP

TO-220

Figure 3. Thermal impedance for D2PAK and

TO-220

Figure 6. Safe operating area for TO-247 Figure 7. Thermal impedance for TO-247

6/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Electrical characteristics

I

D

24

12

0

8

V

DS

(V)

16

(A)

4

12

VGS= 6 V

VGS= 7 V

VGS= 8 V

VGS= 9 V

6

18

30

VGS= 10 V

AM15435v1

V

GS

6

4

2

0

5

Q

g

(nC)

(V)

20

8

10

15

10

VDD=640 V

I

D

=14 A

25

300

200

100

0

400

500

V

DS

(V)

V

DS

12

30

600

AM15443v1

R

DS(on)

0.3

0.2

0.1

0

10

I

D

(A)

(Ω)

5

15

VGS=10V

0.5

0.4

20

25

AM15441v1

C

1000

100

10

1

0.1

10

V

DS

(V)

(pF)

1

100

Ciss

Coss

Crss

AM15442v1

Figure 8. Output characteristics Figure 9. Transfer characteristics

I

D

(A)

30

24

18

12

6

VDS= 20 V

AM15436v1

0

4

Figure 10. Gate charge vs gate-source voltage Figure 11. Static drain-source on-resistance

6

8

10

V

GS

(V)

Figure 12. Capacitance variations Figure 13. Source-drain diode forward

V (V)

SD

characteristics

AM15439v1

TJ=-50°C

0.9

TJ=25°C

0.8

0.7

TJ=150°C

0.6 6

4

10

8

12

SD

(A)

I

DocID023468 Rev 3 7/23

Electrical characteristics STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

V

GS(th)

0.8

0.7

0.6

0.5

-75

T

J

(°C)

(norm)

-25

0.9

75

25

125

ID = 100 µA

V

DS

= V

GS

1

1.1

AM15440v1

E

oss

4

0

V

DS

(V)

(µJ)

400

200

8

600

12

AM15444v1

($6





7

-&

P-

















,' $

9

'' 9

$0Y

Figure 14. Normalized gate threshold voltage vs

temperature

Figure 15. Normalized on-resistance vs

temperature

R

DS(on)

(norm)

2.4

V

GS

= 10 V

ID = 7 A

2

1.6

1.2

0.8

0.4

-75

-25

Figure 16. Output capacitance stored energy Figure 17. Normalized VDS vs temperature

V

DS

(norm)

1.1

25

D

= 1mA

I

75

125

T

1.06

AM15437v1

J

(°C)

AM15438v1

Figure 18. Maximum avalanche energy vs

temperature

1.02

0.98

0.94

0.9

-75

-25

25

75

125

TJ(°C)

8/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Test circuits

AM01468v1

VGS

PW

VD

RG

RL

D.U.T.

2200

μF

3.3 μF

V

DD

AM01469v1

VDD

47kΩ

1kΩ

47kΩ

2.7kΩ

1kΩ

12V

V

i=20V=VGMAX

2200 μF

PW

IG=CONST

100Ω

100nF

D.U.T.

V

G

AM01470v1

A

D

D.U.T.

S

B

G

25

Ω

A

B

R

G

FAST DIODE

D

S

L=100μH

μF

3.3

1000

μF

V

DD

AM01472v1

V(BR)DSS

VDD

VD

IDM

ID

3 Test circuits

Figure 19. Switching times test circuit for

resistive load

Figure 21. Test circuit for inductive load

switching and diode recovery times

Figure 20. Gate charge test circuit

Figure 22. Unclamped inductive load test circuit

L

VD

2200

μF

3.3

μF

VDD

Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform

ID

Vi

D.U.T.

Pw

AM01471v1

tdon

ton

tr

90%

tdoff

toff

tf

90%

10%

0

10%

VDS

90%

V

GS

10%

0

AM01473v1

DocID023468 Rev 3 9/23

Package mechanical data STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

10/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Package mechanical data

0079457_U

4.1 STB15N80K5, D²PAK (TO-263)

Figure 25. D²PAK (TO-263) drawing

DocID023468 Rev 3 11/23

Package mechanical data STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

Table 9. D²PAK (TO-263) mechanical data

mm

Dim.

Min. Typ. Max.

A 4.40 4.60

A1 0.03 0.23

b 0.70 0.93

b2 1.14 1.70

c 0.45 0.60

c2 1.23 1.36

D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50

E 10 10.40 E1 8.50 8.70 8.90 E2 6.85 7.05 7.25

e2.54

e1 4.88 5.28

H 15 15.85

J1 2.49 2.69

L 2.29 2.79

L1 1.27 1.40 L2 1.30 1.75

R0.4

V2 0° 8°

12/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Package mechanical data

Footprint

Figure 26. D²PAK footprint

(a)

a. All dimension are in millimeters

DocID023468 Rev 3 13/23

Package mechanical data STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

0015988_typeA_Rev_S

4.2 STP15N80K5, TO-220

Figure 27. TO-220 type A drawing

14/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Package mechanical data

Table 10. TO-220 type A mechanical data

mm

Dim.

Min. Typ. Max.

A4.40 4.60

b0.61 0.88

b1 1.14 1.70

c0.48 0.70

D 15.25 15.75

D1 1.27

E 10 10.40

e2.40 2.70

e1 4.95 5.15

F1.23 1.32 H1 6.20 6.60

J1 2.40 2.72

L13 14

L1 3.50 3.93 L20 16.40 L30 28.90

∅

P3.75 3.85

Q2.65 2.95

DocID023468 Rev 3 15/23

Package mechanical data STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

7012510_Rev_K_B

4.3 STF15N80K5, TO-220FP

Figure 28. TO-220FP drawing

16/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Package mechanical data

Table 11. TO-220FP mechanical data

mm

Dim.

Min. Typ. Max.

A4.4 4.6 B2.5 2.7 D2.5 2.75 E 0.45 0.7

F0.75 1 F1 1.15 1.70 F2 1.15 1.70

G 4.95 5.2

G1 2.4 2.7

H10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3

Dia 3 3.2

DocID023468 Rev 3 17/23

Package mechanical data STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

0075325_H

4.4 STW15N80K5, TO-247

Figure 29. TO-247 drawing

18/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Package mechanical data

Table 12. TO-247 mechanical data

mm.

Dim.

Min. Typ. Max.

A 4.85 5.15

A1 2.20 2.60

b1.0 1.40 b1 2.0 2.40 b2 3.0 3.40

c 0.40 0.80

D 19.85 20.15

E 15.45 15.75

e 5.30 5.45 5.60

L 14.20 14.80 L1 3.70 4.30 L2 18.50

∅P 3 .55 3.65 ∅R 4.50 5.50

S 5.30 5.50 5.70

DocID023468 Rev 3 19/23

Packaging information STB15N80K5, STF15N80K5, STP 15N8 0K5, STW 15N8 0K5

P1

A0

D1

P0

F

W

E

D

B0

K0

T

User direction of feed

P2

10 pitches cumulative tolerance on tape +/- 0.2 mm

User direction of feed

R

Bending radius

Top cover tape

AM08852v2

5 Packaging information

Figure 30. Tape

20/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5 Packaging information

A

D

B

Full radius

G measured at hub

C

N

REEL DIMENSIONS

40mm min.

Access hole

At sl ot location

T

Tape slot in core for tape start 25 mm min. width

AM08851v2

Figure 31. Reel

Table 13. D²PAK (TO-263) tape and reel mechanical data

Tape Reel

mm

Dim.

Min. Max. Min. Max.

A0 10.5 10.7 A 330 B0 15.7 15.9 B 1.5

D 1.5 1.6 C 12.8 13.2

D1 1.59 1.61 D 20.2

E 1.65 1.85 G 24.4 26.4

F 11.4 11.6 N 100 K0 4.8 5.0 T 30.4 P0 3.9 4.1 P1 11.9 12.1 Base qty 1000 P2 1.9 2.1 Bulk qty 1000

R50

T 0.25 0.35

W 23.7 24.3

mm

DocID023468 Rev 3 21/23

Revision history STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

6 Revision history

Date Revision Changes

18-Jul-2012 1 First release.

31-Oct-2012 2

31-Oct-2014 3

Table 14. Document revision history

– Inserted: IAR, EAS and dv/dt values in Table 2 – Inserted: Table 5, 6 and 7 typical values – Inserted: Section 2.1: Electrical characteristic s (curves) – Minor text changes

Updated title, description and feature Updated Static drain-sour ce on-re si stance Minor text changes

s

22/23 DocID023468 Rev 3

STB15N80K5, STF15N80K5, STP15N80K5, STW15N80K5

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and it s subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications , and improvements to ST produc ts and /or to this document at any time witho ut notice. Purchasers should obt ain the lat est relevan t info rmation on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at t he time of order acknowledgement.

Purchasers are solely r espon si ble for t he cho ic e, s elect ion, a nd use of ST produc ts and ST assume s no l iabil ity f or app lication as sist ance or the design of Purchasers’ products.

No license, express or implied , to any intellectual property right is granted by ST herein.

Resale of ST products with provis ions different from the in formation set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.

Information in this document supers edes and replaces information previo usly supplied in any prior versions of this document.

DocID023468 Rev 3 23/23

ST MICROELECTRONICS STW15N80K5 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

Figure 1. Internal schematic diagram

Table 1. Device summary

1 Electrical ratings

Table 2. Absolute maximum rat ings

Table 3. Thermal data

2 Electrical characteristics

T a ble 4. On/off states

Table 5. Dynamic

Table 6. Switching times

T a ble 7. Source drain diode

Table 8. Gate-source Zener diode

2.1 Electrical characteristics (curves)

Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP

Figure 6. Safe operating area for TO-247 Figure 7. Thermal impedance for TO-247

Figure 8. Output characteristics Figure 9. Transfer characteristics

Figure 10. Gate charge vs gate-source voltage Figure 11. Static drain-source on-resistance

Figure 12. Capacitance variations Figure 13. Source-drain diode forward

Figure 16. Output capacitance stored energy Figure 17. Normalized VDS vs temperature

3 Test circuits

Figure 20. Gate charge test circuit

Figure 22. Unclamped inductive load test circuit

Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform

4 Package mechanical data

4.1 STB15N80K5, D²PAK (TO-263)

Figure 25. D²PAK (TO-263) drawing

Table 9. D²PAK (TO-263) mechanical data

Figure 26. D²PAK footprint

4.2 STP15N80K5, TO-220

Figure 27. TO-220 type A drawing

Table 10. TO-220 type A mechanical data

4.3 STF15N80K5, TO-220FP

Figure 28. TO-220FP drawing

Table 11. TO-220FP mechanical data

4.4 STW15N80K5, TO-247

Figure 29. TO-247 drawing

Table 12. TO-247 mechanical data

5 Packaging information

Figure 30. Tape

Figure 31. Reel

Table 13. D²PAK (TO-263) tape and reel mechanical data

6 Revision history

Table 14. Document revision history