STMicroelectronics STUSB4500 User Manual
UM2650
User manual
The STUSB4500 software programming guide
Introduction
This software guide is a non-exhaustive document aimed at clarifying a good practice when the customized STUSB4500 software is being written.
Figure 1. STEVAL-ISC005V1
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Table 1. Minimal configuration |
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1 x NUCLEO-F072RB |
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STM32 Nucleo-64 development board with ARM Cortex M0 |
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1 x STEVAL-ISC005V1 |
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STUSB4500 evaluation board |
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STSW-STUSB003 |
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Software library including STUSB4500 hardware abstraction layers, drivers and |
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code example |
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IAR 8.x |
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C code compiler |
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UM2650 - Rev 2 - December 2020 |
www.st.com |
For further information contact your local STMicroelectronics sales office. |
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UM2650
How to?
1How to?
1.1How USB PD negotiation works
1.At connection, a source connects to a sink @ 5 V (Type-C), therefore first of all, the STUSB4500 advertises itself as a USB Type-C SINK.
2.Then, a USB PD capable source advertises its power budget (SRC_PDOj) to the STUSB4500.
3.The sink (STUSB4500) is responsible for:
a.evaluating the SRC_PDOj according to application needs (stored in STUSB4500 SNK_PDOi) thanks to an internal algorithm
b.sending a request (voltage, current) to the SOURCE if any of the SRC_PDOj is compatible with any SNK_PDOi (power MATCH). In case of failure, the negotiation ends with a USB PD mismatch.
4.The SOURCE is responsible for:
a.accepting or declining the request (RDO) sent by the STUSB4500.
b.if accepted, implementing the voltage and current transition from current profile to the new power profile (within 275 ms after "accept")
c.notifying the SINK about the transition to new power profile is completed (PS_READY)
Figure 2. USB PD negotiation
1.2How to initialize the STUSB4500 properly
In order to properly initialize the STUSB4500 for software operations, it is recommended to:
1.Clear all interrupts by reading (I²C multi-read command for instance) all 10 registers from address 0x0D to 0x16
2.Configure interrupt mask register (@0x0C) according to application requirements (recommended list of alerts to be unmasked: CONNECTION_STATUS, MONITORING_STATUS, PRT_STATUS)
For further details, see the STSW-STUSB003 function: usb_pd_init
UM2650 - Rev 2 |
page 2/49 |
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UM2650
How to send a USB PD software reset
1.3How to send a USB PD software reset
In order to send a USB PD “SOFT_RESET_MESSAGE” command, the following sequence must be done:
1.WRITE 0x0D (SOFT_RESET) in the TX_HEADER_LOW register (@0x51)
2.WRITE 0x26 (SEND_COMMAND) in the PD_COMMAND_CTRL register (@ 0x1A) For further details, see STSW-STUSB003 function Send_Soft_reset_Message
1.4How to fill the PDO registers
The STUSB4500 supports up to 3 fixed supply PDO. As per USB PD standard, a SINK PDO is composed 32 bits that must be filled according to figure below.
PDO1, PDO2 and PDO3 from the STUSB4500 can be changed by software by accessing respectively the registers 0x85-0x88, 0x89-0x8C and 0x8D-0x90. Each PDO is composed of a word of 4 bytes. Please note PDO1 must be fixed 5 V according to USB PD standard.
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Table 2. Fixed supply PDO-sink |
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Bits |
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Description |
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B31...30 |
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Fixed supply |
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B29 |
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Dual-role power |
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B28 |
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Higher capability |
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B27 |
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Unconstrained power |
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B26 |
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USB communication capable |
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B25 |
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Dual-role data |
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Fast role swap required USB-Type-C current: |
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- 00b: fast swap not supported (default) |
B24..23 |
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- 01b: default USB power |
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- 10b: 1.5 A@5 V |
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- 11b: 3.0 A@5 V |
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B22..20 |
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Reserved-Shall be set to zero |
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B19...10 |
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Voltage in 50 mV units |
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B9...0 |
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Operational current in 10 mA units |
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Filling the PDO register only does not force new PDO contract negotiation. Please check Section 1.5 How to force the STUSB4500 to re-negotiate with the SOURCE.
For further details, see STSW-STUSB003 function: Update_PDO
1.5How to force the STUSB4500 to re-negotiate with the SOURCE
As per USB PD standard, a new contract negotiation must occur when a SOFT_RESET_MESSAGE is sent (by either the SOURCE or the SINK).
Therefore, once the PDO registers have been updated by software, sending a SOFT_RESET_MESSAGE to the SOURCE a new USB PD negotiation starts, by taking into account the new STUSB4500 PDO values (please check Section 1.3 How to send a USB PD software reset).
1.6How to force VBUS to 5 V
An easy way to force the STUSB4500 to negotiate 5 V is to set the number of active PDO to 1 (cf register 0x70: DPM_PDO_NUMB register) followed by a SOFT_RESET_MESSAGE (please check Section 1.3 How to send a USB PD software reset).
For further details, see STSW-STUSB003 functions: Negotiate_5V, Update_Valid_PDO_Number
UM2650 - Rev 2 |
page 3/49 |
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UM2650
How to read USB-C connection STATUS
1.7How to read USB-C connection STATUS
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By accessing the 2 registers below: |
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PORT_STATUS_1 (@0x0E) |
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CC_STATUS (@0x11) |
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It is possible to report the following information to the application processor: |
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1. |
the plug orientation (CC pin attached to CC1 or CC2) |
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2. |
the USB-C source current (Rp resistor value) |
Note: |
At the connection, the STUSB4500 connects first in USB-C mode before negotiating any USB PD contract. In |
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order to know the final connection status (USB-C or USB PD explicit contract), it is recommended to wait 500 ms |
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after ATTACH event. |
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For further details, see STSW-STUSB003 function: Print_Type_C_Only_Status |
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1.8 How to read USB PD STATUS
By accessing the 4 registers below:
• RDO_REG_STATUS_0 (@0x91)
• RDO_REG_STATUS_1 (@0x92)
• RDO_REG_STATUS_2 (@0x93)
• RDO_REG_STATUS_3 (@0x94)
it is possible to report to the application processor some information:
•if the STUSB4500 is attached in USB-C mode (object position = 000b) or in USB PD contract (object position different from 000b)
•the PDO index from the SOURCE that has been requested by the STUSB4500 internal algorithm (if object position is different from 000b)
•and various information as per USB PD standard definition (see table below)
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Table 3. Fixed request data object RDO |
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Bits |
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Description |
B31 |
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Reserved-Shall be set to zero |
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B30....28 |
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Object position (000b is Reserved and Shall Not be used) |
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B27 |
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GiveBack flag = 0 |
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B26 |
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Capability mismatch |
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B25 |
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USB communications capable |
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B24 |
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No USB suspend |
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B23 |
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Unchunked extended messages supported |
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B22....20 |
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Reserved-Shall be set to zero |
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B19...10 |
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Operating current in 10 mA units |
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B9..0 |
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Maximum operating current 10 mA units |
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For further details, see STSW-STUSB003 function: Print_RDO;
1.9How to access to the PDO from the SOURCE
As a normal process from the USB-PD negotiation (see Section 1.1 How USB PD negotiation works), the SOURCE initiates a USB PD contract negotiation by sharing its POWER profile (SRC_PDO) with the STUSB4500.
It is possible to access these power profiles at the beginning of the power negotiation by reading the RX_Buffer after confirmation from PRT_STATUS register. This dynamic register flags each incoming message.
UM2650 - Rev 2 |
page 4/49 |
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UM2650
How to access the STUSB4500 policy engine state
When an incoming message is reported, its content is temporarily stored in the RX buffers (from 0x31 to 0x4E).
As each incoming message overrides the former message, it is important to quickly store in application processor memory the STUSB4500 RX buffer content (header + data object) in order to catch the SOURCE power profiles.
For further details, see STSW-STUSB003 functions: ALARM_MANAGEMENT, Print_PDO_FROM_SRC
1.10How to access the STUSB4500 policy engine state
In order to understand what is the current state of the USB PD negotiation, it is possible to monitor in real time the STUSB4500 policy engine FSM. Please refer to PE_FSM register (@0x29) or check Get_Device_STATUS function from the STSW-STUSB003 library.
UM2650 - Rev 2 |
page 5/49 |
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UM2650
Register map
2Register map
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Table 4. Register map |
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Offset |
Register name |
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Description |
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0x06 |
BCD_TYPEC_REV_LOW |
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BCD_TYPEC_REV_LOW register |
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0x07 |
BCD_TYPEC_REV_HIGH |
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BCD_TYPEC_REV_HIGH register |
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0x08 |
BCD_USBPD_REV_LOW |
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BCD_USBPD_REV_LOW register |
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0x09 |
BCD_USBPD_REV_HIGH |
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BCD_USBPD_REV_HIGH register |
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0x0A |
DEVICE_CAPAB_HIGH |
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DEVICE_CAPAB_HIGH register |
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0x0B |
ALERT_STATUS_1 |
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ALERT_STATUS_1 register |
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0x0C |
ALERT_STATUS_1_MASK |
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ALERT_STATUS_1_MASK register |
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0x0D |
PORT_STATUS_0 |
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PORT_STATUS_0 register |
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0x0E |
PORT_STATUS_1 |
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PORT_STATUS_1 register |
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0x0F |
TYPEC_MONITORING_STATUS_0 |
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TYPEC_MONITORING_STATUS_0 register |
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0x10 |
TYPEC_MONITORING_STATUS_1 |
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TYPEC_MONITORING_STATUS_1 register |
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0x11 |
CC_STATUS |
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CC_STATUS register |
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0x12 |
CC_HW_FAULT_STATUS_0 |
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CC_HW_FAULT_STATUS_0 register |
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0x13 |
CC_HW_FAULT_STATUS_1 |
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CC_HW_FAULT_STATUS_1 register |
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0x14 |
PD_TYPEC_STATUS |
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PD_TYPEC_STATUS register |
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0x15 |
TYPEC_STATUS |
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TYPEC_STATUS register |
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0x16 |
PRT_STATUS |
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PRT_STATUS register |
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0x17 |
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to |
Reserved |
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Reserved |
0x19 |
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0x1A |
PD_COMMAND_CTRL |
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PD_COMMAND_CTRL register |
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0x1B |
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to |
reserved |
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reserved |
0x1F |
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0x20 |
MONITORING_CTRL_0 |
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MONITORING_CTRL_0 register |
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0x21 |
Reserved |
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Reserved |
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0x22 |
MONITORING_CTRL_2 |
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MONITORING_CTRL_2 register |
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0x23 |
RESET_CTRL |
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RESET_CTRL register |
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0x24 |
Reserved |
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Reserved |
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0x25 |
VBUS_DISCHARGE_TIME_CTRL |
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VBUS_DISCHARGE_TIME_CTRL register |
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0x26 |
VBUS_DISCHARGE_CTRL |
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VBUS_DISCHARGE_CTRL register |
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0x27 |
VBUS_CTRL |
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VBUS_CTRL register |
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0x28 |
reserved |
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Reserved |
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0x29 |
PE_FSM |
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PE_FSM register |
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0x2B |
reserved |
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reserved |
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0x2C |
reserved |
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reserved |
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0x2D |
GPIO_SW_GPIO |
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GPIO_SW_GPIO register |
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UM2650 - Rev 2 |
page 6/49 |
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UM2650
Register map
Offset |
Register name |
Description |
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0x2E |
reserved |
reserved |
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0x2F |
Device_ID |
Device_ID register |
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0x30 |
reserved |
reserved |
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0x31 |
RX_HEADER_LOW |
RX_HEADER_LOW register |
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0x32 |
RX_HEADER_HIGH |
RX_HEADER_HIGH register |
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0x33 |
RX_DATA_OBJ1_0 |
RX_DATA_OBJ1_0 register |
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0x34 |
RX_DATA_OBJ1_1 |
RX_DATA_OBJ1_1 register |
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0x35 |
RX_DATA_OBJ1_2 |
RX_DATA_OBJ1_2 register |
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0x36 |
RX_DATA_OBJ1_3 |
RX_DATA_OBJ1_3 register |
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0x37 |
RX_DATA_OBJ2_0 |
RX_DATA_OBJ2_0 register |
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0x38 |
RX_DATA_OBJ2_1 |
RX_DATA_OBJ2_1 register |
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0x39 |
RX_DATA_OBJ2_2 |
RX_DATA_OBJ2_2 register |
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0x3A |
RX_DATA_OBJ2_3 |
RX_DATA_OBJ2_3 register |
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0x3B |
RX_DATA_OBJ3_0 |
RX_DATA_OBJ3_0 register |
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0x3C |
RX_DATA_OBJ3_1 |
RX_DATA_OBJ3_1 register |
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0x3D |
RX_DATA_OBJ3_2 |
RX_DATA_OBJ3_2 register |
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0x3E |
RX_DATA_OBJ3_3 |
RX_DATA_OBJ3_3 register |
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0x3F |
RX_DATA_OBJ4_0 |
RX_DATA_OBJ4_0 register |
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0x40 |
RX_DATA_OBJ4_1 |
RX_DATA_OBJ4_1 register |
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0x41 |
RX_DATA_OBJ4_2 |
RX_DATA_OBJ4_2 register |
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0x42 |
RX_DATA_OBJ4_3 |
RX_DATA_OBJ4_3 register |
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0x43 |
RX_DATA_OBJ5_0 |
RX_DATA_OBJ5_0 register |
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0x44 |
RX_DATA_OBJ5_1 |
RX_DATA_OBJ5_1 register |
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0x45 |
RX_DATA_OBJ5_2 |
RX_DATA_OBJ5_2 register |
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0x46 |
RX_DATA_OBJ5_3 |
RX_DATA_OBJ5_3 register |
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0x47 |
RX_DATA_OBJ6_0 |
RX_DATA_OBJ6_0 register |
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0x48 |
RX_DATA_OBJ6_1 |
RX_DATA_OBJ6_1 register |
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0x49 |
RX_DATA_OBJ6_2 |
RX_DATA_OBJ6_2 register |
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0x4A |
RX_DATA_OBJ6_3 |
RX_DATA_OBJ6_3 register |
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0x4B |
RX_DATA_OBJ7_0 |
RX_DATA_OBJ7_0 register |
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0x4C |
RX_DATA_OBJ7_1 |
RX_DATA_OBJ7_1 register |
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0x4D |
RX_DATA_OBJ7_2 |
RX_DATA_OBJ7_2 register |
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0x4E |
RX_DATA_OBJ7_3 |
RX_DATA_OBJ7_3 register |
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0x51 |
TX_HEADER_LOW |
TX_HEADER_LOW register |
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0x52 |
TX_HEADER_HIGH |
TX_HEADER_HIGH register |
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0x53 |
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to |
Reserved |
reserved |
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0x6F |
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0x70 |
DPM_PDO_NUMB |
DPM_PDO_NUMB register |
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0x71 |
reserved |
reserved |
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to |
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UM2650 - Rev 2 |
page 7/49 |
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UM2650
Register map
Offset |
Register name |
Description |
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0x84 |
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0x85 |
DPM_SNK_PDO1_0 |
DPM_SNK_PDO1_0 register |
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0x86 |
DPM_SNK_PDO1_1 |
DPM_SNK_PDO1_1 register |
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0x87 |
DPM_SNK_PDO1_2 |
DPM_SNK_PDO1_2 register |
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0x88 |
DPM_SNK_PDO1_3 |
DPM_SNK_PDO1_3 register |
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0x89 |
DPM_SNK_PDO2_0 |
DPM_SNK_PDO2_0 register |
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0x8A |
DPM_SNK_PDO2_1 |
DPM_SNK_PDO2_1 register |
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0x8B |
DPM_SNK_PDO2_2 |
DPM_SNK_PDO2_2 register |
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0x8C |
DPM_SNK_PDO2_3 |
DPM_SNK_PDO2_3 register |
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0x8D |
DPM_SNK_PDO3_0 |
DPM_SNK_PDO3_0 register |
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0x8E |
DPM_SNK_PDO3_1 |
DPM_SNK_PDO3_1 register |
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0x8F |
DPM_SNK_PDO3_2 |
DPM_SNK_PDO3_2 register |
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0x90 |
DPM_SNK_PDO3_3 |
DPM_SNK_PDO3_3 register |
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0x91 |
RDO_REG_STATUS_0 |
RDO_REG_STATUS_0 register |
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0x92 |
RDO_REG_STATUS_1 |
RDO_REG_STATUS_1 register |
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0x93 |
RDO_REG_STATUS_2 |
RDO_REG_STATUS_2 register |
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0x94 |
RDO_REG_STATUS_3 |
RDO_REG_STATUS_3 register |
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UM2650 - Rev 2 |
page 8/49 |
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UM2650
Register description
3Register description
3.1BCD_TYPEC_REV_LOW register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
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BCD_TYPEC_REV_7_0
R
Address: STUSB_BLOCKBaseAddress + 0x06
Type: R
Reset: 0x12
[7:0] BCD_TYPEC_REV_7_0: Defined Type-C release supported by the device
3.2BCD_USPD_REV_HIGH register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
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BCD_USBPD_REV_15_8
R
Address: STUSB_BLOCKBaseAddress + 0x09
Type: R
Reset: 0x20
[7:0] BCD_USBPD_REV_15_8: Defined Power Delivery release supported by the device
UM2650 - Rev 2 |
page 9/49 |
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UM2650
BCD_USBPD_REV_LOW register
3.3BCD_USBPD_REV_LOW register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
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BCD_USBPD_REV_7_0
R
Address: STUSB_BLOCKBaseAddress + 0x08
Type: R
Reset: 0x11
[7:0] BCD_USBPD_REV_7_0: Defined Power Delivery release supported by the device
3.4BCD_USPD_REV_HIGH register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
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BCD_USBPD_REV_15_8
R
Address: STUSB_BLOCKBaseAddress + 0x09
Type: R
Reset: 0x20
[7:0] BCD_USBPD_REV_15_8: Defined Power Delivery release supported by the device
3.5DEVICE_CAPAB_HIGH register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
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DEVICE_CAPAB_HIGH
R
Address: STUSB_BLOCKBaseAddress + 0x0A
Type: R
Reset: 0x00
[7:0] DEVICE_CAPAB_HIGH: Not used
UM2650 - Rev 2 |
page 10/49 |
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UM2650
ALERT_STATUS_1 register
3.6ALERT_STATUS_1 register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
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| <![if ! IE]> <![endif]>reserved |
<![if ! IE]> <![endif]>PORT STATUS AL |
<![if ! IE]> <![endif]>TYPEC MONITORING STATUS AL |
<![if ! IE]> <![endif]>CC HW FAULT STATUS AL |
<![if ! IE]> <![endif]>PD TYPEC STATUS AL |
<![if ! IE]> <![endif]>reserved |
<![if ! IE]> <![endif]>PRT STATUS AL |
<![if ! IE]> <![endif]>reserved |
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R |
R |
R |
R |
R |
R |
R |
R |
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Address: STUSB_BLOCKBaseAddress + 0x0B
Type: R
Reset: 0x00
[7]reserved
[6]PORT_STATUS_AL
[5]TYPEC_MONITORING_STATUS_AL
[4]CC_HW_FAULT_STATUS_AL
[3]reserved
[1]PRT_STATUS_AL
[0]reserved
UM2650 - Rev 2 |
page 11/49 |
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UM2650
ALERT_STATUS_1_MASK register
3.7ALERT_STATUS_1_MASK register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
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| <![if ! IE]> <![endif]>reserved |
<![if ! IE]> <![endif]>PORT STATUS AL MASK |
<![if ! IE]> <![endif]>TYPEC MONITORING STATUS MASK |
<![if ! IE]> <![endif]>CC FAULT STATUS AL MASK |
<![if ! IE]> <![endif]>reserved |
<![if ! IE]> <![endif]>reserved |
<![if ! IE]> <![endif]>PRT STATUS AL MASK |
<![if ! IE]> <![endif]>reserved |
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R/W |
R/W |
R/W |
R/W |
R/W |
R |
R/W |
R/W |
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Address: STUSB_BLOCKBaseAddress + 0x0C
Type: R/W
Reset: 0xFB (initialized by NVM)
[7]reserved
PORT_STATUS_AL_MASK
[6]0: (UNMASKED) Interrupt unmasked 1: (MASKED) Interrupt masked
TYPEC_MONITORING_STATUS_MASK
[5]0: (UNMASKED) Interrupt unmasked 1: (MASKED) Interrupt masked
CC_FAULT_STATUS_AL_MASK
[4]0: (UNMASKED) Interrupt unmasked 1: (MASKED) Interrupt masked
[3]reserved
[2]reserved
PRT_STATUS_AL_MASK:
[1]0: (UNMASKED) Interrupt unmasked
1: (MASKED) Interrupt masked
[0]reserved
UM2650 - Rev 2 |
page 12/49 |
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UM2650
PORT_STATUS_0 register
3.8PORT_STATUS_0 register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
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<![if ! IE]> <![endif]>RESERVED |
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<![if ! IE]> <![endif]>ATTACH TRANS |
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R |
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RC |
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Address: STUSB_BLOCKBaseAddress + 0x0D
Type: R
Reset: 0x00
ATTACH_TRANS:
[0]0: No transition detected in attached states
1: Transition detected in attached state
UM2650 - Rev 2 |
page 13/49 |
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UM2650
PORT_STATUS_1 register
3.9PORT_STATUS_1 register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
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ATTACHED_DEVICE |
reserved |
POWER_MODE |
DATA_MODE |
reserved |
ATTACH |
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R |
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R |
R |
R |
R |
R |
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Address: STUSB_BLOCKBaseAddress + 0x0E
Type: R
Reset: 0x00
ATTACHED_DEVICE:
000: (NONE_ATT) No device connected
001: (SNK_ATT) Sink device connected
010: reserved
[7:5]
011: (DBG_ATT) Debug accessory device connected
100:reserved
101:reserved Others: Do not use
[4]reserved
POWER_MODE:
[3]0: device is sinking power 1: reserved
DATA_MODE:
[2]0: UFP
1: reserved
[1]reserved
ATTACH:
[0]0: UNATTACHED
1: ATTACHED
UM2650 - Rev 2 |
page 14/49 |
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UM2650
TYPEC_MONITORING_STATUS_0 register
3.10TYPEC_MONITORING_STATUS_0 register
7 |
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6 |
5 |
4 |
3 |
2 |
1 |
0 |
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<![if ! IE]> <![endif]>RESERVED |
<![if ! IE]> <![endif]>VBUS HIGH STATUS |
<![if ! IE]> <![endif]>VBUS LOW STATUS |
<![if ! IE]> <![endif]>VBUS READY TRANS |
<![if ! IE]> <![endif]>VBUS VSAFE0V TRANS |
<![if ! IE]> <![endif]>VBUS VALID SNK TRANS |
<![if ! IE]> <![endif]>RESERVED |
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R |
RC |
RC |
RC |
RC |
RC |
R |
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Address: STUSB_BLOCKBaseAddress + 0x0F
Type: RC
Reset: 0x0F
VBUS_HIGH_STATUS: VBUS_HIGH status updated during VBUS_READY transition from HIGH to LOW
[5]0: (VBUS_HIGH_OK) VBUS below high threshold
1: (VBUS_HIGH_KO) VBUS above high threshold (Overvoltage condition)
VBUS_LOW_STATUS: VBUS_LOW status updated during VBUS_READY transition from HIGH to LOW
[4]0: (VBUS_LOW_OK) VBUS above low threshold
1: (VBUS_LOW_KO) VBUS below low threshold (Undervoltage condition)
VBUS_READY_TRANS:
[3]0: (NO_TRANS) status cleared
1: (TRANS_DETECTED) Transition detected on VBUS_READY bit
VBUS_VSAFE0V_TRANS:
[2]0: (NO_TRANS) status cleared
1: (TRANS_DETECTED) Transition detected on VBUS_VSAFE0V bit
VBUS_VALID_SNK_TRANS:
[1]0: (NO_TRANS) status cleared
1: (TRANS_DETECTED) Transition detected on VBUS_VALID_SNK bit
[0] reserved
UM2650 - Rev 2 |
page 15/49 |
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