ST MICROELECTRONICS STP7NK80Z Datasheet

STB7NK80Z, STB7NK80Z-1

3

STP7NK80ZFP, STP7NK80Z

N-channel 800 V, 1.5 Ω, 5.2 A, TO-220,TO-220FP,D2PAK,I2PA K

Zener-protected SuperMESH™ Power MOSFET

Features

V

Type

DSS

(@Tjmax)

R

DS(on)

I

D

STP7NK80Z 800V < 1.8Ω 5.2A

STP7NK80ZFP 800V < 1.8Ω 5.2A

STB7NK80Z 800V < 1.8Ω 5.2A

STB7NK80Z-1 800V < 1.8Ω 5.2A

■ Extremely high dv/dt capability

■ 100% avalanche tested

■ Gate charge minimized

■ Very low intrinsic capacitances

■ Very good manufacturing repeatability

Applications

■ Switching application

Description

The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage Power MOSFETs including revolutionary
MDmesh™ products.

TO-220

D2PAK

3

1

TO-220FP

1

I2PAK

Figure 1. Internal schematic diagram

D(2)

G(1)

S(3)

2

1

3

2

AM01476v1

Table 1. Device summary

Order codes Marking Package Packaging

STB7NK80ZT4 B7NK80Z D²PAK Tape e reel

STB7NK80Z-1 B7NK80Z I²PAK

Tu beSTP7NK80Z P7NK80Z TO-220

STP7NK80ZFP P7NK80ZFP TO-220FP

March 2010 Doc ID 8979 Rev 6 1/17

www.st.com

17

Contents STB7NK80Z, STB7NK80Z-1, STP7NK80ZFP, STP7NK80Z

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2/17 Doc ID 8979 Rev 6

STB7NK80Z, STB7NK80Z-1, STP7NK80ZFP, STP7NK80Z Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Value

Symbol Parameter

TO-220

D2PAK I2PAK

TO-220FP

Unit

Drain-source voltage (VGS = 0) 800 V

DS

Gate- source voltage ± 30 V

GS

I

Drain current (continuous) at TC = 25 °C 5.2 5.2

D

Drain current (continuous) at TC = 100 °C 3.3 3.3

I

D

(2)

Drain current (pulsed) 20.8 20.8

Total dissipation at TC = 25°C 125 30 W

TOT

I

DM

P

V

V

Derating factor 1 0.24 W/°C

V

ESD(G-S)

dv/dt

Gate source ESD
(HBM-C=100 pF, R=1.5 kΩ)

(3)

Peak diode recovery voltage slope 4.5 V/ns

Insulation withstand voltage (RMS) from

V

T

1. Limited only by maximum temperature allowed

2. Pulse width limited by safe operating area

3. ISD ≤ 5.2 A, di/dt ≤ 200 A/µs, VDD ≤ V

Table 3. Thermal data

all three leads to external heat sink

ISO

(t=1 s; T

Max operating junction temperature

T

j

Storage temperature

stg

= 25 °C)

C

(BR)DSS

, T

j

≤ T

JMAX.

(1)

(1)

(1)

4000 V

2500 V

-55 to 150

A

A

A

°C
°C

Value

Symbol Parameter

2

D

PAK I2PAK

300 °C

TO-220FP

R

thj-case

R

thj-amb

Table 4. Avalanche characteristics

Thermal resistance junction-case max 1 4.2 °C/W

Thermal resistance junction-ambient max 62.5 °C/W

Maximum lead temperature for soldering

T

l

purpose

TO-220

Symbol Parameter Value Unit

I

E

Avalanche current, repetitive or not-repetitive

AR

(pulse width limited by Tj Max)

Single pulse avalanche energy

AS

(starting T

= 25 °C, ID = IAR, V

J

DD

= 50 V)

5.2 A

210 mJ

Doc ID 8979 Rev 6 3/17

Unit

Electrical characteristics STB7NK80Z, STB7NK80Z-1, STP7NK80ZFP, STP7NK80Z

2 Electrical characteristics

(T

= 25 °C unless otherwise specified)

CASE

Table 5. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

Drain-source
Breakdown voltage

Zero gate voltage
Drain Current (VGS = 0)

Gate-body leakage
Current (VDS = 0)

ID =1 mA, VGS = 0 800 V

V

= Max rating

DS

V

= Max rating, TC = 125 °C

DS

1

50µAµA

VGS = ± 20 V ± 10 µA

Gate threshold voltage VDS = VGS, ID = 100 µA 3 3.75 4.5 V

Static drain-source on
resistance

= 10 V, ID = 2.6 A 1.5 1.8 Ω

V

GS

Table 6. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

(1)

g

C

C

C

C

oss eq.

fs

(2)

Forward transconductance VDS = 15 V, ID = 2.6 A - 5 S

Input capacitance

iss

Output capacitance

oss

Reverse transfer

rss

capacitance

Equivalent output
capacitance

= 25 V, f = 1 MHz,

V

DS

= 0

V

GS

V

=0 , VDS = 0 to 640 V - 50 pF

DS

1138

-

122

25

pF
pF
pF

t

d(on)

t

r(off)

Q
Q
Q

t

r(Voff)

1. Pulsed: pulse duration=300µs, duty cycle 1.5%

2. C
increases from 0 to 80% V

Turn-on delay time

t

Rise time

r

Turn-off delay time

t

Fall time

r

Total gate charge

g

Gate-source charge

gs

Gate-drain charge

gd

Off-voltage rise time

t

Fall time

r

t

Cross-over time

c

is defined as a constant equivalent capacitance giving the same charging time as C

oss eq.

DSS

.

= 400 V, ID = 2.6 A,

V

DD

= 4.7 Ω, V

R

G

(see Figure 17)

VDD = 640 V, ID = 5.2 A,

= 10 V

V

GS

(see Figure 18)

VDD = 640 V, ID = 5.2 A,
RG = 4.7 Ω, V
(see Figure 17)

4/17 Doc ID 8979 Rev 6

GS

GS

= 10 V

= 10 V

20
12

­45

20

40

-

7

21

12

-

10
20

when VDS

oss

ns
ns
ns
ns

56 nC

nC
nC

ns
ns
ns

STB7NK80Z, STB7NK80Z-1, STP7NK80ZFP, STP7NK80Z Electrical characteristics

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

I

SDM

V

SD

Q

I

RRM

1. Pulsed: pulse duration=300µs, duty cycle 1.5%

2. Pulse width limited by safe operating area

Source-drain current

SD

(1)

Source-drain current (pulsed)

(2)

Forward on voltage ISD = 5.2 A, VGS = 0 - 1.6 V

= 5.2 A, di/dt = 100

I

t

Reverse recovery time

rr

Reverse recovery charge

rr

Reverse recovery current

SD

A/µs

= 50 V, Tj = 150°C

V

DD

(see Figure 22)

-

530

-

3.31

12.5

5.2

20.8AA

ns

µC

A

Table 8. Gate-source zener diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

BV

Gate-source breakdown voltage IGS= ± 1mA (open drain) 30 V

GSO

The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.

Doc ID 8979 Rev 6 5/17

Electrical characteristics STB7NK80Z, STB7NK80Z-1, STP7NK80ZFP, STP7NK80Z

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for TO-220,

2

D

PAK, I2PAK

Figure 3. Thermal impedance for TO-220,

D2PAK, I2PAK

Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP

Figure 6. Output characteristics Figure 7. Transfer characteristics

6/17 Doc ID 8979 Rev 6