ST MICROELECTRONICS STP75NS04Z Datasheet

N-channel Clamped - 7mΩ - 80A - TO-220
Fully protected MESH Overlay™ III Power MOSFET
General features
Type V
STP75NS04Z Clamped < 11m 80A
Low capacitance and gate charge
100% avalanche tested
DSS
Description
This fully clamped MOSFET is produced by using the latest advanced Company’s Mesh Overlay process which is based on a novel strip layout. The inherent benefits of a new technology coupled with the extra clamping capabilities make this product particularly suitable for the harshest operation conditions such as those encoured in power tools. Any other application requiring extra ruggedness is also recommended.
R
DS(on)
I
D
STP75NS04Z
3
2
1
TO-220
Internal schematic diagram
Applications
Switching application
Power tools
Order codes
Part number Marking Package Packaging
STP75NS04Z P75NS04Z TO-220 Tube
June 2006 Rev 1 1/12
www.st.com
12
Contents STP75NS04Z
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
STP75NS04Z Electrical ratings

1 Electrical ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit
I
DM
P
V
V
V
I
I
I
D
I
DG
GS
TOT
DS
DG
GS
(1)
D
Drain-source voltage (VGS = 0)
Drain-gate voltage (VGS = 0)
Gate-source voltage Clamped V
Drain current (continuous) at TC = 25°C
Drain current (continuous) at TC = 100°C
Drain gate current (continuos) ±50 mA
Gate source current (continuos) ±50 mA
(2)
Drain current (pulsed) 320 A
Total dissipation at TC = 25°C
Derating factor 0.73 W/°C
V
ESD
T
T
stg
1. Current limited by wire bonding
2. Pulse with limited by safe operating area
Gate-source ESD (HBM-C=100pF, R=1.5KΩ) ±8 kV
Operating junction temperature
j
Storage temperature

Table 2. Thermal data

Clamped V
Clamped V
80 A
63 A
110 W
-55 to 175 °C
Symbol Parameter Value Unit
R
thj-case
R
thj-amb
T
Thermal resistance junction-case Max 1.36 °C/W
Thermal resistance junction-ambient Max 62.5 °C/W
Maximum lead temperature for soldering purpose 300 °C
l

Table 3. Avalanche data

Symbol Parameter Value Unit
E
AS
Single pulse avalanche energy (starting Tj=25°C,
, VDD=25V)
I
D=IAR
470 mJ
3/12
Electrical characteristics STP75NS04Z

2 Electrical characteristics

(T
=25°C unless otherwise specified)
CASE

Table 4. On/off states

Symbol Parameter Test condictions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GSS
V
GS(th)
R
DS(on)
Drain-source breakdown voltage
Zero gate voltage drain current (V
GS
= 0)
Gate body leakage current (VDS = 0)
Gate threshold breakdown voltage
Gate threshold voltage
Static drain-source on resistance
= 1mA, VGS= 0
I
D
= 16V
V
DS
V
= ±10V
GS
IGS= ±100µA
= VGS, ID = 250µA
V
DS
VGS= 10V, ID= 40A
33 V
A
2 µA
18 V
234V
711m

Table 5. Dynamic

Symbol Parameter Test condictions Min. Typ. Max. Unit
(1)
g
fs
C
C
C
Q
Q
Q
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
Forward transconductance
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
g
Total gate charge Gate-source charge
gs
Gate-drain charge
gd
=15V, ID = 15A
V
DS
= 25V, f = 1 MHz,
V
DS
=0
V
GS
= 20V, ID= 80 A,
V
DD
= 10 V
V
GS
(see Figure 13)
50 S
1860
628 196
50 14 16
pF pF pF
nC nC nC
4/12
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