ST MICROELECTRONICS STP5NK100Z Datasheet

N-channel 1000 V, 2.7 Ω, 3.5 A, TO-220, TO-220FP, TO-247

Features

V

Type

(@T

DSS

JMAX

STF5NK100Z 1000 V < 3.7 Ω 3.5 A

STP5NK100Z 1000 V < 3.7 Ω 3.5 A

STW5NK100Z 1000 V < 3.7 Ω 3.5 A

■ Extremely high dv/dt capability

■ 100% avalanche tested

■ Gate charge minimized

■ Very low intrinsic capacitances

■ Very good manufacturing repeatibility

R

)

DS(on)

max I

STP5NK100Z, STF5NK100Z

STW5NK100Z

SuperMESH3™ Power MOSFET

D

TO-220FPTO-220

3

2

1

TO-247

3

2

1

Applications

■ Switching application

Description

The new SuperMESH™ series of Power
MOSFETS is the result of further design
improvements on ST's well-established strip­based PowerMESH™ layout. In addition to
significantly lower on-resistance, the device offers
superior dv/dt capability to ensure optimal
performance even in the most demanding
applications. The SuperMESH™ devices further
complement an already broad range of innovative
high voltage MOSFETs, which includes the
revolutionary MDmesh™ products.

Table 1. Device summary

Order code Marking Package Packaging

STF5NK100Z F5NK100Z TO-220FP Tube

STP5NK100Z P5NK100Z TO-220 Tube

STW5NK100Z W5NK100Z TO-247 Tube

Figure 1. Internal schematic diagram

D(2)

G(1)

S(3)

AM01476v1

May 2009 Doc ID 10850 Rev 5 1/15

www.st.com

15

Contents STP5NK100Z, STF5NK100Z, STW5NK100Z

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2/15 Doc ID 10850 Rev 5

STP5NK100Z, STF5NK100Z, STW5NK100Z Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter

Drain-source voltage (VGS = 0) 1000 V

DS

Gate-source voltage ± 30 V

GS

Drain current (continuous) at TC = 25°C 3.5

I

D

I

Drain current (continuous) at TC=100°C 2.2

D

(2)

Drain current (pulsed) 14

Total dissipation at TC = 25°C 125 30 W

TOT

I

V

V

DM

P

Derating factor 1 0.24 W/°C

TO-220, TO-247 TO-220FP

Val ue

3.5

2.2

14

(1)

(1)

(1)

Unit

A

A

A

V

ESD(G-S)

dv/dt

Gate source ESD
(HBM-C=100pF, R=1.5 kΩ)

(3)

Peak diode recovery voltage slope 4.5 V/ns

Insulation withstand voltage (RMS) from all

V

three leads to external heat sink

ISO

(t=1 s; Tc= 25°C)

T

Operating junction temperature

J

T

1. Limited only by maximum temperature allowed

2. Pulse width limited by safe operating area

3. ISD ≤ 3.5 A, di/dt ≤ 200 A/µs, VDD ≤ V

Storage temperature

stg

(BR)DSS

, Tj ≤ T

Table 3. Thermal data

Symbol Parameter

R

thj-case

R

Thermal resistance junction-case max 1 4.2 °C/W

Thermal resistance junction-ambient max 62.5 °C/W

thj-a

Maximum lead temperature for soldering

T

l

purpose

4000 V

2500 V

-55 to 150 °C

JMAX.

Val ue

Unit

TO-220, TO-247 TO-220FP

300 °C

Table 4. Avalanche characteristics

Symbol Parameter Value Unit

I

AR

E

Avalanche current, repetitive or not-repetitive
(pulse width limited by T

JMAX

Single pulse avalanche energy

AS

(starting T

=25 °C, Id=Iar, Vdd=50 V)

j

)

3.5 A

250 mJ

Doc ID 10850 Rev 5 3/15

Electrical characteristics STP5NK100Z, STF5NK100Z, STW5NK100Z

2 Electrical characteristics

(T

=25°C unless otherwise specified)

CASE

Table 5. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

Drain-source breakdown
voltage

Zero gate voltage drain
current (V

GS

= 0)

Gate body leakage current
(VGS = 0)

Gate threshold voltage V

Static drain-source on
resistance

= 1 mA, VGS= 0 1000 V

I

D

V

= Max rating,

DS

= Max rating,

V

DS

Tc = 125 °C

V

= ± 20 V ±10 µA

GS

= VGS, ID = 100 µA 3 3.75 4.5 V

DS

= 10 V, ID = 1.75 A 2.7 3.7 Ω

V

GS

1

50

Table 6. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

(1)

g

fs

C

C

C

C

osseq

t

d(on)

t

d(off)

Q
Q
Q

1. Pulsed: pulse duration=300 µs, duty cycle 1.5%

2. C
increases from 0 to 80% V

Forward transconductance V

Input capacitance

iss

Output capacitance

oss

Reverse transfer

rss

capacitance

Equivalent output

(2)

capacitance

Turn-on delay time

t

Rise time

r

Off-voltage rise time

t

Fall time

f

Total gate charge

g

Gate-source charge

gs

Gate-drain charge

gd

is defined as a constant equivalent capacitance giving the same charging time as C

oss eq.

DSS

=15 V, ID = 1.75 A - 4 S

DS

=25 V, f=1 MHz,

V

DS

VGS=0

=0, V

V

GS

=500 V, ID= 1.75 A,

V

DD

=4.7 Ω, VGS=10 V

R

G

=0 V to 800 V - 46.8 pF

DS

(see Figure 21)

=800 V, ID = 3.5 A

V

DD

=10 V

V

GS

(see Figure 22)

1154

-

106

21.3

22.5

7.7

-

51.5
19

42

-

7.3

59 nC

21.7

when VDS

oss

µA
µA

pF
pF
pF

ns
ns
ns
ns

nC
nC

4/15 Doc ID 10850 Rev 5

STP5NK100Z, STF5NK100Z, STW5NK100Z Electrical characteristics

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

SDM

V

I

I

I

SD

Q

RRM

Q

RRM

Source-drain current - 3.5 A

SD

(1)

Source-drain current (pulsed) - 14 A

(2)

Forward on voltage ISD= 3.5 A, VGS=0 - 1.6 V

= 3.5 A,

I

Reverse recovery time

t

rr

Reverse recovery charge

rr

Reverse recovery current

Reverse recovery time

t

rr

Reverse recovery charge

rr

Reverse recovery current

SD

di/dt = 100 A/µs,

=30 V

V

DD

(see Figure 23)

= 3.5 A,

I

SD

di/dt = 100 A/µs,

=35 V, Tj=150 °C

V

DD

(see Figure 23)

605

-

3.09

10.5

742

-

4.2

11.2

ns

µC

A

ns

µC

A

1. Pulse width limited by safe operating area

2. Pulsed: pulse duration=300 µs, duty cycle 1.5%

Table 8. Gate-source Zener diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

BV

Gate-source breakdown voltage Igs=± 1 mA (open drain) 30 V

GSO

The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.

Doc ID 10850 Rev 5 5/15