ST MICROELECTRONICS STP4NK60Z Datasheet
STP4NK60Z,
1
2
3
TAB
1
2
3
TO-220
TO-220FP
D(2, TAB)
G(1)
S(3)
AM01476v1
STP4NK60ZFP
N-channel 600 V, 1.7 Ω typ., 4 A Zener-protected SuperMESH™
Power MOSFETs in TO-220 and TO-220FP packages
Datasheet - production data
Features
Figure 1. Internal schematic diagram
Order codes V
STP4NK60Z
STP4NK60ZFP
DSRDS(on) max.PTOT
600 V 2 70 W 4 A
I
D
• 100% avalanche tested
• Very low intrinsic capacitances
• Zener-protected
Applications
• Switching applications
Description
These devices are N-channel Zener-protected
Power MOSFETs developed using
STMicroelectronics' SuperMESH™ technology,
achieved through optimization of ST's well
established strip-based PowerMESH™ layout. In
addition to a significant reduction in onresistance, this device is designed to ensure a
high level of dv/dt capability for the most
demanding applications.
Table 1. Device summary
Order codes Marking Packages Packaging
STP4NK60Z P4NK60Z TO-220
STP4NK60ZFP P4NK60ZFP TO-220FP
January 2014 DocID025020 Rev 2 1/16
This is information on a product in full production.
Tube
www.st.com
Contents STP4NK60Z, STP4 NK60ZFP
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16 DocID025020 Rev 2
STP4NK60Z, STP4NK60ZFP Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Value
Symbol Parameter
TO-220 TO-220FP
Unit
I
DM
P
V
V
DS
GS
I
D
I
D
TOT
Drain-source voltage 600 V
Gate- source voltage ± 30 V
Drain current (continuous) at TC = 25 °C 4 4
Drain current (continuous) at TC = 100 °C 2.5 2.5
(2)
Drain current (pulsed) 16 16
Total dissipation at TC = 25 °C 70 25 W
Derating factor 0.56 0.2 W/°C
ESD
dv/dt
V
ISO
T
stg
T
1. Limited by maximum junction temperature.
2. Pulse width limited by safe operating area
3. I
SD
Gate-source human body model (C=100 pF, R=1.5
kΩ)
(3)
Peak diode recovery voltage slope 4.5 V/ns
Insulation withstand voltage (RMS) from all three
leads to external heat sink (t=1 s; T
Storage temperature -55 to 150 °C
Max operating junction temperature 150 °C
j
≤ 4 A, di/dt ≤ 200 A/μs, V
≤ V
DD
(BR)DSS
Table 3. Thermal data
, TJ ≤ T
=25 °C)
C
JMAX.
(1)
(1)
(1)
A
A
A
3kV
2500 V
Value
Symbol Parameter
TO-220 TO-220FP
R
thj-case
R
thj-amb
Thermal resistance junction-case max 1.79 5 °C/W
Thermal resistance junction-ambient max 62.5 °C/W
T able 4. Avalanche characteristics
Symbol Parameter Value Unit
I
AR
E
Avalanche current, repetitive or not-repetitive
(pulse width limited by T
j max
Single pulse avalanche energy
AS
(starting TJ = 25 °C, ID=IAR, VDD= 50 V)
)
4A
120 mJ
DocID025020 Rev 2 3/16
Unit
16
Electrical characteristics STP4NK60Z , STP4NK60ZFP
2 Electrical characteristics
(T
= 25 °C unless otherwise specified)
CASE
T a ble 5. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source
breakdown voltage
Zero gate voltage
drain current (VGS = 0)
Gate-body leakage
current (VDS = 0)
ID =1 mA 600 V
V
= 600 V
DS
V
= 600 V, TC = 125 °C
DS
150μA
VGS = ± 20 V ± 10 μA
Gate threshold voltage VDS = VGS, ID = 50 μA 3 3.75 4.5 V
Static drain-source on
resistance
= 10 V, ID = 2 A 1.7 2
V
GS
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
g
C
oss eq.
fs
C
C
C
Forward transconductance VDS = 15 V, ID = 2 A - 3 S
Input capacitance
iss
Output capacitance - 67 pF
oss
Reverse transfer capacitance - 13 pF
rss
Equivalent output
(2)
capacitance
VDS = 25 V, f = 1 MHz,
V
= 0
GS
V
=0, VDS = 0 to 480 V - 38.5 pF
DS
- 510 pF
μA
t
d(on)
t
d(off)
t
r(Voff)
Q
Q
Q
1. Pulsed: pulse duration=300μs, duty cycle 1.5%
2. C
increases from 0 to 80% V
Turn-on delay time
= 300 V, ID = 2 A,
V
t
Rise time - 9.5 ns
r
Turn-off delay time - 29 ns
t
Fall time - 16.5 ns
f
Off-voltage rise time
t
Fall time - 12 ns
r
t
Cross-over time - 19.5 ns
c
Total gate charge
g
Gate-source charge - 3.8 nC
gs
Gate-drain charge - 9.8 nC
gd
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
DSS
.
DD
R
= 4.7 Ω, V
G
(see Figure 17)
VDD = 480 V, ID = 4 A,
= 4.7 Ω, V
R
G
(see Figure 19)
VDD = 480 V, ID = 4 A,
VGS = 10 V
(see Figure 18)
4/16 DocID025020 Rev 2
GS
GS
= 10 V
= 10 V
-12 ns
-12 ns
-18.826 nC
when VDS
oss
STP4NK60Z, STP4NK60ZFP Electrical characteristics
Table 7. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
SDM
V
SD
Q
I
RRM
1. Pulsed: pulse duration = 300 μs, duty cycle 1.5%
2. Pulse width limited by safe operating area
Source-drain current - 4 A
SD
(1)
Source-drain current (pulsed) - 16 A
(2)
Forward on voltage ISD = 4 A, VGS = 0 - 1.6 V
t
Reverse recovery time
rr
Reverse recovery charge - 1700 nC
rr
Reverse recovery current - 8.5 A
I
= 4 A, di/dt = 100 A/μs
SD
VDD = 24 V, Tj = 150 °C
(see Figure 19)
- 400 ns
Table 8. Gate-source Zener diode
Symbol Parameter Test conditions Min Typ. Max. Unit
V
(BR)GSO
Gate-source breakdown voltage IGS = ± 1mA, ID=0 30 - - V
The built-in back-to-back Zener diodes have been specifically designed to enhance not only
the device’s ESD capability, but also to make them capable of safely absorbing any voltage
transients that may occasionally be applied from gate to source. In this respect, the Zener
voltage is appropriate to achieve efficient and cost-effective protection of device integrity.
The integrated Zener diodes thus eliminate the need for external components.
DocID025020 Rev 2 5/16
16
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