ST MICROELECTRONICS STP45N10F7 Datasheet
1
2
3
TAB
1
2
3
TAB
DPAK
TAB
TO-220
I PAK
2
STD45N10F7, STI45N10F7,
STP45N10F7
N-channel 100 V, 0.0145 typ., 45 A, STripFET™ F7
Power MOSFETs in DPAK, I
3
1
2
PAK and TO-220 packages
Features
Order code V
STD45N10F7
STP45N10F7
Datasheet - production data
R
DS
100 V 0.018 45 A 60 WSTI45N10F7
DS(on)
max.
P
I
D
TOT
Figure 1. Internal schematic diagram
'7$%
*
6
$0Y
• Among the lowest R
on the market
DS(on)
• Excellent figure of merit (FoM)
• Low C
rss/Ciss
ratio for EMI immunity
• High avalanche ruggedness
Applications
• Switching applications
Description
These N-channel Power MOSFETs utilize
STripFET™ F7 technology with an enhanced
trench gate structure that results in very low onstate resistance, while also reducing internal
capacitance and gate charge for faster and more
efficient switching.
Table 1. Device summary
Order code Marking Package Packing
STD45N10F7
STI45N10F7 I
STP45N10F7 TO-220
September 2015 DocID024455 Rev 2 1/20
This is information on a product in full production.
45N10F7
DPAK Tape and reel
2
PAK
Tube
www.st.com
Contents STD45N10F7, STI45N10F7, STP45N10F7
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1 DPAK (TO-252) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 I²PAK (TO-262) package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.3 TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/20 DocID024455 Rev 2
STD45N10F7, STI45N10F7, STP45N10F7 Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
DS
V
GS
I
D
I
D
I
DM
P
TOT
E
AS
T
T
stg
1. Pulse width limited by safe operating area.
2. Starting TJ = 25°C, Id = 10 A, V
Drain-source voltage 100 V
Gate-source voltage ±20 V
Drain current (continuous) at TC = 25 °C 45 A
Drain current (continuous) at TC = 100 °C 32 A
(1)
Drain current (pulsed) 180 A
Total dissipation at Tc = 25 °C 60 W
(2)
Single pulse avalanche energy 190 mJ
Operating junction temperature
J
Storage temperature °C
= 50 V
dd
Table 3. Thermal resistance
Symbol Parameter
R
thj-case
R
thj-amb
R
thj-pcb
1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec.
Thermal resistance junction-case 2.5 2.5 °C/W
Thermal resistance junction-ambient 62.5 °C/W
(1)
Thermal resistance junction-pcb 31.2 °C/W
DPAK
-55 to 175
Value
TO-220
2
PAK
I
°C
Unit
DocID024455 Rev 2 3/20
20
Electrical characteristics STD45N10F7, STI45N10F7, STP45N10F7
2 Electrical characteristics
(T
= 25 °C unless otherwise specified)
CASE
Table 4. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source breakdown
voltage (VGS= 0)
Zero gate voltage drain
current (V
GS
= 0)
Gate body leakage current
= 0)
(V
DS
Gate threshold voltage V
Static drain-source onresistance
= 1 mA 100 - V
I
D
V
= 100 V 10 µA
DS
V
= 100 V; TC =125 °C 100 µA
DS
V
= ±20 V ±100 nA
GS
= VGS, ID = 250 µA 2.5 4.5 V
DS
= 10 V, ID = 22.5 A 0.0145 0.018
V
GS
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
C
C
C
Q
Q
Q
Input capacitance
iss
Output capacitance - 360 - pF
oss
Reverse transfer
rss
capacitance
Total gate charge
g
Gate-source charge - 5.1 - nC
gs
Gate-drain charge - 12.2 - nC
gd
= 50 V, f =1 MHz,
V
DS
= 0
V
GS
= 50 V, ID = 45 A
V
DD
= 10 V
V
GS
Figure 14
- 1640 - pF
-25 - pF
-25 -nC
Table 6. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
4/20 DocID024455 Rev 2
Turn-on delay time
= 50 V, ID = 22.5 A,
V
Rise time - 17 - ns
t
r
Turn-off delay time - 24 - ns
Fall time - 8 - ns
t
f
DD
= 4.7 Ω, V
R
G
Figure 13
GS
-15 - ns
= 10 V
STD45N10F7, STI45N10F7, STP45N10F7 Electrical characteristics
Table 7. Source-drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration=300 µs, duty cycle 1.5%.
Source-drain current - 45 A
(1)
Source-drain current (pulsed) - 180 A
(2)
Forward on voltage I
Reverse recovery time
rr
Reverse recovery charge - 67 nC
rr
Reverse recovery current - 2.5 A
= 45 A, V
I
SD
SD
= 45 A,
GS
di/dt = 100 A/µs,
= 80 V, Tj = 150 °C
V
DD
= 0 - 1.1 V
-53 ns
DocID024455 Rev 2 5/20
20
Electrical characteristics STD45N10F7, STI45N10F7, STP45N10F7
I
D
10
1
0.1
0.1
1
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
100µs
1ms
10ms
0.01
Tj=175°C
Tc=25°C
Single pulse
100
AM16107v1
Single pulse
0.05
0.02
0.01
δ=0.5
0.2
0.1
K
10
t
p
(s)
-4
10
-3
10
-1
10
-5
10
-2
10
-2
10
-1
10
0
AM16120v1
I
D
100
60
20
0
0
2
V
DS
(V)
4
(A)
6
5V
6V
VGS=10V
40
80
8
120
140
160
7V
8V
9V
AM16109v1
I
D
120
80
40
0
0
4
V
GS
(V)
8
(A)
2
6
10
20
60
100
140
VDS=8V
AM16110v1
V
GS
6
4
2
0
0
10
Q
g
(nC)
(V)
30
8
15
20
10
VDD=50V
12
5
25
I
D
=45A
AM16111v1
R
DS(on)
14
13.5
13
10
I
D
(A)
(m
Ω)
5
15
14.5
VGS=10V
20
25
15
15.5
16
30
35
40
16.5
AM16112v1
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance
6/20 DocID024455 Rev 2
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