ST MICROELECTRONICS STP3NK90ZFP Datasheet

DPAK

1

2

3

TAB

TO-220

1

2

3

TO-220FP

1

3

2

TAB

D(2, TAB)

G(1)

S(3)

AM01475V1

STD3NK90ZT4, STP3NK90Z, STP3NK90ZFP

Datasheet

N-channel 900 V, 3.6 Ω typ., 3 A SuperMESH™ Power MOSFETs

in DPAK, TO-220 and TO-220FP packages

Features

Product status link

STD3NK90ZT4

STP3NK90Z

STP3NK90ZFP

Order code

V

DS

STD3NK90ZT4

STP3NK90Z TO-220

900 V 4.8 Ω 3 A

R

max. I

DS(on)

D

Package

DPAK

STP3NK90ZFP TO-220FP

• Extremely high dv/dt capability

• 100% avalanche tested

• Gate charge minimized

• Very low intrinsic capacitance

• Zener-protected

Applications

• Switching applications

Description

These high-voltage devices are Zener-protected N-channel Power MOSFETs developed using the SuperMESH™ technology by STMicroelectronics, an optimization of the well-established PowerMESH™. In addition to a significant reduction in on-resistance, these devices are designed to ensure a high level of dv/dt capability for the most demanding applications.

DS2980 - Rev 3 - August 2018 For further information contact your local STMicroelectronics sales office.

www.st.com

1 Electrical ratings

STD3NK90ZT4, STP3NK90Z, STP3NK90ZFP

Electrical ratings

Table 1. Absolute maximum ratings

Symbol Parameter

V

DS

V

GS

I

D

I

D

IDM

P

TOT

ESD

dv/dt

V

ISO

T

stg

Drain-source voltage 900 V

Gate-source voltage ± 30 V

Drain current (continuous) at TC = 25 °C

Drain current (continuous) at TC = 100 °C

(2)

Drain current (pulsed) 12

Total dissipation at TC = 25 °C

Gate-source human body model (R = 1,5 kΩ, C = 100 pF)

(3)

Peak diode recovery voltage slope 4.5 V/ns

Insulation withstand voltage (RMS) from all three

leads to external heat sink (t = 1 s; Tc = 25 °C)

Operating junction temperature range

j

Storage temperature range

1. Limited by maximum junction temperature.

2. Pulse width limited by safe operating area.

3. ISD ≤ 3 A, di/dt ≤ 200 A/μs, V

DS(peak)

≤ V

(BR)DSS

, VDD = 80% V

Value

DPAK, TO-220 TO-220FP

3

1.89

90 25 W

4 kV

-55 to 150 °C

.

(BR)DSS

(1)

3

(1)

1.89

(1)

12

2.5 kV

Unit

A

Table 2. Thermal data

Symbol

R

thj-case

R

thj-amb

R

thj-pcb

1. When mounted on 1inch² FR-4, 2 Oz copper board.

Thermal resistance junction-case 1.38 5

Thermal resistance junction-ambient 62.5

(1)

Thermal resistance junction-pcb 50

Parameter

Table 3. Avalanche characteristics

Symbol

(1)

IAR

EAS

1. Pulse width limited by T

2. Starting Tj = 25°C, ID = IAR, VDD = 50 V.

Avalanche current, repetitive or not-repetitive 3 A

(2)

Single pulse avalanche energy 180 mJ

.

jmax

Parameter Value Unit

Value

Unit

DPAK TO-220 TO-220FP

°C/W

DS2980 - Rev 3

page 2/24

2 Electrical characteristics

(T

= 25 °C unless otherwise specified)

CASE

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

1. Defined by design, not subject to production test.

Drain-source breakdown voltage

Zero gate voltage drain current

Gate body leakage current

Gate threshold voltage

Static drain-source on resistance

STD3NK90ZT4, STP3NK90Z, STP3NK90ZFP

Table 4. On/off states

ID = 1 mA, VGS = 0 V

VGS = 0 V, VDS = 900 V

VGS = 0 V, VDS = 900 V, TC = 125 °C

VDS = 0 V, VGS = ±20 V

VDS = VGS, ID = 50 µA

VGS = 10 V, ID = 1.5 A

Electrical characteristics

900 V

1 µA

(1)

50 μA

±10 μA

3 3.75 4.5 V

3.6 4.8 Ω

C

1. C

Table 5. Dynamic

Symbol

C

iss

C

oss

C

rss

(1)

oss eq.

Q

g

Q

gs

Q

gd

is defined as a constant equivalent capacitance giving the same charging time as C

oss eq.

to 80% V

DSS

Parameter Test conditions Min. Typ. Max. Unit

Input capacitance

Output capacitance 63

VDS = 25 V, f = 1 MHz, VGS = 0 V

Reverse transfer capacitance

Equivalent output capacitance

Total gate charge

Gate-source charge 4.2

Gate-drain charge 12

VDS = 0 to 720 V, VGS = 0 V

VDD = 720 V, ID = 3 A, VGS = 0 to 10 V (see Figure 16. Test circuit for gate charge

behavior)

.

Table 6. Switching times

Symbol

t

d(on)

t

r

t

d(off)

t

f

Parameter Test conditions Min. Typ. Max. Unit

Turn-on delay time

Rise time 7

Turn-off delay time 45

Fall time 18

VDD = 450 V, ID = 1.5 A,

RG = 4.7 Ω, VGS = 10 V

(see Figure 15. Test circuit for resistive load

switching times and Figure 20. Switching time waveform)

590

-

- pF

13

- 35 - pF

22.7

-

when VDS increases from 0

oss

- nC

18

-

- ns

DS2980 - Rev 3

page 3/24

STD3NK90ZT4, STP3NK90Z, STP3NK90ZFP

Electrical characteristics

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

SD

I

SDM

VSD

t

rr

Q

I

RRM

1. Pulse width limited by safe operating area.

2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)GSO

Source-drain current

(1)

(pulsed)

(2)

Forward on voltage

Reverse recovery time

Reverse recovery charge 2.2 μC

rr

Reverse recovery current 8.7 A

ISD = 3 A, VGS = 0 V

ISD = 3 A, di/dt = 100 A/µs

VDD = 40 V, TJ = 150 °C

(see Figure 17. Test circuit for inductive

load switching and diode recovery times)

-

- 1.6 V

510 ns

-

Table 8. Gate-source Zener diode

Gate-source breakdown voltage

IGS = ±1 mA, ID = 0 A

30 - - V

3

12

A

The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry.

DS2980 - Rev 3

page 4/24

2.1 Electrical characteristics curves

δ=0.5

K

tp(s)

10

-4

10

-3

10

-1

10

-2

δ=0.2

10

-2

10

-3

10

0

10

-1

Single pulse

0.05

0.02

0.01

0.1

GC20940_ZTH

STD3NK90ZT4, STP3NK90Z, STP3NK90ZFP

Electrical characteristics curves

Figure 1. Safe operating area for DPAK, TO-220

Figure 3. Safe operating area for TO-220FP

Figure 2. Thermal impedance for DPAK, TO-220

Figure 4. Thermal impedance for TO-220FP

DS2980 - Rev 3

Figure 5. Output characterisics Figure 6. Transfer characteristics

page 5/24

STD3NK90ZT4, STP3NK90Z, STP3NK90ZFP

Electrical characteristics curves

Figure 7. Static drain-source on resistance Figure 8. Gate charge vs gate-source voltage

Figure 9. Capacitance variations

Figure 10. Normalized gate threshold voltage vs

temperature

Figure 11. Normalized on resistance vs temperature Figure 12. Source-drain diode forward characteristics

DS2980 - Rev 3

page 6/24

STD3NK90ZT4, STP3NK90Z, STP3NK90ZFP

Electrical characteristics curves

Figure 13. Maximum avalanche energy vs temperature

Figure 14. Normalized V

vs temperature

(BR)DSS

DS2980 - Rev 3

page 7/24

3 Test circuits

AM01468v1

V

D

R

G

R

L

D.U.T.

2200

μF

V

DD

3.3 μF

+

pulse width

V

GS

AM01469v1

47 kΩ

1 kΩ

47 kΩ

2.7 kΩ

1 kΩ

12 V

IG= CONST

100 Ω

100 nF

D.U.T.

+

pulse width

V

GS

2200

μF

V

G

V

DD

AM01470v1

A

D

D.U.T.

S

B

G

25 Ω

A

B

R

G

D

S

100 µH

µF

3.3

1000 µF

V

DD

D.U.T.

+

_

+

fast diode

AM01471v1

V

D

I

D

D.U.T.

L

V

DD

+

pulse width

V

i

3.3 µF

2200 µF

AM01472v1

V(BR)DSS

VDD

VD

IDM

ID

AM01473v1

0

V

GS

90%

V

DS

90%

10%

90%

10%

t

on

t

d(on)

t

r

0

t

off

t

d(off)

t

f

STD3NK90ZT4, STP3NK90Z, STP3NK90ZFP

Test circuits

Figure 15. Test circuit for resistive load switching times

Figure 17. Test circuit for inductive load switching and

diode recovery times

Figure 16. Test circuit for gate charge behavior

Figure 18. Unclamped inductive load test circuit

DS2980 - Rev 3

Figure 19. Unclamped inductive waveform

Figure 20. Switching time waveform

page 8/24

ST MICROELECTRONICS STP3NK90ZFP Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

1 Electrical ratings

2 Electrical characteristics

2.1 Electrical characteristics curves

3 Test circuits