ST MICROELECTRONICS STP2NK100Z Datasheet

1

2

3

TAB

TO-220

IPAK

TAB

1

2

3

TAB

1

3

2

DPAK

D(2, TAB)

G(1)

S(3)

AM01475V1

STD2NK100Z, STP2NK100Z, STU2NK100Z

Datasheet

N-channel 1000 V, 6.25 Ω typ., 1.85 A SuperMESH™ Power MOSFETs in

DPAK, TO-220 and IPAK packages

Features

Product status link

STD2NK100Z

STP2NK100Z

STU2NK100Z

Order code

V

DS

STD2NK100Z

STP2NK100Z TO-220

1000 V 8.5 Ω 1.85 A

R

max. I

DS(on)

D

Package

DPAK

STU2NK100Z IPAK

• Extremely high dv/dt capability

• 100% avalanche tested

• Gate charge minimized

• Very low intrinsic capacitance

• Zener-protected

Applications

• Switching applications

Description

These high-voltage devices are Zener-protected N-channel Power MOSFETs
developed using the SuperMESH™ technology by STMicroelectronics, an
optimization of the well-established PowerMESH™. In addition to a significant
reduction in on-resistance, these devices are designed to ensure a high level of dv/dt
capability for the most demanding applications.

DS5280 - Rev 3 - June 2018
For further information contact your local STMicroelectronics sales office.

www.st.com

1 Electrical ratings

Symbol Parameter Value Unit

V

DS

V

GS

I

D

I

D

IDM

P

TOT

ESD Gate-source human body model (C = 100 pF, R =1.5 kΩ) 3 kV

dv/dt

T

T

stg

1. Pulse width limited by safe operating area.

2. ISD ≤ 1.85 A, di/dt ≤ 200 A/µs, VDD = 80% V

Drain-source voltage 1000 V

Gate-source voltage ±30 V

Drain current (continuous) at TC = 25 °C

Drain current (continuous) at TC = 100 °C

(1)

Drain current (pulsed) 7.4 A

Total dissipation at TC = 25 °C

(2)

Peak diode recovery voltage slope 2.5 V/ns

Operating junction temperature range

j

Storage temperature range

STD2NK100Z, STP2NK100Z, STU2NK100Z

Table 1. Absolute maximum ratings

.

(BR)DSS

Electrical ratings

1.85 A

1.16 A

70 W

-55 to 150 °C

Table 2. Thermal data

Symbol

R

thj-case

R

thj-pcb

R

thj-amb

1. When mounted on FR-4 board of 1 inch², 2 oz Cu.

Thermal resistance junction-case 1.79

(1)

Thermal resistance junction-pcb 50 - -

Thermal resistance junction-ambient 62.5 100

Parameter

Table 3. Avalanche characteristics

Symbol

(1)

IAR

EAS

1. Pulse width limited by T

2. Starting Tj = 25°C, ID = IAR, VDD = 50 V

Avalanche current, repetitive or not-repetitive 1.85 A

(2)

.

Single pulse avalanche energy 170 mJ

.

jmax

Parameter Value Unit

Value

Unit

DPAK TO-220 IPAK

°C/W

DS5280 - Rev 3

page 2/23

2 Electrical characteristics

(T

= 25 °C unless otherwise specified)

CASE

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

1. Defined by design, not subject to production test.

Drain-source breakdown
voltage

Zero gate voltage drain
current

Gate-body leakage
current

Gate threshold voltage

Static drain-source on
resistance

STD2NK100Z, STP2NK100Z, STU2NK100Z

Table 4. On/off states

VGS = 0 V, ID = 1 mA

VGS = 0 V, VDS = 1000 V

VGS = 0 V, VDS = 1000 V,
TC = 125 °C

VDS = 0 V, VGS = ±30 V

VDS = VGS, ID = 50 µA

VGS = 10 V, ID = 0.9 A

(1)

Electrical characteristics

1000 V

1 µA

50 µA

±10 µA

3 3.75 4.5 V

6.25 8.5 Ω

C

1. C

Table 5. Dynamic

Symbol

C

iss

C

oss

C

rss

(1)

oss eq.

R

G

Q

g

Q

gs

Q

gd

is defined as a constant equivalent capacitance giving the same charging time as C

oss eq.

80% V

DSS

.

Parameter Test conditions Min. Typ. Max. Unit

Input capacitance

Output capacitance 53

Reverse transfer

VDS = 25 V, f = 1 MHz,

VGS = 0 V

capacitance

Equivalent output
capacitance

VGS = 0 V, VDS = 0 V to 800 V

Gate input resistance f = 1 MHz, open drain - 6.6 - Ω

Total gate charge

Gate-source charge 3

Gate-drain charge 9

VDD = 800 V, ID = 1.85 A,

VGS = 0 to 10 V

(see Figure 16. Test circuit for gate charge

behavior)

Table 6. Switching times

Symbol

t

d(on)

t

r

t

d(off)

t

r

Parameter Test conditions Min. Typ. Max. Unit

Turn-on delay time

Rise time 6.5

Turn-off delay time 41.5

Fall time 32.5

VDD = 500 V, ID = 0.9 A, RG = 4.7 Ω,
VGS = 10 V

(see Figure 15. Test circuit for resistive load

switching times and Figure 20. Switching
time waveform)

499

-

- pF

9

- 28 - pF

16

-

when VDSincreases from 0 to

oss

- nC

7.2

-

- ns

DS5280 - Rev 3

page 3/23

STD2NK100Z, STP2NK100Z, STU2NK100Z

Electrical characteristics

Table 7. Source-drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

SD

I

SDM

VSD

t

rr

Q

I

RRM

t

rr

Q

I

RRM

1. Pulse width is limited by safe operating area.

2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%.

Source-drain current - 1.85

Source-drain current

(1)

(pulsed)

(2)

Forward on voltage

Reverse recovery time

Reverse recovery charge - 1.6 μC

rr

Reverse recovery current - 6.9 A

Reverse recovery time

Reverse recovery charge - 1.9 μC

rr

Reverse recovery current - 88 A

ISD = 1.85 A, VGS = 0 V

ISD = 1.85 A, di/dt = 100 A/µs

VDD = 60 V

(see Figure 17. Test circuit for inductive

load switching and diode recovery times)

ISD = 1.85 A, di/dt = 100 A/µs

VDD = 60 V, Tj = 150 °C

(see Figure 17. Test circuit for inductive

load switching and diode recovery times)

- 7.4

- 1.6 V

- 476 ns

- 532 ns

A

Table 8. Gate-source Zener diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)GSO

Gate-source breakdown
voltage

IGS = ±1 mA, ID = 0 A

30 - - V

The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.
The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for
additional external componentry.

DS5280 - Rev 3

page 4/23

2.1 Electrical characteristics (curves)

δ=0.5

K

10

tp(s)

-5

10

-4

10

-3

10

-1

10

-2

δ=0.2

10

-1

10

-2

Single pulse

0.05

0.02

0.01

0.1

GC20540_ZTH

STD2NK100Z, STP2NK100Z, STU2NK100Z

Electrical characteristics (curves)

Figure 1. Safe operating area for IPAK, DPAK

Figure 3. Safe operating area for TO-220

Figure 2. Thermal impedance for IPAK, DPAK

Figure 4. Thermal impedance for TO-220

DS5280 - Rev 3

Figure 5. Output characterisics Figure 6. Transfer characteristics

page 5/23

VDS=V

GS

STD2NK100Z, STP2NK100Z, STU2NK100Z

Electrical characteristics (curves)

Figure 7. Normalized V

(BR)DSS

vs temperature

Figure 8. Static drain-source on resistance

Figure 9. Gate charge vs gate-source voltage Figure 10. Capacitance variations

Figure 11. Normalized gate threshold voltage vs

temperature

DS5280 - Rev 3

Figure 12. Normalized on resistance vs temperature

page 6/23

TJ(°C)14013012 011010 09080706050403020100

E

AS(

mJ )
190
180
170
160
150
140
1

30
120
110

100

90
80
70
60
50
40
30
20
10

AM00056 v1

I

D

=1.8 5A

STD2NK100Z, STP2NK100Z, STU2NK100Z

Electrical characteristics (curves)

Figure 13. Source-drain diode forward characteristics

Figure 14. Maximum avalanche energy vs temperature

DS5280 - Rev 3

page 7/23