ST MICROELECTRONICS STP2N80K5 Datasheet

Page 1
STD2N80K5, STF2N80K5,
D(2, TAB)
G(1)
S(3)
AM01476v1
TO-220
1
2
3
TAB
1
3
DPAK
TAB
TO-220FP
IPA K
STP2N80K5, STU2N80K5
N-channel 800 V, 3.5 Ω typ., 2 A MDmesh™ K5 Power MOSFETs
in DPAK, TO-220FP, TO-220 and IPAK packages
Datasheet − production data
Features
2
1
TAB
3
2
1

Figure 1. Internal schematic diagram

Order codes V
STD2N80K5
3
STF2N80K5 20 W STP2N80K5
800 V 4.5 Ω 2 A
STU2N80K5
Industry’s lowest R
DS
R
DS(on)
DS(on)
max I
* area
P
D
TOT
45 W
45 W
Industry’s best figure of merit (FoM)
Ultra low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
These very high voltage N-channel Power MOSFETs are designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency.

Table 1. Device summary

Order codes Marking Package Packaging
STD2N80K5
DPAK Tape and reel
STF2N80K5 TO-220FP
2N80K5
TubeSTP2N80K5 TO-220
STU2N80K5 IPAK
September 2015 DocID024993 Rev 3 1/22
This is information on a product in full production.
www.st.com
22
Page 2
Contents STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1 DPAK (TO-252) type A package information . . . . . . . . . . . . . . . . . . . . . . 10
4.2 TO-220FP package in formation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.3 TO-220 package in formation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.4 IPAK (TO-251) type A package information . . . . . . . . . . . . . . . . . . . . . . . 17
5 Packaging information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2/22 DocID024993 Rev 3
Page 3
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Value
Symbol Parameter
V
GS
I
D
I
D
(2)
I
DM
P
TOT
I
AR
E
AS
dv/dt dv/dt
T
j
T
stg
1. For TO-220FP limited by maximum junction temperature.
2. Pulse width limited by safe operating area.
3. ISD 2 A, di/dt 100 A/µs, peak VDS V
4. VDS 640 V
Gate- source voltage 30 V Drain current (continuous) at TC = 25 °C 2 Drain current (continuous) at TC = 100 °C 1.3 A Drain curr ent (pulsed) 8 A Total dissipation at TC = 25 °C 45 20 W Max current during repetitive or single pulse
avalanche (pulse wi dth limited by T
jmax
Single pulse avalanche energy (starting TJ = 25 °C, ID=IAS, VDD= 50 V)
(3)
Peak diode recovery voltage slope 4.5 V/ns
(4)
MOSFET dv/dt ruggedness 50 V/ns Operating junction temperature Storage temperature °C
(BR)DSS
DPAK,
TO-220,
TO-220FP
Unit
IPAK
(1)
)
0.5 A
A
60.5 mJ
°C
-55 to 150

Table 3. Thermal data

Symbol Parameter
R
thj-case
thj-pcb
R
thj-amb
1. When mounted on FR-4 board of 1 inch², 2 oz Cu.
Thermal resistance jun cti on- cas e 2.78 6.25 2.78 2.78 Thermal resistance jun cti on- pcb 50 Thermal resistance jun cti on- amb 62.5 100
DocID024993 Rev 3 3/22
Value
DPAK TO-220FP TO-220 IPAK
(1)
Unit
°C/WR
Page 4
Electrical characteristics STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5

2 Electrical characteristics

(T
= 25 °C unless otherwise specified).
CASE

T a ble 4. On/off states

Symbol Parameter Test conditions Min. T yp . Max. Uni t
V
V
R
(BR)DSS
I
DSS
I
GSS
GS(th)
DS(on)
Drain-source breakdown voltage (V
GS
= 0)
Zero gate voltage drain current (V
GS
= 0)
Gate body leakage current (V
= 0)
DS
Gate threshold volta ge V Static drain-source on-
resistance
= 1 mA 800 V
I
D
V
= 800 V 1 µA
DS
V
= 800 V TC=125 °C 50 µA
DS
= ± 20 V ±10 µA
V
GS
= VGS, ID = 100 µA 3 4 5 V
DS
= 10 V , ID= 1 A 3.5 4.5 Ω
V
GS

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit
C
C
C
C
C
o(tr)
o(er)
Input capacitance
iss
Output capacitance - 8 - pF
oss
Reverse transfer
rss
capacitance Equivalent capacit ance time
(1)
V
=100 V, f=1 MHz, VGS=0
DS
related
= 0, VDS = 0 to 640 V
V
Equivalent capacitance
(2)
GS
energy related
- 105 - pF
-0.5-pF
-16-pF
-7-pF
R
Q Q Q
1. Time related is defined as a constant equivalent capacitance giving the same charging time as C VDS increases from 0 to 80% V
2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as C when V
Intrinsic gate resistance f = 1 MHz, ID=0 - 18 - Ω
G
Total gate charge
g
Gate-source charge - 1 - nC
gs
Gate-drain charge - 3.7 - nC
gd
DSS
increases from 0 to 80% V
DS
DSS
V
= 640 V, ID = 2 A
DD
V
=10 V
GS
4/22 DocID024993 Rev 3
-5-nC
when
oss
oss
Page 5
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Electrical characteristics

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
Turn-on delay time
t
Rise time - 12 - ns
r
Turn-of f del ay time - 19 - ns
t
Fall time - 32 - ns
f
= 400 V, ID = 1 A,
V
DD
=4.7 Ω, VGS=10 V
R
G
-8-ns

T a ble 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
t
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Source-drain current - 2 A
(1)
Source-drain current (pulsed) - 8 A
(2)
Forward on voltage ISD= 2 A, VGS=0 - 1.5 V Reverse recovery time
rr
Reverse recovery charge - 1 µC
rr
I
= 2 A, VDD= 60 V
SD
di/dt = 100 A/µs,
- 255 ns
Reverse recovery current - 8 A Reverse recovery time
rr
Reverse recovery charge - 1.45 µC
rr
Reverse recovery current - 7.5 A
ISD= 2 A,VDD= 60 V di/dt=100 A/µs,
Tj=150 °C
- 285 ns

Table 8. Gate-source Zener diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)GSO
Gate-source breakdown voltage IGS= ± 1mA, ID= 0 30 - - V
The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD capability of the device. The Zener voltage is appropriate for efficient and cost-effective intervention to protect the device integrity. These integrated Zener diodes thus eliminate the need for external components.
DocID024993 Rev 3 5/22
Page 6
Electrical characteristics STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5
I
D
10
1
0.1
0.1
1
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10ms
1ms
100μs
0.01
Tj=150°C Tc= 2 5° C
Single pulse
10ms
100
AM18072v1
I
D
10
1
0.1
0.1
1
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10μs
1ms
100μs
0.01
Tj=150°C Tc=25°C
Single pulse
10ms
100
AM18073v1
I
D
1
0.1
0.1
1
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10μs
1ms
100μs
0.01
Tj=150°C Tc=25°C
Single pulse
10ms
100
AM18074v1

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for DPAK and

Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP

IPAK
Figure 3. Thermal impedance for DPAK and
IPAK

Figure 6. Safe operating area for TO-220 Figure 7. Thermal impedance for TO-220

6/22 DocID024993 Rev 3
Page 7
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Electrical characteristics
I
D
2.5
1.5
0.5
0.0 0
2
V
DS
(V)
4
(A)
6
6V
7V
VGS=10, 11V
1.0
2.0
3.0
8V
9V
8
10
12
14
16
AM18075v1
10
6
4
2
0
02413
8
10
12
500
300
200
100
0
400
600
Q
g
(nC)
V
GS
(V)
V
DS
V
DS
(V)
14
65
700
V
DD
= 640 V
I
D
= 2 A
AM18076v1
R
DS(on)
2
0
0.0 1.0
I
D
(A)
(
Ω)
0.5 1.5
VGS=10V
2.0
4
6
2.5
AM18077v1
C
100
10
1
0.1
0.1
10
V
DS
(V)
(pF)
1
100
Ciss
Coss
Crss
100
f = 1MHz
AM18078v1

Figure 8. Output characteristics Figure 9. Transfer characteristics

I
D
(A)
3
2.5
2
1.5
1
0.5
VDS=20V
AM18085v1
0

Figure 10. Gate charge vs gate-source voltage Figure 11. Static drain-source on-resistance

Figure 12. Capacitance variations Figure 13. Output capacitance stored energy

E
oss
6
5
7
9
8
10
V
GS
AM18079v1
(μJ)
(V)
2
0
0
200
400
600
800
V
DS
(V)
DocID024993 Rev 3 7/22
Page 8
Electrical characteristics STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5
1.1
0.8
0.6
0.4 T
J
(°C)
0.5
0.7
0.9
1
1.2
-100
0
-50
100
50
150
V
GS(th)
(norm)
AM18082v1
ID=100 μA
V
(BR)DSS
-100
0
T
J
(°C)
(norm)
-50
50
100
0.85
0.9
0.95
1
1.05
1.1
ID=1mA
AM18083v1
E
AS
0
40
T
J
(°C)
(mJ)
20
100
60
80
0
10
20
30
40
120
140
50
60
AM18086v1
Figure 14. Normalized gate threshold voltage vs
Figure 16. Normalized V
temperature
(BR)DSS
vs temperature Figure 17. Source-drain diode forward
Figure 15. Normalized on-resistance vs
temperature
150
AM18081v1
J
(°C)
T
DS(on)
R
(norm)
2.5
1.5
0.5
2
1
0
-100
-50
D
=1 A
I V
GS
=10 V
50
100
0
characteristics
(V)
V
SD
TJ=-50°C
1
0.9
TJ=25°C
AM18084v1
Figure 18. Maximum avalanche energy vs
8/22 DocID024993 Rev 3
starting T
J
0.8
0.7
0.6
0.5
TJ=150°C
0
0.5
1.5
1
I
SD
2
(A)
Page 9
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Test circuits
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
μF
3.3 μF
V
DD
AM01469v1
VDD
47kΩ
1kΩ
47kΩ
2.7kΩ
1kΩ
12V
V
i=20V=VGMAX
2200 μF
PW
IG=CONST
100Ω
100nF
D.U.T.
V
G
AM01470v1
A
D
D.U.T.
S
B
G
25
Ω
A
A
B
B
R
G
G
FAST DIODE
D
S
L=100μH
μF
3.3
1000
μF
V
DD
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID

3 Test circuits

Figure 19. Switching times test circuit for
resistive load
Figure 21. Test circuit for inductive load
switching and diode recovery times

Figure 20. Gate charge test circuit

Figure 22. Unclamped inductive load test circuit

L
VD
2200
μF
3.3 μF
VDD

Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform

ID
Vi
D.U.T.
Pw
AM01471v1
tdon
ton
tr
90%
tdoff
toff
tf
90%
10%
0
10%
VDS
90%
V
GS
10%
0
AM01473v1
DocID024993 Rev 3 9/22
Page 10
Package information STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5
B$B

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.

4.1 DPAK (TO-252) type A package information

Figure 25. DPAK (TO-252) type A outline

10/22 DocID024993 Rev 3
Page 11
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Package information

Table 9. DPAK (TO-252) type A mechanical data

mm
Dim.
Min. Typ. Max.
A2.20 2.40 A1 0.90 1.10 A2 0.03 0.23
b0.64 0.90
b4 5.20 5.40
c0.45 0.60
c2 0.48 0.60
D6.00 6.20 D1 4.95 5.10 5.25
E6.40 6.60 E1 4.60 4.70 4.80
e2.162.282.40
e1 4.40 4.60
H 9.35 10.10
L1.00 1.50
(L1) 2.60 2.80 3.00
L2 0.65 0.80 0.95 L4 0.60 1.00
R0.20 V2
DocID024993 Rev 3 11/22
Page 12
Package information STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5
)3BB

Figure 26. DPAK (TO-252) footprint

(a)
a. All dimensions are in millimeters
12/22 DocID024993 Rev 3
Page 13
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Package information
7012510_Rev_K_B

4.2 TO-220FP package information

Figure 27. TO-220FP package outline

DocID024993 Rev 3 13/22
Page 14
Package information STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5

T a ble 10. TO-220FP package mechanical data

mm
Dim.
Min. Typ. Max.
A4.4 4.6
B2.5 2.7
D2.5 2.75
E 0.45 0.7
F0.75 1 F1 1.15 1.70 F2 1.15 1.70
G 4.95 5.2 G1 2.4 2.7
H10 10.4
L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3
Dia 3 3.2
14/22 DocID024993 Rev 3
Page 15
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Package information
BW\SH$B5HYB7

4.3 TO-220 package information

Figure 28. TO-220 package outline

DocID024993 Rev 3 15/22
Page 16
Package information STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5

Table 11. TO-220 package mechanical data

mm
Dim.
Min. Typ. Max.
A4.40 4.60
b0.61 0.88
b1 1.14 1.70
c0.48 0.70
D 15.25 15.75 D1 1.27
E 10 10.40
e2.40 2.70
e1 4.95 5.15
F1.23 1.32 H1 6.20 6.60
J1 2.40 2.72
L13 14
L1 3.50 3.93 L20 16.40 L30 28.90
P3.75 3.85
Q2.65 2.95
16/22 DocID024993 Rev 3
Page 17
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Package information
B,.BW\SH$BUHY

4.4 IPAK (TO-251) type A package information

Figure 29. IPAK (TO-251) type A package outline

DocID024993 Rev 3 17/22
Page 18
Package information STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5

Table 12. IPAK (TO-251) type A package mechanical data

mm.
DIM
min. typ. max.
A 2.20 2.40
A1 0.90 1.10
b 0.64 0.90 b2 0.95 b4 5.20 5.40 B5 0.30
c 0.45 0.60
c2 0.48 0.60
D 6.00 6.20 E 6.40 6.60
e2.28 e1 4.40 4.60
H16.10
L 9.00 9.40 L1 0.80 1.20 L2 0.80 1.00 V1 10°
18/22 DocID024993 Rev 3
Page 19
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Packaging information
P1
A0
D1
P0
F
W
E
D
B0
K0
T
User direction of feed
P2
10 pitches cumulative tolerance on tape +/- 0.2 mm
User direction of feed
R
Bending radius
B1
For machine ref. only including draft and radii concentric around B0
AM08852v1
Top cover tape

5 Packaging information

Figure 30. Tape for DPAK

DocID024993 Rev 3 19/22
Page 20
Packaging information STD2N80K5, STF2N80K5, STP2N80K5, ST U2N8 0K5
A
D
B
Full radius
G measured at hub
C
N
REEL DIMENSIONS
40mm min.
Access hole
At slot location
T
Tape slot in core for tape start 25 mm min. width
AM08851v2

Figure 31. Reel for DPAK

T a ble 13. DPAK tape and reel mechanical data

Tape Reel
mm
Dim.
Dim.
Min. Max. Min. Max.
A0 6.8 7 A 330 B0 10.4 10.6 B 1.5 B1 12.1 C 12.8 13.2
D 1.5 1.6 D 20.2
D1 1.5 G 16.4 18.4
E 1.65 1.85 N 50
F 7.4 7.6 T 22.4 K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1
R40
T 0.25 0.35
mm
W 15.7 16.3
20/22 DocID024993 Rev 3
Page 21
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Revision history

6 Revision history

Table 14. Document revision history

Date Revision Changes
11-Jul-2013 1 First release.
– Added: IPAK package
value in Table 2
AS
in Table 3
thj-case
18-Feb-2014 2
– Modified: E – Modified: R – Modified: typical values in Table 5, 6 and 7 – Added: Section 2.1: Electrical characteristics (curves) – Updated: Figure25, 26 and Table 9 – Added: Table 12 and Figure 29 – Minor text changes
– Updated title, features and description in cover page.
25-Sep-2015 3
– Updated Figure 10, Figure 11 and Section 4: Package
information.
– Minor text changes.
DocID024993 Rev 3 21/22
Page 22
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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Purchasers are solely r espon si ble for t he cho ic e, s elect ion, a nd use of ST produc ts and ST assume s no l iabil ity f or app lication as sist ance or the design of Purchasers’ products.
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Resale of ST products with provis ions different from the information set forth herein sha ll void any warranty granted by ST for such product.
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Information in this document supers edes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics – All rights reserved
22/22 DocID024993 Rev 3
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