N-channel 800 V, 3.5 Ω typ., 2 A MDmesh™ K5 Power MOSFETs
in DPAK, TO-220FP, TO-220 and IPAK packages
Datasheet − production data
Features
2
1
TAB
3
2
1
Figure 1. Internal schematic diagram
Order codesV
STD2N80K5
3
STF2N80K520 W
STP2N80K5
800 V4.5 Ω2 A
STU2N80K5
• Industry’s lowest R
DS
R
DS(on)
DS(on)
maxI
* area
P
D
TOT
45 W
45 W
• Industry’s best figure of merit (FoM)
• Ultra low gate charge
• 100% avalanche tested
• Zener-protected
Applications
• Switching applications
Description
These very high voltage N-channel Power
MOSFETs are designed using MDmesh™ K5
technology based on an innovative proprietary
vertical structure. The result is a dramatic
reduction in on-resistance and ultra-low gate
charge for applications requiring superior power
density and high efficiency.
Table 1. Device summary
Order codesMarkingPackagePackaging
STD2N80K5
DPAKTape and reel
STF2N80K5TO-220FP
2N80K5
TubeSTP2N80K5TO-220
STU2N80K5IPAK
September 2015DocID024993 Rev 31/22
This is information on a product in full production.
1. For TO-220FP limited by maximum junction temperature.
2. Pulse width limited by safe operating area.
3. ISD ≤ 2 A, di/dt ≤ 100 A/µs, peak VDS ≤ V
4. VDS ≤ 640 V
Gate- source voltage30V
Drain current (continuous) at TC = 25 °C2
Drain current (continuous) at TC = 100 °C1.3A
Drain curr ent (pulsed)8A
Total dissipation at TC = 25 °C4520W
Max current during repetitive or single pulse
avalanche (pulse wi dth limited by T
jmax
Single pulse avalanche energy
(starting TJ = 25 °C, ID=IAS, VDD= 50 V)
(3)
Peak diode recovery voltage slope4.5V/ns
(4)
MOSFET dv/dt ruggedness50V/ns
Operating junction temperature
Storage temperature°C
(BR)DSS
DPAK,
TO-220,
TO-220FP
Unit
IPAK
(1)
)
0.5A
A
60.5mJ
°C
-55 to 150
Table 3. Thermal data
SymbolParameter
R
thj-case
thj-pcb
R
thj-amb
1. When mounted on FR-4 board of 1 inch², 2 oz Cu.
Thermal resistance jun cti on- cas e2.786.252.782.78
Thermal resistance jun cti on- pcb50
Thermal resistance jun cti on- amb 62.5100
Forward on voltage ISD= 2 A, VGS=0-1.5V
Reverse recovery time
rr
Reverse recovery charge-1µC
rr
I
= 2 A, VDD= 60 V
SD
di/dt = 100 A/µs,
-255ns
Reverse recovery current-8A
Reverse recovery time
rr
Reverse recovery charge-1.45µC
rr
Reverse recovery current-7.5A
ISD= 2 A,VDD= 60 V
di/dt=100 A/µs,
Tj=150 °C
-285ns
Table 8. Gate-source Zener diode
SymbolParameterTest conditionsMin.Typ. Max.Unit
V
(BR)GSO
Gate-source breakdown voltage IGS= ± 1mA, ID= 0 30--V
The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD
capability of the device. The Zener voltage is appropriate for efficient and cost-effective
intervention to protect the device integrity. These integrated Zener diodes thus eliminate the
need for external components.
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
4.1 DPAK (TO-252) type A package information
Figure 25. DPAK (TO-252) type A outline
10/22DocID024993 Rev 3
Page 11
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5Package information
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5Revision history
6 Revision history
Table 14. Document revision history
DateRevisionChanges
11-Jul-20131First release.
– Added: IPAK package
value in Table 2
AS
in Table 3
thj-case
18-Feb-20142
– Modified: E
– Modified: R
– Modified: typical values in Table 5, 6 and 7
– Added: Section 2.1: Electrical characteristics (curves)
– Updated: Figure25, 26 and Table 9
– Added: Table 12 and Figure 29
– Minor text changes
– Updated title, features and description in cover page.
25-Sep-20153
– Updated Figure 10, Figure 11 and Section 4: Package
information.
– Minor text changes.
DocID024993 Rev 321/22
Page 22
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5
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