December 2016
DocID15642 Rev 7
1/17
This is information on a product in full production.
www.st.com
STB26NM60N,
STP26NM60N
N-channel 600 V, 0.135 Ω typ., 20 A MDmesh™ II
Power MOSFETs in D²PAK and TO-220 packages
Datasheet - production data
Order code
VDS
R
DS(on)
max
ID
STB26NM60N
600 V
0.165 Ω
20 A
STP26NM60N
Order code
Marking
Package
Packaging
STB26NM60N
26NM60N
D²PAK
Tape and reel
STP26NM60N
TO-220
Tube
1
2
3
TAB
TO-220
TAB
D PAK
2
AM01475v1_noTab_noZen
D(2)
G(1)
S(3)
Features
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
Applications
Switching applications
Figure 1: Internal schematic diagram
Description
These devices are N-channel Power MOSFETs
developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the
company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
efficiency converters.
Table 1: Device summary
Contents
STB26NM60N, STP26NM60N
2/17
DocID15642 Rev 7
Contents
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1 Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package information ....................................................................... 9
4.1 D2PAK (TO-263) type A package information................................... 9
4.2 D2PAK packaging information ........................................................ 12
4.3 TO-220 type A package information ................................................ 14
5 Revision history ............................................................................ 16
STB26NM60N, STP26NM60N
Electrical ratings
DocID15642 Rev 7
3/17
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage
600
V
VGS
Gate-source voltage
±30 V ID
Drain current (continuous) at TC = 25 °C
20 A ID
Drain current (continuous) at TC = 100 °C
12.6
A
I
DM
(1)
Drain current (pulsed)
80
A
P
TOT
Total dissipation at TC = 25 °C
140
W
dv/dt
(2)
Peak diode recovery voltage slope
15
V/ns
T
stg
Storage temperature range
-55 to 150
°C
Tj
Operating junction temperature range
Notes:
(1)
Pulse width limited by safe operating area.
(2)
ISD ≤ 20 A, di/dt ≤ 400 A/µs, V
DS(peak)
≤ V
(BR)DSS, VDD
= 80% V
(BR)DSS
Symbol
Parameter
Value
Unit
D²PAK
TO-220
R
thj-case
Thermal resistance junction-case
0.89
°C/W
R
thj-amb
Thermal resistance junction-ambient
62.5
°C/W
R
thj-pcb
(1)
Thermal resistance junction-pcb
30
°C/W
Notes:
(1)
When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 s.
Symbol
Parameter
Value
Unit
IAS
Single pulse avalanche current (pulse width limited by T
jmax
)
6
A
EAS
Single pulse avalanche energy (starting TJ=25 °C, ID=IAS,
VDD=50 V)
610
mJ
1 Electrical ratings
Table 2: Absolute maximum ratings
Table 3: Thermal data
Table 4: Avalanche characteristics
Electrical characteristics
STB26NM60N, STP26NM60N
4/17
DocID15642 Rev 7
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
breakdown voltage
ID = 1 mA, VGS = 0 V
600
V
I
DSS
Zero gate voltage drain
current
VGS = 0 V, VDS = 600 V
1
µA
VGS = 0 V, VDS = 600 V,
TC= 125 °C
(1)
100
I
GSS
Gate-body leakage current
VDS = 0 V, VGS = ±25 V
±0.1
µA
V
GS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
2 3 4
V
R
DS(on)
Static drain-source onresistance
VGS = 10 V, ID = 10 A
0.135
0.165
Ω
Notes:
(1)
Defined by design, not subject to production test.
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
C
iss
Input capacitance
VDS = 50 V, f = 1 MHz,
VGS = 0 V
-
1800 - pF
C
oss
Output capacitance
-
115 - pF
C
rss
Reverse transfer
capacitance
- 6 -
pF
C
oss eq.
(1)
Equivalent output
capacitance
VGS = 0 V, VDS = 0 to 480 V
-
310 - pF
Qg
Total gate charge
VDD = 480 V, ID = 20 A,
VGS = 10 V
(see Figure 14: "Test circuit for
gate charge behavior"
-
60 - nC
Qgs
Gate-source charge
-
8.5 - nC
Qgd
Gate-drain charge
-
30 - nC
RG
Gate input resistance
f=1 MHz, ID=0 A
-
2.8 - Ω
Notes:
(1)
C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when VDS
increases from 0 to 80% V
DS
2 Electrical characteristics
(T
= 25 °C unless otherwise specified)
CASE
Table 5: On/off states
Table 6: Dynamic
STB26NM60N, STP26NM60N
Electrical characteristics
DocID15642 Rev 7
5/17
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
t
d(on)
Turn-on delay time
VDD = 300 V, ID = 10 A, RG = 4.7 Ω,
VGS = 10 V
(see Figure 13: "Test circuit for
resistive load switching times" and
Figure 18: "Switching time
waveform")
-
13 - ns
tr
Rise time
-
25 - ns
t
d(off)
Turn-off delay time
-
85 - ns
tf
Fall time
-
50 - ns
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
ISD
Source-drain current
-
20
A
I
SDM
(1)
Source-drain current
(pulsed)
-
80
A
V
SD
(2)
Forward on voltage
ISD = 20 A, VGS = 0
-
1.5
V
trr
Reverse recovery time
ISD = 20 A, di/dt = 100 A/µs
VDD = 60 V
(see Figure 15: "Test circuit for
inductive load switching and diode
recovery times")
-
370
ns
Qrr
Reverse recovery
charge
-
5.8 µC
I
RRM
Reverse recovery
current
-
31.6 A
trr
Reverse recovery time
ISD = 20 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 15: "Test circuit for
inductive load switching and diode
recovery times")
-
450
ns
Qrr
Reverse recovery
charge
-
7.5 µC
I
RRM
Reverse recovery
current
-
32.5 A
Notes:
(1)
Pulse width limited by safe operating area.
(2)
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Table 7: Switching times
Table 8: Source-drain diode
Electrical characteristics
STB26NM60N, STP26NM60N
6/17
DocID15642 Rev 7
Figure 2: Safe operating area
Figure 3: Thermal impedance
Figure 4: Output characteristics
Figure 5: Transfer characteristics
Figure 6: Gate charge vs gate-source voltage
Figure 7: Static drain-source on-resistance
W
2.1 Electrical characteristics (curves)
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