STB24N60DM2, STP24N60DM2,
D(2, TAB)
G(1)
S(3)
AM01476v1
D2PAK
TO-220
TO-247
1
3
2
TAB
1
2
3
TAB
1
2
3
STW24N60DM2
N-channel 600 V, 0.175 Ω typ., 18 A FDmesh II Plus™ low Q
Power MOSFETs in D2PAK, TO-220 and TO-247 packages
Datasheet − production data
Features
Figure 1. Internal schematic diagram
@
V
Order codes
STB24N60DM2
STW24N60DM2
DS
T
650 V 0.20 Ω 18 ASTP24N60DM2
Jmax
• Extremely low gate charge and input
capacitance
• Lower R
x area vs previous generation
DS(on)
• Low gate input resistance
• 100% avalanche tested
• Zener-protected
• Extremely high dv/dt and avalanche
capabilities
R
DS(on)
max
g
I
D
Applications
• Switching applications
Description
These FDmesh II Plus™ low Qg Power MOSFETs
with intrinsic fast-recovery body diode are
produced using a new generation of MDmesh™
technology: MDmesh II Plus™ low Q
revolutionary Power MOSFETs associate a
vertical structure to the company's strip layout to
yield one of the world's lowest on-resistance and
gate charge. They are therefore suitable for the
most demanding high efficiency converters and
ideal for bridge topologies and ZVS phase-shift
converters.
Table 1. Device summary
Order codes Marking Package Packaging
STB24N60DM2
STP24N60DM2 TO-220
STW24N60DM2 TO-247
24N60DM2
2
PAK Tape and reel
D
g
Tube
. These
March 2014 DocID025499 Rev 3 1/21
This is information on a product in full production.
www.st.com
Contents STB24N60DM2, STP24N60DM2, STW24N60DM2
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21 DocID025499 Rev 3
STB24N60DM2, STP24N60DM2, STW24N60DM2 Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
I
DM
P
dv/dt
dv/dt
T
1. Pulse width limited by safe operating area.
2. ISD ≤ 18 A, di/dt ≤ 400 A/μs; VDS
3. VDS ≤ 480 V
Gate-source voltage ± 25 V
GS
I
Drain current (continuous) at TC = 25 °C 18 A
D
I
Drain current (continuous) at TC = 100 °C 11 A
D
(1)
Drain current (pulsed) 72 A
Total dissipation at TC = 25 °C 150 W
TOT
(2)
Peak diode recovery voltage slope 40 V/ns
(3)
MOSFET dv/dt ruggedness 50 V/ns
Storage temperature
stg
T
Max. operating junction temperature
j
peak
< V
(BR)DSS
, VDD=400 V.
- 55 to 150 °C
Table 3. Thermal data
Value
Symbol Parameter
2
D
PAK TO-220 TO-247
Unit
R
thj-case
R
thj-pcb
R
thj-amb
1. When mounted on 1 inch² FR-4, 2 Oz copper board
Thermal resistance junction-case max 0.83 °C/W
Thermal resistance junction-pcb max
(1)
30 °C/W
Thermal resistance junction-ambient max 62.5 50 °C/W
T able 4. Avalanche characteristics
Symbol Parameter Value Unit
Avalanche current, repetitive or not
I
AR
repetitive (pulse width limited by T
E
Single pulse avalanche energy (starting
AS
T
=25°C, ID= IAR; VDD=50)
j
jmax
)
3.5 A
180 mJ
DocID025499 Rev 3 3/21
21
Electrical characteristics STB24N60DM2, STP24N60DM2, STW24N60DM2
2 Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source
breakdown voltage
Zero gate voltage
drain current (VGS = 0)
Gate-body leakage
current (V
DS
= 0)
ID = 1 mA, VGS = 0 600 V
V
= 600 V 1.5 μA
DS
V
= 600 V, TC=125 °C 100 μA
DS
= ± 25 V ±10 μA
V
GS
Gate threshold voltage VDS = VGS, ID = 250 μA 345V
Static drain-source
on-resistance
= 10 V, ID = 9 A 0.175 0.200 Ω
V
GS
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
- 1055 - pF
pF
-2.4-
pF
C
oss eq.
C
C
C
Input capacitance
iss
= 100 V, f = 1 MHz,
Output capacitance - 56 -
oss
Reverse transfer
rss
V
DS
VGS = 0
capacitance
Equivalent output
(1)
capacitance
G
Intrinsic gate
resistance
R
= 0 to 480 V, VGS = 0 - 259 - pF
V
DS
f = 1 MHz, I
= 0 - 7 - Ω
D
Q
Q
Q
1. C
oss eq.
increases from 0 to 80% V
Total gate charge
g
Gate-source charge - 6 - nC
gs
Gate-drain charge - 12 - nC
gd
is defined as a constant equivalent capacitance giving the same charging time as C
DSS
VDD = 480 V, ID = 18 A,
VGS = 10 V
(see Figure 17)
Table 7. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
4/21 DocID025499 Rev 3
Turn-on delay time
= 300 V, ID = 9 A,
V
t
Rise time - 8.7 - ns
r
Turn-off delay time - 60 - ns
t
Fall time - 15 - ns
f
DD
RG = 4.7 Ω, V
(see Figure 16 and 21)
GS
= 10 V
-29-nC
when VDS
oss
-15-ns
STB24N60DM2, STP24N60DM2, STW24N60DM2 Electrical characteristics
Table 8. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
(1)
I
SD
I
SDM
V
SD
Q
I
RRM
Q
I
RRM
1. Limited by maximum junction temperature
2. Pulse width limited by safe operating area.
3. Pulsed: pulse duration = 300 μs, duty cycle 1.5%
Source-drain current - 18 A
(2)
Source-drain current (pulsed) - 72 A
(3)
Forward on voltage ISD = 18 A, VGS = 0 - 1.6 V
t
Reverse recovery time
rr
Reverse recovery charge - 956 nC
rr
I
= 18 A, di/dt = 100 A/μs
SD
V
= 60 V (see Figure 18)
DD
- 155 ns
Reverse recovery current - 12.5 A
t
Reverse recovery time
rr
Reverse recovery charge - 1450 nC
rr
Reverse recovery current - 13 A
I
= 18 A, di/dt = 100 A/μs
SD
VDD = 60 V, Tj = 150 °C
(see Figure 18)
- 200 ns
DocID025499 Rev 3 5/21
21
Electrical characteristics STB24N60DM2, STP24N60DM2, STW24N60DM2
I
D
10
1
0.1
0.1
1
100
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10µs
100µs
1ms
10ms
Tj=150°C
Tc=25°C
Single
pulse
AM16164v1
I
D
10
1
0.1
0.1
1
100
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10µs
100µs
1ms
10ms
Tj=150°C
Tc=25°C
Single
pulse
AM16165v1
I
D
30
20
10
0
0
10
V
DS
(V)
(A)
5
15
40
VGS= 4 V
VGS= 5 V
VGS= 7 V
VGS= 8, 9, 10 V
5
15
25
35
VGS= 6 V
20
AM16166v1
2.1 Electrical characteristics (curves)
Figure 2. Safe operating ar ea fo r D2PAK, TO-220 Figure 3. Thermal impedance D2PAK, TO-220
Figure 4. Safe operating area for TO-247 Figure 5. Thermal impedance for TO-247
Figure 6. Output characteristics Figure 7. Transfer characteristics
6/21 DocID025499 Rev 3
I
(A)
40
35
30
25
20
15
10
D
AM16167v1
VDS= 17 V
5
0
0
4
2
8
6
10
V
GS
(V)
STB24N60DM2, STP24N60DM2, STW24N60DM2 Electrical characteristics
VDS
V
GS
6
4
2
0
0
5
Q
g
(nC)
(V)
20
8
10
15
10
VDD=480 V
I
D
=18 A
25
300
200
100
0
400
500
V
DS
(V)
V
DS
12
30
35
AM16168v1
C
1000
100
10
1
0.1
10
V
DS
(V)
(pF)
1
100
Ciss
Coss
Crss
AM15467v1
V
GS(th)
0.9
0.8
0.7
0.6
-50
0
T
J
(°C)
(norm)
-25
1.0
75
25
50
100
ID = 250 µA
1.1
AM15473v1
Figure 8. Gate charge vs gate-source voltage Figure 9. Static drain-source on-resistance
R
DS(on)
0.186
0.184
0.182
0.180
0.178
0.176
0.174
0.172
0.170
0.168
(Ω)
VGS=10V
12
14
0
4
2
10
6
8
16
AM16169v1
D
(A)
I
Figure 10. Capacitance variations Figure 11. Output capacitance stored energy
Figure 12. Normalized gate threshold voltage vs
temperature
E
oss
AM15472v1
(µJ)
8
7
6
5
4
3
2
1
0
0
100
200
300
400
500
600
V
DS
(V)
Figure 13. Normalized on-resistance vs
temperature
T
J
(°C)
AM15464v1
R
DS(on)
(norm)
2.3
2.1
ID = 9 A
GS
= 10 V
V
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
-50
-25
25
0
50
75
100
DocID025499 Rev 3 7/21
21
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