ST MICROELECTRONICS STP18N65M5 Datasheet

STF18N65M5, STI18N65M5, STP18N65M5,

TO-220

TO-220FP

1

2

3

I²PAK

1

2

3

TO-247

STW18N65M5

N-channel 650 V, 0.198 Ω typ., 15 A MDmesh™ V Power MOSFET

in TO-220FP, I²PAK, TO-220 and TO-247 packages

Datasheet — production data

Features

@

R

Order code

V

DSS

T

Jmax

DS(on)

max

I

D

STF18N65M5

STI18N65M5

STP18N65M5

710 V < 0.22 Ω 15 A

STW18N65M5

■ Worldwide best R

■ Higher V

■ Excellent switching performance

■ 100% avalanche tested

rating and high dv/dt capability

DSS

DS(on)

* area

Applications

■ Switching applications

Description

These devices are N-channel MDmesh™ V Power MOSFETs based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency.

Table 1. Device summary

TAB

3

2

1

TAB

3

2

1

Figure 1. Internal schematic diagram

$4!"

'

3

!-V

Order code Marking Package Packaging

STF18N65M5

TO-220FP

STI18N65M5 I²PAK

18N65M5

Tu be

STP18N65M5 TO-220

STW18N65M5 TO-247

July 2012 Doc ID 022879 Rev 3 1/19

This is information on a product in full production.

www.st.com

19

Contents STF18N65M5, STI18N65M5, STP18N65M5, STW18N65M5

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2/19 Doc ID 022879 Rev 3

STF18N65M5, STI18N65M5, STP18N65M5, STW18N65M5 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Value

Symbol Parameter

I²PAK TO-220 TO-247 TO-220FP

Unit

V

I

DM

P

dv/dt

Gate-source voltage ± 25 V

GS

I

Drain current (continuous) at TC = 25 °C 15 15

D

I

Drain current (continuous) at TC = 100 °C 9.4 9.4

D

(1)

Drain current (pulsed) 60 60

Total dissipation at TC = 25 °C 110 25 W

TOT

(2)

Peak diode recovery voltage slope 15 V/ns

Insulation withstand voltage (RMS) from

V

T

1. Limited by maximum junction temperature.

2. ISD ≤ 15 A, di/dt ≤ 400 A/µs; V

all three leads to external heat sink

ISO

(t = 1 s; T

Storage temperature - 55 to 150 °C

stg

T

Max. operating junction temperature 150 °C

j

C = 25 °C)

DSPeak

< V

Table 3. Thermal data

Symbol Parameter

R

thj-case

R

thj-amb

Thermal resistance junction-case max 1.14 5 °C/W

Thermal resistance junction-ambient max 62.5 50 62.5 °C/W

(BR)DSS

, VDD = 400 V

I²PAK TO-220 TO-247 TO-220FP

Value

(1)

2500 V

Unit

A

Table 4. Avalanche characteristics

Symbol Parameter Value Unit

I

E

Avalanche current, repetetive or not repetetive

AR

(pulse width limited by T

jmax

)

Single pulse avalanche energy

AS

(starting T

= 25 °C, ID= IAR; VDD = 50 V)

J

4A

210 mJ

Doc ID 022879 Rev 3 3/19

Electrical characteristics STF18N65M5, STI18N65M5, STP18N65M5, STW18N65M5

2 Electrical characteristics

(TC = 25 °C unless otherwise specified)

Table 5. On /off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

Drain-source breakdown voltage

Zero gate voltage drain current (VGS = 0)

Gate-body leakage current (VDS = 0)

ID = 1 mA, VGS = 0 650 V

V

= 650 V

DS

V

= 650 V, TC=125 °C

DS

1

100µAµA

VGS = ± 25 V ± 100 nA

Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V

Static drain-source on-resistance

V

= 10 V, ID = 7.5 A 0.198 0.22 Ω

GS

Table 6 . D y namic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Input capacitance

iss

Output capacitance

oss

Reverse transfer

rss

capacitance

Equivalent

(1)

capacitance time related

Equivalent

(2)

capacitance energy related

Intrinsic gate

G

resistance

V

= 100 V, f = 1 MHz,

DS

V

= 0

GS

1240

-

32

-

3.2

-99-pF

= 0 to 520 V, VGS = 0

V

DS

-30-pF

f = 1 MHz open drain - 3 - Ω

C

o(tr)

o(er)

R

pF pF pF

Q

1. Time related is defined as a constant equivalent capacitance giving the same charging time as C V

DS

2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as C when VDS increases from 0 to 80% V

Total gate charge

g

Gate-source charge

gs

Gate-drain charge

gd

increases from 0 to 80% V

VDD = 520 V, ID = 7.5 A, VGS = 10 V (see Figure 20)

DSS

4/19 Doc ID 022879 Rev 3

31

-

8

14

-

oss

when

oss

nC nC nC

STF18N65M5, STI18N65M5, STP18N65M5, STW18N65M5 Electrical characteristics

Table 7. Switching times

Symbol Parameter Test conditions Min. Typ. Max Unit

t

d(V)

t

r(V)

t

c(off)

Voltage delay time Voltage rise time Current fall time

f(i)

Crossing time

VDD = 400 V, ID = 9.5 A, RG = 4.7 Ω, V

GS

= 10 V

(see Figure 21 and

Figure 24)

36

7

9

-

11

Table 8. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

SDM

V

SD

Q

I

RRM

Q

I

RRM

1. Pulse width limited by safe operating area.

2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

Source-drain current

SD

(1)

Source-drain current (pulsed)

(2)

Forward on voltage ISD = 15 A, VGS = 0 - 1.5 V

t

Reverse recovery time

rr

Reverse recovery charge

rr

Reverse recovery current

t

Reverse recovery time

rr

Reverse recovery charge

rr

Reverse recovery current

ISD = 15 A, di/dt = 100 A/µs V

DD

ISD = 15 A, di/dt = 100 A/µs V

DD

(see Figure 24)

= 100 V (see Figure 24)

= 100 V, Tj = 150 °C

-

290

-

3.4

23.5

352

-

24

1560A

4

ns ns ns ns

A

ns

µC

A

ns

µC

A

Doc ID 022879 Rev 3 5/19

Electrical characteristics STF18N65M5, STI18N65M5, STP18N65M5, STW18N65M5

I

D

10

1

0.1

1

100

V

DS

(V)

10

(A)

Operation in this area is

Limited by max R

DS(on)

10µs

100µs

1ms

10ms

Tj=150°C Tc=25°C

Single pulse

AM12487v1

I

D

10

1

0.1

0.01

0.1

1

100

V

DS

(V)

10

(A)

Operation in this area is

Limited by max R

DS(on)

10µs

100µs

1ms

10ms

Tj=150°C Tc=25°C

Single pulse

AM12488v1

I

D

10

1

0.1

1

100

V

DS

(V)

10

(A)

Operation in this area is

Limited by max R

DS(on)

10µs

100µs

1ms

10ms

Tj=150°C Tc=25°C

Single pulse

AM12489v1

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for I²PAK and

Figure 4. Safe operating area TO220FP Figure 5. Thermal impedance for TO-220FP

TO-220

Figure 3. Thermal impedance for I²PAK and

TO-220

Figure 6. Safe operating area TO-247 Figure 7. Thermal impedance TO-247

6/19 Doc ID 022879 Rev 3

ST MICROELECTRONICS STP18N65M5 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

1 Electrical ratings

2 Electrical characteristics

2.1 Electrical characteristics (curves)