STMicroelectronics STP16NK60Z, STB16NK60Z-S, STW16NK60Z Technical data
STP16NK60Z - STB16NK60Z-S
STW16NK60Z
N-CHANNEL 600V - 0.38Ω -14ATO-220/I2SPAK / TO-247
Zener-Protected SuperMESH™ MOSFET
TYPE V
STP16NK60Z
STB16NK60Z-S
STW16NK60Z
■ TYPICAL R
■ EXTREMELY HIGH dv/dt CAPABILITY
■ 100% AVALANCHE TESTED
■ GATE CHARGE MINIMIZED
■ VERY LOW INTRINSIC CAPACITANCES
■ VERY GOOD MANUFACTURING
600 V
600 V
600 V
(on) = 0.38 Ω
DS
DSS
R
DS(on)
<0.42Ω
<0.42Ω
<0.42Ω
I
D
14 A
14 A
14 A
Pw
190 W
190 W
190 W
REPEATIBILITY
DESCRIPTION
The SuperME SH™ series is obtained t hrough an
extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing
on-resistance significantly down,specialcareis taken to ensure a ver y good dv/dt capability for the
most dem anding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDm es h™ products.
3
2
1
TO-220
I2SPAK
3
2
1
TO-247
INTERNAL SCHEMATIC DIAGRAM
3
2
1
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ IDEAL FOR OFF-LINE POWER SUPPLIES
ORDER CODE
PART NUMBER MARKING PACKAGE PACKAGING
STP16NK60Z P16NK60Z TO-220 TUBE
STB16NK60Z-S B16NK60Z
STW16NK60Z W16NK60Z TO-247 TUBE
2
SPAK
I
TUBE
1/11March 2004
STP16NK60Z - STB16NK60Z -S - ST W 16N K 60Z
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
D
IDM()
P
TOT
V
ESD(G-S)
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
T
j
T
stg
() Pulse width limited by safe operating area
≤ 14 A, di/dt ≤ 200 A/µs, VDD≤ V
(1) I
SD
(*) Limited only by maximum temperature allowed
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max 0.66 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 50 °C/W
T
l
Drain-source Voltage (VGS=0)
Drain-gate Voltage (RGS=20kΩ)
600 V
600 V
Gate- source Voltage ± 30 V
Drain Current (continuous) at TC=25°C
Drain Current (continuous) at TC= 100°C
14 A
8.8 A
Drain Current (pulsed) 56 A
Total Dissipation at TC=25°C
190 W
Derating Factor 1.51 W/°C
Gate source ESD (HBM-C= 100pF, R= 1.5KΩ) 6000 V
Operating Junction Temperature
Storage Temperature
(BR)DSS,Tj
≤ T
JMAX.
-55 to 150 °C
TO-220/ I²SPAK TO-247
Maximum Lead Temperature For Soldering Purpose 300
°C
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
=25°C, ID=IAR,VDD=50V)
j
14 A
360 mJ
GATE-SOURCE ZENER DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain) 30 V
Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD c apability, but also to make t hem sa fely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zene r voltage is appropriate to achieve an ef fi cient and
cost-effective intervention to prote ct the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
2/11
STP16NK60Z - STB16N K 60Z-S - STW16NK60Z
ELECTRICAL CHARACTERISTICS (T
=25°C UNLESS OTHERWISE SPECIFIED)
CASE
ON/OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID=1mA,VGS= 0 600 V
Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Zero Gate Voltage
Drain Current (V
GS
=0)
Gate-body Leakage
Current (V
DS
=0)
Gate Threshold Voltage
Static Drain-source On
V
=MaxRating
DS
=MaxRating,TC= 125 °C
V
DS
V
= ± 20V ±10 µA
GS
V
DS=VGS,ID
= 100 µA
3 3.75 4.5 V
1
50
VGS=10V,ID= 7 A 0.38 0.42 Ω
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(1) Forward Transconductance VDS=15V,ID=7A 12 S
fs
C
oss eq.
C
C
C
t
d(on)
t
d(off)
Q
Q
Q
iss
oss
rss
t
r
t
f
gs
gd
g
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
(3) Equivalent Output
Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
=25V,f=1MHz,VGS= 0 2650
V
DS
285
62
VGS=0V,VDS= 0V to 480V 158 pF
=480V,ID=14A
V
DD
R
=4.7Ω VGS=10V
G
(Resistive Load see, Figure 3)
30
25
70
15
=480V,ID=14A,
V
DD
VGS=10V
86
17
46
µA
µA
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
Source-drain Current
(2)
Source-drain Current (pulsed)
(1)
ForwardOnVoltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
.
V
DSS
ISD=14A,VGS=0
I
SD
V
DD
(see test circuit, Figure 5)
I
SD
VDD=100V,Tj=150°C
(see test circuit, Figure 5)
=14A,di/dt=100A/µs
=100V,Tj=25°C
=14A,di/dt=100A/µs
490
5.4
22
585
7
24
when VDSincreases from 0 to 80%
oss
14
56
1.6 V
A
A
ns
µC
A
ns
µC
A
3/11
STP16NK60Z - STB16NK60Z -S - ST W 16N K 60Z
Thermal Impedance for TO-220/ I²SPAKSafe Operating Area for TO-220/I²SPAK
Safe Operating Area for TO-247
Thermal Impedance for TO-247
Transfer CharacteristicsOutput Characteristics
4/11
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