ST MICROELECTRONICS STP13N80K5 Datasheet

STB13N80K5, STF13N80K5,
TO-220
1
2
3
TAB
1
2
3
TO-220FP
1
3
TAB
D2PAK
1
2
3
TO-247
D(2, TAB)
G(1)
S(3)
AM01476v1
STP13N80K5, STW13N80K5
N-channel 800 V, 0.37 typ., 12 A SuperMESH™ 5 Power
MOSFETs in D²PAK, TO-220FP, TO-220 and TO-247 packages
Datasheet - production data
Features

Figure 1. Internal schematic diagram

Order codes V
STB13N80K5
STF13N80K5 35 W
STP13N80K5
STW13N80K5
DS
800 V 0.45 12 A
R
DS(on)
I
P
D
TOT
190 W
190 W
Worldwide best FOM (figure of merit)
Ultra low gate charge
100% avalanche tested
Zener-protected
Applications
Switching applications
Description
These devices are N-channel Zener-protected Power MOSFETs realized in SuperMESH™ 5, a revolutionary avalanche-rugged very high voltage Power MOSFET technology based on an innovative proprietary vertical structure. The result is a drastic reduction in on-resistance and ultra low gate charge for applications which require superior power density and high efficiency.

Table 1. Device summary

Order codes Marking Packages Packaging
STB13N80K5
STF13N80K5 TO-220FP
STW13N80K5 TO-247
June 2014 DocID024348 Rev 4 1/24
This is information on a product in full production.
13N80K5
D²PAK Tape and reel
TubeSTP13N80K5 TO-220
www.st.com
24
Contents STB13N80K5, STF13N80K5, STP 13N8 0K5, STW 13N8 0K5
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1 D2PAK, STB13N80K5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.2 TO-220FP, STF13N80K5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3 TO-220, STP13N80K5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.4 TO-247, STW13N80K5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/24 DocID024348 Rev 4
STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Value
Symbol Parameter
D²PAK, T O-220,
TO-247
TO-220FP
Unit
Gate-source voltage ± 30 V
Drain current (continuous) at TC = 25 °C 12 12
Drain current (continuous) at TC = 100 °C 7.6 7.6
(2)
Drain current (pulsed) 48 48
Total dissipation at TC = 25 °C 190 35 W
I
DM
P
V
GS
I
D
I
D
TOT
Max current during repetitive or single
I
AR
E
AS
pulse avalanche (pulse width limited by T
jmax
Single pulse avalanche energy (starting TJ = 25 °C, ID=IAS, VDD= 50 V)
Insulation withstand voltage (RMS) from
V
iso
dv/dt
dv/dt
T
T
stg
1. Limited by package.
2. Pulse width limited by safe operating area.
3. ISD 12 A, di/dt 100 A/μs, V
4. VDS 640 V
all three leads to external heat sink (t=1 s; T
(3)
Peak diode recovery voltage slope 4.5 V/ns
(4)
MOSFET dv/dt ruggedness 50 V/ns
Operating junction temperature
j
=25 °C)
C
Storage temperature
V
Peak
)
(BR)DSS
(1)
(1)
(1)
A
A
A
4A
148 mJ
2500 V
-55 to 150 °C

Table 3. Thermal data

Symbol Parameter
R
thj-case
thj-amb
R
thj-pcb
1. When mounted on 1inch² FR-4 board, 2 oz Cu.
Thermal resistance junction-case max 0.66 3.57
Thermal resistance junction-amb max 62.5 50
(1)
Thermal resistance junction-pcb max 30
DocID024348 Rev 4 3/24
Value
Unit
D²PAK TO-220 TO-220FP TO-247
°C/WR
Electrical characteristics STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5

2 Electrical characteristics

(T
= 25 °C unless otherwise specified).
CASE

T a ble 4. On/off states

Symbol Parameter T est cond ition s Min. T yp . Max. Unit
V
(BR)DSS
V
R
I
DSS
I
GSS
GS(th)
DS(on)
Drain-source breakdown voltage
Zero gate voltage drain current
VGS= 0, ID = 1 mA 800 V
V
= 0, V
GS
V
= 0, V
GS
Tc=125 °C
Gate body leakage current VDS = 0, V
Gate threshold voltage V
Static drain-source on-resistance
= VGS, ID = 100 μA345V
DS
= 10 V, ID= 6 A 0.37 0.45
V
GS
= 800 V 1 μA
DS
= 800 V,
DS
= ± 20 V ±10 μA
GS
50 μA

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit
C
C
C
Input capacitance
iss
Output capacitance - 50 - pF
oss
Reverse transfer
rss
capacitance
=100 V, f=1 MHz, VGS=0
V
DS
-870- pF
-2-pF
o(tr)
related
Equivalent capacitance time
(1)
C
VGS = 0, VDS = 0 to 640 V
o(er)
R
Q
Q
Q
1. Time related is defined as a constant equivalent capacitance giving the same charging time as C V
2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as C when VDS increases from 0 to 80% V
energy related
Intrinsic gate resistance f = 1MHz, ID=0 - 5 -
G
Total gate charge
g
Gate-source charge - 7 - nC
gs
Gate-drain charge - 18 - nC
gd
increases from 0 to 80% V
DS
DSS
V
DD
V
GS
(see Figure 22)
DSS
= 640 V, ID = 12 A =10 V
Equivalent capacitance
(2)
C
4/24 DocID024348 Rev 4
-110 - pF
-43-pF
-29-nC
when
oss
oss
STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 Electrical characteristics

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
Turn-on delay time
= 400 V, ID = 6A,
V
t
Rise time - 16 - ns
r
Turn-off delay time - 42 - ns
t
Fall time - 16 - ns
f
DD
R
=4.7 , VGS=10 V
G
(see Figure 24)
-16-ns

T a ble 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
t
Q
I
RRM
1. Pulsed: pulse duration = 300μs, duty cycle 1.5%
Source-drain current - 14 A
Source-drain current (pulsed) - 56 A
(1)
Forward on voltage VGS=0, ISD= 12 A - 1.5 V
Reverse recovery time
rr
Reverse recovery charge - 5.7 μC
rr
Reverse recovery current - 28 A
Reverse recovery time ISD= 12 A,VDD= 60 V
rr
Reverse recovery charge - 7.9 μC
rr
Reverse recovery current - 26 A
I
= 12 A, VDD= 60 V
SD
di/dt = 100 A/μs,
(see Figure 23)
di/dt=100 A/μs, Tj=150 °C
(see Figure 23)
- 406 ns
- 600 ns

Table 8. Gate-source Zener diode

Symbol Parameter Test conditions Min. Typ. Max Unit
V
(BR)GSO
Gate-source breakdown voltage IGS= ± 1mA, ID= 0 30 - - V
The built-in back-to-back Zener diodes have specifically been designed to enhance the device's ESD capability. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components.
DocID024348 Rev 4 5/24
Electrical characteristics STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5
I
D
10
1
0.1
0.1
1
100
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10µs
100µs
1ms
10ms
Tj=150°C Tc=25°C
Single pulse
AM15687v1
I
D
1
0.1
0.01
0.1
1
100
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10µs
100µs
1ms
10ms
Tj=150°C Tc=25°C
Single pulse
10
AM15688v1
I
D
10
1
0.1
0.1
1
100
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10µs 100µs
1ms
10ms
Tj=150°C Tc=25°C
Single pulse
AM15689v1

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area for D2PAK Figure 3. Thermal impedance for D2PAK

Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP

Figure 6. Safe operating area for TO-220 Figure 7. Thermal impedance for TO-220

6/24 DocID024348 Rev 4
STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5 Electrical characteristics
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I
D
15
10
5
0
0
10
V
DS
(V)
20
(A)
5
15
20
25
6V
7V
8V
VGS=11V
9V
30
10V
AM15690v1
V
(BR)DSS
-100
T
J
(°C)
(norm)
-50
50
0
100
0.85
0.9
0.95
1
1.05
I
D
=1mA
150
1.1
AM15699v1

Figure 8. Safe operating area for TO-247 Figure 9. Thermal impedance for TO-247

Figure 10. Output characteristics Figure 11. Transfer characteristics

I
D
(A)
V
DS
=20V
30
25
AM15691v1
Figure 12. Normalized V
(BR)DSS

vs temperature Figure 13. Static drain-source on-resistance

DocID024348 Rev 4 7/24
R
DS(on)
20
15
10
(Ω)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
5
0
5
6
4
7
9
8
10
V
GS
(V)
AM15693v1
VGS=10V
0
2
4
8
6
10
12
D
(A)
I
Electrical characteristics STB13N80K5, STF13N80K5, STP13N80K5, STW13N80K5
V
GS
6
4
2
0
0
5
Q
g
(nC)
(V)
20
8
10
15
10
25
12
600
400
200
0
700
V
DS
V
GS
300
500
100
30
AM15692v1
V
GS(th)
0.6
0.4
0.2
0
-100
T
J
(°C)
(norm)
-50
0.8
50
0
100
I
D
=100µA
150
1
1.2
AM15696v1
V
SD
0
4
I
SD
(A)
(V)
2
6
8
0.5
0.6
0.7
0.8
0.9
1
TJ=-50°C
TJ=150°C
TJ=25°C
10
AM15698v1

Figure 14. Gate charge vs gate-source voltage Figure 15. Capacitance variations

C
(pF)
AM15694v1
Figure 16. Normalized gate threshold voltage vs
temperature
1000
100
Coss
10
Crss
1
0.1
1
10
100
V
DS
(V)
Figure 17. Normalized on-resistance vs
temperature
R
DS(on)
(norm)
2.5
1.5
I
D
=6A
V
GS
=10V
2
1
AM15697v1
Ciss
Figure 18. Source-drain diode forward
8/24 DocID024348 Rev 4
characteristics
0.5
0
-100
-50
0
50
100
150
T
J
(°C)

Figure 19. Output capacitance stored energy

800
AM15695v1
V
DS
(V)
E
oss
(µJ)
12
10
8
6
4
2
0
0
100
200
300
400
500
600
700
+ 16 hidden pages