N-channel 600 V, 0.37 Ω, 10 A, FDmesh™ II Power MOSFET
TO-220
TO-220FP
I²PAK
1
2
3
1
2
3
1
2
3
IPAK
DPAK
1
3
3
2
1
Features
STD11NM60ND, STF/I11NM60ND
STP11NM60ND, STU11NM60ND
2
I
PAK, TO-220, TO-220FP, IPAK, DPAK
Order codes V
DSS
(@T
jmax)RDS(on)
maxI
STD11NM60ND
STF11NM60ND
STI11NM60ND
650 V< 0.45 Ω
STP11NM60ND
STU11NM60ND
1. Limited only by maximum temperature allowed
■ The worldwide best R
* area amongst the
DS(on)
fast recovery diode devices
■ 100% avalanche tested
■ Low input capacitance and gate charge
■ Low gate input resistance
■ Extremely high dv/dt and avalanche
capabilities
Application
Switching applications
Description
10 A
10 A
10 A
10 A
10 A
D
(1)
Figure 1.Internal schematic diagram
$
The device is an N-channel FDmesh™ II Power
MOSFET that belongs to the second generation
'
of MDmesh™ technology. This revolutionary
Power MOSFET associates a new vertical
structure to the company's strip layout and
associates all advantages of reduced on-
3
resistance and fast switching with an intrinsic fastrecovery body diode.It is therefore strongly
recommended for bridge topologies, in particular
Figure 10. TransconductanceFigure 11. Static drain-source on resistance
Figure 12. Gate charge vs gate-source voltage Figure 13. Capacitance variations
8/19Doc ID 14625 Rev 2
STD/F/I/P/U11NM60NDElectrical characteristics
Figure 14. Normalized gate threshold voltage
vs temperature
Figure 16. Source-drain diode forward
characteristics
Figure 15. Normalized on resistance vs
temperature
Figure 17. Normalized B
vs temperature
VDSS
Doc ID 14625 Rev 29/19
Test circuitsSTD/F/I/P/U11NM60ND
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
μF
3.3μF
V
DD
AM01469v1
VDD
47kΩ
1kΩ
47kΩ
2.7kΩ
1kΩ
12V
V
i=20V=VGMAX
2200
μF
PW
IG=CONST
100Ω
100nF
D.U.T.
V
G
AM01470v1
A
D
D.U. T.
S
B
G
25
Ω
A
A
B
B
R
G
G
FAST
DIODE
D
S
L=100μH
μF
3.3
1000
μF
V
DD
AM01471v1
Vi
Pw
VD
ID
D.U. T.
L
2200
μF
3.3μF
VDD
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
AM01473v1
VDS
ton
tdon
tdoff
toff
tf
tr
90%
10%
10%
0
0
90%
90%
10%
V
GS
3 Test circuits
Figure 18. Switching times test circuit for
resistive load
Figure 20. Test circuit for inductive load
switching and diode recovery times
Figure 19. Gate charge test circuit
Figure 21. Unclamped inductive load test
circuit
Figure 22. Unclamped inductive waveformFigure 23. Switching time waveform
10/19Doc ID 14625 Rev 2
STD/F/I/P/U11NM60NDPackage mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
®
packages, depending on their level of environmental compliance. ECOPACK®
– Corrected Figure 2: Safe operating area for TO-220, I²PAK
25-Oct-20102
– Corrected Figure 4: Safe operating area for TO-220FP
– Corrected Figure 6: Safe operating area for DPAK, IPAK
18/19Doc ID 14625 Rev 2
STD/F/I/P/U11NM60ND
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