ST MICROELECTRONICS STP100N10F7 Datasheet

1
2
3
TO-220
TAB
1
2
3
TO-220FP
1
3
TAB
D2PAK DPAK
1
3
2
TAB
1
2
3
TAB
I2PAK
AM01475v1_noZen
D(2, TAB)
G(1)
S(3)
STB100N10F7, STD100N10F7, STF100N10F7
STI100N10F7, STP100N10F7
Datasheet
N-channel 100 V, 6.8 mΩ typ., 80 A STripFET™ F7 Power MOSFETs
in D2PAK, DPAK, TO-220FP, I2PAK and TO-220 packages
Features
Product status links
STB100N10F7
STD100N10F7
STF100N10F7
STI100N10F7
STP100N10F7
Order codes
STB100N10F7
V
DS
R
max. I
DS(on)
D
80 A
Package
D2PAK
STD100N10F7 80 A DPAK
STF100N10F7 45 A TO-220FP
STI100N10F7 80 A
100 V 8.0 mΩ
I2PAK
STP100N10F7 80 A TO-220
Among the lowest R
on the market
DS(on)
Excellent FoM (figure of merit)
Low C
ratio for EMI immunity
rss/Ciss
High avalanche ruggedness
Applications
Switching applications
Description
These N-channel Power MOSFETs utilize STripFET™ F7 technology with an enhanced trench gate structure that results in very low on-state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching.
DS9291 - Rev 5 - June 2018 For further information contact your local STMicroelectronics sales office.
www.st.com
STB100N10F7,STD100N10F7,STF100N10F7,STI100N10F7,STP100N10F7

1 Electrical ratings

Symbol Parameter
V
DS
V
GS
I
D
(2)
I
DM
P
TOT
V
ISO
T
J
T
stg
1. This value is limited by package.
2. Pulse width is limited by safe operating area.
Drain-source voltage 100 V
Gate-source voltage ±20 V
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
Drain current (pulsed) 320 180 320 A
(1)
Total dissipation at TC = 25 °C
Insulation withstand voltage (RMS) from all three leads to external heatsink
(t = 1 s, TC = 25 °C)
Operating junction temperature
Storage temperature range °C
Table 1. Absolute maximum ratings
DPAK TO-220FP
80
62
120 30 150 W
Electrical ratings
Value
TO-220
D2PAK
I2PAK
45
32
(1)
(1)
80 A
70 A
2.5 kV
-55 to 175
Unit
°C
Table 2. Thermal resistance
Symbol Parameter
R
thj-case
R
thj-amb
R
thj-pcb
1.
When mounted on an 1-inch2 FR-4 board, 2oz CU, t < 10 s.
Thermal resistance junction-case 1 1.25 5 1 °C/W
Thermal resistance junction-ambient 62.5 °C/W
(1)
Thermal resistance junction-pcb 30 50 °C/W
Table 3. Avalanche characteristics
Symbol
E
AS
Single pulse avalanche energy
(TJ = 25 °C, L = 3.5 mH, IAS = 15 A, VDD = 50 V, VGS = 10 V)
Parameter Value Unit
D2PAK
Value
DPAK TO-220FP
TO-220
Unit
I2PAK
400 mJ
DS9291 - Rev 5
page 2/28
STB100N10F7,STD100N10F7,STF100N10F7,STI100N10F7,STP100N10F7

2 Electrical characteristics

(T
= 25 °C unless otherwise specified)
CASE
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
1. Defined by design, not subject to production test.
Drain-source breakdown voltage
Zero gate voltage drain current
Gate-body leakage current
Gate threshold voltage
Static drain-source on-resistance
Table 4. On-/off-states
ID = 250 μA, VGS = 0 V
V
= 100 V, V
DS
V
= 100 V, V
DS
TC = 125 °C
VGS = 20 V, VDS = 0 V
VDS = VGS, ID = 250 μA
For D2PAK, DPAK, I2PAK and TO-220:
VGS = 10 V, ID = 40 A
For TO-220FP:
VGS = 10 V, ID = 22.5 A
= 0 V
GS
= 0 V,
GS
(1)
Electrical characteristics
100 V
1 µA
100 µA
100 nA
2.5 4.5 V
6.8 8.0
Symbol
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
Symbol
t
d(on)
t
r
t
d(off)
t
f
Table 5. Dynamic
Parameter Test conditions Min. Typ. Max. Unit
Input capacitance
- 4369 - pF
VDS = 50 V, f = 1 MHz,
Output capacitance - 823 - pF
VGS = 0 V
Reverse transfer capacitance - 36 - pF
Total gate charge
Gate-source charge - 26 - nC
Gate-drain charge - 13 - nC
VDD = 50 V, ID = 80 A,
VGS = 0 to 10 V
(see Figure 17. Test circuit for gate
charge behavior)
- 61 - nC
Table 6. Switching times
Parameter Test conditions Min. Typ. Max. Unit
Turn-on delay time
Rise time - 40 - ns
Turn-off delay time - 46 - ns
Fall time - 15 - ns
VDD = 50 V, ID = 40 A,
RG = 4.7 Ω, V
GS
= 10 V
(see Figure 16. Test circuit for
resistive load switching times and Figure 21. Switching time waveform)
- 27 - ns
DS9291 - Rev 5
page 3/28
STB100N10F7,STD100N10F7,STF100N10F7,STI100N10F7,STP100N10F7
Electrical characteristics
Table 7. Source-drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
(1)
I
SDM
(2)
V
SD
t
rr
Q
rr
I
RRM
1. Pulse width is limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Source-drain current - 80 A
Source-drain current (pulsed) - 320 A
Forward on voltage
Reverse recovery time
Reverse recovery charge - 146 nC
ISD = 80 A, VGS = 0 V
ISD = 80 A, di/dt = 100 A/µs
VDD = 80 V, TJ = 150 °C
- 1.2 V
- 77 ns
(see Figure 18. Test circuit for
Reverse recovery current - 4 A
inductive load switching and diode recovery times)
DS9291 - Rev 5
page 4/28
ID
100
10
1
0.1
1
100
V
DS(V)
10
(A)
Ope ration in this a rea is
Limited b y max R
DS(on )
100µs
1ms
10ms
Tj=175 °C Tc=25°C
Sing le pulse
0.1
AM15754 v1
ID
100
10
1
0.1
1
100
VDS(V)
10
(A)
Operation in this area is
Limited by max RDS(on)
100µs
1ms
10ms
Tj=175°C Tc=25°C
Single pulse
0.1
AM15755v1
*
ID
100
10
1
0.1
1
100
V
DS(V)
10
(A)
Ope ration in this a rea is
Limited b y max R
DS(on )
100µs
1ms
10ms
Tj=175 °C Tc=25°C
Sing le pulse
0.1
AM15756 v1
Sing le pulse
0.0 5
0.0 2
0.0 1
δ=0.5
0.1
0.2
K
10
t
p(s )
-4
10
-3
10
-2
10
-1
10
-5
10
-2
10
-1
AM15761 v1
STB100N10F7,STD100N10F7,STF100N10F7,STI100N10F7,STP100N10F7

2.1 Electrical characteristics (curves)

Electrical characteristics (curves)
Figure 1. Safe operating area for DPAK
Figure 3. Safe operating area for TO-220FP
Figure 2. Thermal impedance for DPAK
Figure 4. Thermal impedance for TO-220FP
Figure 5. Safe operating area for D2PAK, I2PAK and
TO-220
DS9291 - Rev 5
Figure 6. Thermal impedance for D2PAK, I2PAK and
TO-220
page 5/28
ID
150
100
50
0
0
2
VDS(V)
4
(A)
1
3
200
250
VGS=10V
300
6V
7V
8V
9V
5V
AM15757v1
ID
150
100
50
0
VGS(V)
(A)
2
200
250
300
VDS=5V
3
4
5
6
7
8
9
10
AM15745v1
V(BR)DSS
TJ(°C)
(norm)
ID=250 µA
1.02
0.98
0.96
0.94
-55
-5
-30
70
20
45
95
120
1
1.04
AM15747v1
RDS(on)
6.0
4.0
2.0
0.0 0
40
ID(A)
20
60
8.0
10.0
12.0
14.0
VGS=10V
100
80
(mΩ)
AM15748v1
VGS
6
4
2
0
0
20
Qg(nC)
(V)
8
40
60
10
VDD=50V
ID=80A
12
AM15758v1
C
3000
2000
1000
0
0
20
VDS(V)
(pF)
10
30
Ciss
Coss
Crss
40 50
60
70
80
4000
5000
AM15759v1
STB100N10F7,STD100N10F7,STF100N10F7,STI100N10F7,STP100N10F7
Electrical characteristics (curves)
Figure 7. Output characteristics
Figure 9. Normalized V
(BR)DSS
vs temperature
Figure 8. Transfer characteristics
Figure 10. Static drain-source on-resistance
DS9291 - Rev 5
Figure 11. Gate charge vs gate-source voltage
Figure 12. Capacitance variations
page 6/28
VGS(th)
1
0.96
0.94
0.92
-55
-5
TJ(°C)
(norm)
-30
70
20
45
95
120
0.98
1.02
1.04 ID= 250 µA
AM15746v1
R
DS(on)
1.8
1.4
0.8
0.4
-55
-5
TJ(°C)
(norm)
-30
70
20
45
95
0.6
1
1.2
1.6
2
120
ID = 40 A
VGS = 10 V
AM15760v2
VSD
0
40
ISD(A)
(V)
20
100
60
80
0.5
0.6
0.7
0.8
TJ=-55°C
TJ=150°C
TJ=25°C
0.9
1
1.1
AM15749v1
STB100N10F7,STD100N10F7,STF100N10F7,STI100N10F7,STP100N10F7
Electrical characteristics (curves)
Figure 13. Normalized gate threshold voltage vs
temperature
Figure 15. Source-drain diode forward characteristics
Figure 14. Normalized on-resistance vs temperature
DS9291 - Rev 5
page 7/28
AM01468v1
V
D
R
G
R
L
D.U.T.
2200
μF
V
DD
3.3 μF
+
pulse width
V
GS
AM01469v1
47 kΩ
1 kΩ
47 kΩ
2.7 kΩ
1 kΩ
12 V
IG= CONST
100 Ω
100 nF
D.U.T.
+
pulse width
V
GS
2200
μF
V
G
V
DD
AM01470v1
A
D
D.U.T.
S
B
G
25 Ω
A
A
B
B
R
G
G
D
S
100 µH
µF
3.3
1000 µF
V
DD
D.U.T.
+
_
+
fast diode
AM01471v1
V
D
I
D
D.U.T.
L
V
DD
+
pulse width
V
i
3.3 µF
2200 µF
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
AM01473v1
0
V
GS
90%
V
DS
90%
10%
90%
10%
10%
t
on
t
d(on)
t
r
0
t
off
t
d(off)
t
f
STB100N10F7,STD100N10F7,STF100N10F7,STI100N10F7,STP100N10F7

3 Test circuits

Test circuits
Figure 16. Test circuit for resistive load switching times
Figure 18. Test circuit for inductive load switching and
diode recovery times
Figure 17. Test circuit for gate charge behavior
Figure 19. Unclamped inductive load test circuit
DS9291 - Rev 5
Figure 20. Unclamped inductive waveform
Figure 21. Switching time waveform
page 8/28
STB100N10F7,STD100N10F7,STF100N10F7,STI100N10F7,STP100N10F7

4 Package information

Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
®
DS9291 - Rev 5
page 9/28
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