ST MICROELECTRONICS STM32WB5MMGH6 Datasheet

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STM32WB5MMG

Product summary

Order code STM32WB5MMG

Temperature

range

Package LGA 86L 10x10

Package

dimensions ( mm)

Packaging Tape and reel

-40 °C to 85 °C

7.3 x 11 x 1.342 x

0.435 pitch

STM32WB5MMG

Datasheet

Bluetooth® Low Energy 5.0 and 802.15.4 module

Features

• Integrated chip antenna

• Bluetooth® Low Energy 5.0, Zigbee® 3.0, OpenThread certified

• Dynamic and static concurrent modes

• IEEE 802.15.4-2011 MAC PHY

• Supports 2 Mbits/s

• TX output power up to +6 dBm

• RX sensitivity: -96 dBm (Bluetooth® Low Energy at 1 Mbps), -100 dBm (802.15.4)

• Range: up to 75 meters

•

Dedicated Arm® Cortex®-M0+ for radio and security tasks

•

Dedicated Arm® Cortex®-M4 CPU with FPU and ART (adaptative real-time accelerator) up to 64 MHz speed

• 1-Mbyte Flash memory, 256-Kbyte SRAM

• Fully integrated BOM, including 32 MHz radio and 32 KHz RTC crystals

• Integrated SMPS

• Ultra-low-power modes for battery longevity

• 68 GPIOs

• Integrated IPD for best-in-class and reliable antenna matching

• 1.8 V to 3.6 V VDD range

• -40 °C to 85 °C temperature range

• Built-in security features such as: secure firmware installation (SFI) for radio stack, customer key storage/key management services, PKA, AES 256-bit,

TRNG, PCROP, CRC, 96-bit UID, possibility to derive 802.15.4 and Bluetooth Low Energy 48-bit UEI

• Certifications: CE, FCC, IC, JRF, SRRC, RoHS, REACH, GOST, KC, NCC

• Two layers PCB compatible (using external raw pins only)

Application

• Lighting and home automation

• Wireless audio devices

• Wellness, healthcare, personal trackers

• Gaming and toys

• Smart locks

• Beacons and accessories

• Industrial

DS13252 - Rev 1 - November 2020 For further information contact your local STMicroelectronics sales office.

www.st.com

STM32WB5MMG

1 Introduction

This datasheet provides the ordering information and mechanical device characteristics of the STM32WB5MMG module.

This document should be read in conjunction with the Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5 and 802.15.4 radio solution (DS11929) and reference manual (RM0434). The reference

manual is available from the STMicroelectronics website at www.st.com.

For information on the Arm® Cortex® cores, refer to the Cortex® Technical Reference Manual, available from the www.arm.com website

Note: Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

Introduction

DS13252 - Rev 1

page 2/31

2 Description

The STM32WB5MMG is an ultra-low-power and small form factor certified 2.4GHz wireless module. It supports Bluetooth® Low Energy 5.0, Zigbee® 3.0, OpenThread, dynamic and static concurrent modes, and

802.15.4 proprietary protocols. Based on STMicroelectronics STM32WB55VGY wireless microcontroller, the STM32WB5MMG provides best-in-class RF performance thanks to its good receiver sensitivity and a high output power signal. Its low-power features enable extended battery life time, small coin-cell batteries or energy harvesting.

The STM32WB5MMG requires no RF expertise and is the best way to speed-up any development and to reduce associated costs. The module is completely protocol stack royalty-free.

Module overview

The module is an SiP-LGA86 package (system in package land grid array) that integrates the proven STM32WB55VGY MCU with several external components. The package includes:

• LSE crystal

• HSE crystal

• Passive components for SMPS

• Antenna matching and antenna

• IPD for RF matching and harmonics rejection

STM32WB5MMG

Description

Figure 1. STM32WB5MMG module block diagram

Communication interface

STM32WB55VGY

1MB Flash

256KB RAM

Antenna

matching

DS13252 - Rev 1

page 3/31

3 Available peripherals

All peripherals available in STM32WB Series microcontrollers based on the WLCSP100 package are available and accessible on this module.

The pins on the module offer access to the following system peripherals:

• 2× DMA controllers (seven channels each) supporting ADC, SPI, I2C, USART, QSPI, SAI, AES, timers

• 1× USART (ISO 7816, IrDA, SPI master, Modbus and Smartcard mode)

• 1× LPUART (low power) – Two SPI running at 32 Mbit/s

• 2× I2C (SMBus/PMBus)

• 1× SAI (dual channel high quality audio)

• 1× USB 2.0 FS device, crystal-less, BCD and LPM

• 1× Touch sensing controller, up to 18 sensors

• 1× LCD 8x40 with step-up converter

• 1× 16-bit, four channels advanced timer

• 2× 16-bit, two channels timers

• 1× 32-bit, four channels timer

• 2× 16-bit ultra-low-power timers

• 1× independent Systick

• 1× independent watchdog

• 1× window watchdog.

STM32WB5MMG

Available peripherals

The full pin description is available in Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5 and 802.15.4 radio solution (DS11929).

DS13252 - Rev 1

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4 Pin description

The following figure shows the module pinout package bottom view.

STM32WB5MMG

Pin description

Figure 2. STM32WB5MMG module pinout: bottom view

VSS

PB10

PB11

PC5

PE4

PB12

PB2

PC4

PA8

PA9

74 75

PD9

PD4

PA6

PA7

PD8

84 77

VSS

83 78

PA4

PA5

PD15 PH0

PD10 PH1

PA3

VSS

ANT

_NC

6047

RF_OUT

ANT_IN

VSS

PA2

PA1

PA0

VREF+

VSS

VDDA

PC3

PC13

PB6

PB15

PB14

PC6

PB13

PD1

PD0

VDD USB

VSS

PA11

PA12

PA10

PE3

PC7

PD3

PC9

PC8

82 79

PD11

81 80

PD6

PD2

PE2 PD14

PE0 PE1

PD5 PD13

6667

PD7 PD12

PC2

PC1

NRST

PB9

PC0

PH3-

BOOT0

PB8

VBAT

VSS

SMPS

PA15

PA14

PA13

PC12

PC11

PC10

PB4 PB5 PB7

PB3

VDD

SMPS

DS13252 - Rev 1

page 5/31

Table 1. STM32WB5MMG pin/ball definition

STM32WB5MMG

Pin description

Pin name

STM32WB5MMG STM32WB55VGY

1 F6

2 G6 PA1 I/O

3 G7 PA0 I/O

4 H8 VREF+ S

5 J9 VSS S

6 H9 VDDA S

7 G10 PC3 I/O

8 G9 PC2 I/O

9 G8 PC1 I/O

10 F9 NRST I/O

11 F10 PB9 I/O

12 F8 PC0 I/O

13 E8 PH3-BOOT0 I/O

14 F7 PB8 I/O

15 C10 VBAT S

16 F1 VSSSMPS S

17 D1 VDDSMPS S

18 D7 PB7 I/O

19 D6 PB5 I/O

20 C7 PB4 I/O

21 A9 PB3 I/O

22 A6 PC10 I/O

23 B6 PC11 I/O

24 C5 PC12 I/O

25 A5 PA13 I/O

26 A3 PA14 I/O

27 A4 PA15 I/O

28 B5 PA10 I/O

29 A2 PA12 I/O

30 A1 PA11 I/O

31 - VSS S

32 B3 VDDUSB S

33 C4 PD0 I/O

34 C3 PD1 I/O

35 C1 PB13 I/O

36 D2 PC6 I/O

37 E2 PB14 I/O

38 F3 PB15 I/O

39 F5 PB6 I/O

40 G5 PC13 I/O

41 G3 PB12 I/O

42 G1 PE4 I/O

45 H5 PC5 I/O

46 J6 PB11 I/O

Pin name (function after reset) Pin type

PA2 I/O

DS13252 - Rev 1

page 6/31

STM32WB5MMG

Pin description

Pin name

STM32WB5MMG STM32WB55VGY

47 K6

48 K7 PB2 I/O

49 G4 PC4 I/O

50 J7 PA8 I/O

51 K8 PA9 I/O

52 H6 PA7 I/O

53 H7 PA6 I/O

54 K9 PA5 I/O

55 K10 PA4 I/O

56 J8 PA3 I/O

57 - VSS S

58 - ANT_IN -

59 - RF_OUT -

60 - VSS S

61 E10 PH0 I/O

62 E9 PH1 I/O

63 D8 PD14 I/O

64 B10 PE1 I/O

65 C9 PD13 I/O

66 B8 PD12 I/O

67 A8 PD7 I/O

68 A7 PD2 I/O

69 B4 PC9 I/O

70 C2 PD3 I/O

71 E3 PC7 I/O

72 G2 PE3 I/O

73 D3 PD4 I/O

74 D5 PD9 I/O

75 D4 PD8 I/O

76 E7 PD15 I/O

77 E4 PD10 I/O

78 E6 PE2 I/O

79 C8 PE0 I/O

80 B7 PD5 I/O

81 C6 PD6 I/O

82 E5 PD11 I/O

83 F4 PC8 I/O

84 - VSS S

85 - ANT_NC -

86 - VSS S

- D10 PC14-OSC32_IN I/O

- D9 PC15-OSC32_OUT I/O

- H10 VSSA S

- J10 VDD S

- K5 VDD S

Pin name (function after reset) Pin type

PB10 I/O

DS13252 - Rev 1

page 7/31

STM32WB5MMG

Pin description

Pin name

STM32WB5MMG STM32WB55VGY

- J4

- K4 RF1 I/O

- K3 VSSRF S

- K2 VSSRF S

- J3 VDDRF S

- K1 VSSRF S

- J2 OSC_OUT O

- J1 OSC_IN I

- H3 AT0 O

- H4 AT1 O

- H2 PB0 I/O

- H1 PB1 I/O

- J5 VSS S

- F2 VFBSMPS S

- E1 VLXSMPS S

- B1 VDD S

- B2 VSS S

- B9 VSS S

- A10 VDD S

Pin name (function after reset) Pin type

VSSRF S

DS13252 - Rev 1

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5 Recommendations

5.1 Pin recommendations

• ANT_IN and RF_OUT pins must be connected to GND. This module already integrates an antenna, so no external antenna required.

• The ANT_NC is only used for soldering planarity purposes. So this pin must be soldered to an unconnected pin on the customer board.

• A reset pull-up is already implemented in the STM32WB Series microcontrollers. The reset circuitry only requires an external capacitor for filtering purpose (see Figure 3).

STM32WB5MMG

Recommendations

Figure 3. Reset circuit

PC2

PC1

NRST

PB9

PC0

100nF

To reset mechanism

DS13252 - Rev 1

page 9/31

5.2 Layout recommendations

5.2.1 STM32WB5MMG placement

The embedded antenna manufacturer of the STM32WB5MMG recommends to place the module on the application board as shown below.

Figure 4. STM32WB5MMG board placement

STM32WB5MMG

Layout recommendations

This position allows the antenna to work to its maximum performance. If it cannot be placed as recommended above, the application board performance is be reduced. This does not, however, prevent correct operation.

5.2.2 Enclosure effects

Product casing properties must be also considered when designing an RF-enabled product as the following list illustrated;

• Conductive enclosure in close proximity (in far-field) of the antenna reflects the radiating signal and thus decreases the transmitting / receiving power. If there has to be a metal part in the enclosure, consider a frame rather than a box.

• Conductive enclosure in the near field affects the impedance of the antenna, also the resonant frequency. A metal case must not be in the near field. The threshold between near and far-field is provided in Figure 5.

• Plastic enclosures can be close to the antenna, but must not touch it. Contact between the casing and the antenna may influence the tuning of the resonant frequency and impedance matching.

• The proximity of the human body attenuates the TX and RX signals due to a certain amount of water content. Any contact may untune frequency and impedance matching.

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Figure 5. Conductive enclosure around the antenna

Table 2. Minimum enclosure dimensions (mm)

STM32WB5MMG

Layout recommendations

Impact level a b c d e

Impact threshold 46 60 27 23 17

High impact 13 24 3 8 5

Note: Impact is determined by measuring the reflection losses in the appropriate direction. In case conductive material

is present from other directions, the distances mentioned in Table 2 become larger. It means the same impact is observed further from module.

DS13252 - Rev 1

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5.2.3 Ground plane

Here are some recommendations with respect to the ground plane design:

• Do not route any tracks to the right of the STM32WB5MMG and keep a large ground plane with the associated ground via.

• Route the tracks down directly on the top layer or with via to the other layers.

• The ground plane must include the presence of vias (distance between two vias = 2 mm).

STM32WB5MMG

Layout recommendations

Figure 6. STM32WB5MMG ground plane layout

Tracks

Ground via

5.2.4 Sensitive GPIOs

This board contains three sensitive GPIOs as defined below:

• PB10

• PB11

• PC5

The GPIO locations are illustrated in Figure 7

It is recommendedl to add a 3.3 pF capacitor in a small package (0201 or smaller) as close as possible to PB10, PB11 and PC5 outputs of the STM32WB5MMG and also to border the GPIO tracks with ground.

Ground plane

Figure 7. Sensitive GPIO location

Superposition of

four layers

Sensitive GPIO location on layer 1

Sensitive GPIO location on layer 4

5.2.5 Four layer reference board design

The reference schematics are illustrated in Figure 8 and the associated PCB layout is illustrated in Figure 9

By using the first external pad ring, the mother board on which the module is soldered may be designed with only two layers. Using all the pads, the mother board must be designed with 4 layers.

DS13252 - Rev 1

Layer 1

Layer 4

page 12/31

D D

C C

B B

A A

*****1

STM32WB55_MODULE_4L

MB1697

7/22/2020 9:03:22 AM

Title

Size:

Number:

Date:

Revision:

Sheet ofTime:

PA21PA12PA0

PC37PC28PC1

NRST

PB9

PC0

PH3-BOOT0

PB8

PB7

PB5

PB4

PB3

PC10

PC11

PC12

PA1325PA1426PA15

PA1028PA1229PA11

PD0

PD1

PB13

PC6

PB14

PB15

PB6

PC13

PB12

PE4

PB1

PB0

PC5

PB11

PB10

PB2

PC4

PA850PA951PA752PA653PA554PA455PA3

ANT_IN58RF_OUT

PH0

PH1

PD14

PE1

PD13

PD12

PD7

PD2

PC9

PD3

PC7

PE3

PD4

PD9

PD8

PD15

PD10

PE2

PE0

PD5

PD6

PD11

PC8

ANT_NC

U1A

STM32WB5MMG

VREF+

VSS_9

VDDA6VBAT15VSSSMPS16VDDSMPS

VSS_1

VDD_USB

VSS_257VSS_360VSS_484VSS_5

U1B

STM32WB5MMG

LD3985M33R

GND

BYPASS

INH

Vin Vout

USBLC6-2P6

IO23GND2IO1

IO_1

VBUS

IO_2

USB_uB_105017-0001

VBUS

1DM2DP3ID4

GND

Shield

USB_Micro-B receptacle

Shield7Shield8Shield

EXP10EXP

CN1

5V_USB

GND

5V_USB

GND

USB_N

USB_P

D_N

D_P

GND

TRUE GREEN

LD1

5V_USB VDD

3V3

GND

VDD

100nF, 50V

GND

VDD

USB_N

USB_P

PA0

PA1

PA2

PA3

PA4

PA5

PA7

PA6

PA8

PA9

PA10

PA13

PA14

PA15

PB2

PB3

PB4

PB5

PB6

PB7

PB8

PB9

PB10

PB11

PB12

PB13

PB14

PB15

PE4

PC13

PC12

PC11

PC10

PC5

PC6

PC4

PC3

PC1

PC2

PC0

PD1 PD0

Header 3x1

JP1

VBAT

100K

GND

PA10

PA2

PA1PA0

PB8

PC3

PA15

PA14

PC12PC11

PC10

PA13

PB3

PA3

PA4

PB7

PB5 PB4

GND

PC4 PB2

PB10 PB11

PC5 PE4

PB12 PC13

PB6

PB15 PB14

PC6 PB13

PD1 PD 0

PA6

PC2

PC1

PC0

PB9

PA9

PA7

PA5

PA8

KMR7

4 3

10K, 0.1%

1K - 0.5%

100nF, 50V

1uF, 50V

10nF, 50V

ESDALC6V1-1U2

PE0

PE1

PE2

PE3

PE0

PE1

PE2 PE3

PC7

PC8

PC9

PC7

PC8

PC9

PH0

PH1

PH0

PH1

PD2

PD3

PD4

PD5

PD6

PD7

PD8

PD9

PD10

PD11

PD12

PD13

PD14

PD15

PD2

PD3

PD4

PD5

PD6

PD7

PD8

PD9

PD10

PD11

PD12

PD13

PD14

PD15

Header 3x1

JP2

Socket

CR2032

CR2032-SOCKET

VBATGND

UART_RX

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

JP3

HEADER 10X2

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

JP4

HEADER 10X2

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

21 22

23 24

JP5

HEADER 12X2

GND

3V3

3nF

GND GND GND

PC5

PB10

PB11

Place as close as poosible to

the STM32WB5MMG pins

STM32WB5MMG

Layout recommendations

Figure 8. Reference board schematics

DS13252 - Rev 1

page 13/31

STM32WB5MMG

Layout recommendations

Figure 9. PCB layout

Layer 1 Layer 2 Layer 3 Layer 4

DS13252 - Rev 1

page 14/31

6 Electrical characteristics

6.1 Operating conditions

Table 3. STM32WB5MMG operating conditions

Parameter Min. Typ. Max. Unit

Operating ambient temperature range -40 - 85 °C

Storage temperature range -40 - 125 °C

6.2 Power consumption

The power consumption is identical to the regular STM32WB55. For full details refer to Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5 and 802.15.4 radio solution (DS11929).

STM32WB5MMG

Electrical characteristics

1.71 3.3 3.6 V

6.3 RF characteristics

Refer to Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5 and 802.15.4 radio solution (DS11929) for more details.

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6.4 Antenna radiation patterns and efficiency

Figure 10. Antenna radiation patterns

XY axis

STM32WB5MMG

Antenna radiation patterns and efficiency

Z axis

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7 Thermal characteristics

The thermal characterics of the STM32WB5MMG are defined below and the constant values are given in Table 4

• ϴ

• ΨJT, Junction-to-top-center thermal characterization parameter (EIA/JESD51-2 and EIA/JESD51-6):

• ϴJC, Junction-to-case thermal resistance :

• ϴJB, Junction-to-board thermal resistance (EIA/JESD51-8):

Junction-to-ambient thermal resistance (EIA/JESD51-2 and EIA/JESD51-6):

JA,

= (TJ-TA) / P

JA,

where TJ= junction temperature, TA= ambient temperature, PH= power dissipation.

represents the resistance to the heat flows from the chip to ambient air. It is an indicator of package

JA,

heat dissipation capability. Lower ϴ

ΨJT = (TJ-TT) / PH,

where TT= temperature at the top-center of the package.

ΨJT is used for estimating the junction temperature by measuring TT in an actual environment.

ϴJC = (TJ–TC) / PH,

where TC= case temperature attached with a cold plate.

ϴJC represents the resistance to the heat flows from the chip to package top case. ϴJC is important when external heat sink is attached on package top.

ϴJB = (TJ–TB) / PH,

where TB= board temperature with ring cold plate fixture applied.

ϴJB represents the resistance to the heat flows from the chip to PCB. JBis used in compact thermal models for system-level thermal simulation.

means better overall thermal performance.

JA,

STM32WB5MMG

Thermal characteristics

Table 4. STM32WB5MMG thermal characteristics

Symbol

Value 97.36 96.98 37.36 0.38 24.58 16.21

TJ(°C) TC(°C) ΨJT(°C/W) ϴJA(°C/W) ϴJB(°C/W) ϴJC(°C/W)

DS13252 - Rev 1

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8 Solder re-flow recommendation

A recommended soldering profile is shown below. The re-flow profile is based on using specific solder paste SAC305.

Table 5. Solder re-flow specification

STM32WB5MMG

Solder re-flow recommendation

A. Ramp up rate

(25-150 ºC)

<1.2 °C/s 60-90 sec <1 °C/s 60-90 sec 230-255 °C <6 °C/s

B. Pre-heat time

(155-165 ºC)

C. Ramp up (200

ºC - peak)

D. Re-flow time

(above 220 ºC)

E. Peak temperature (230-255 ºC)

G. Cooling rate

(peak-25 ºC)

Figure 11. Recommended re-flow profile

E. Peak temp:230 – 255 °C

G. Cooling rate

(peak to ≈25 °C): <6 °C/s

(above 220 °C) 60 – 90 sec

D. Reflow time

A. Ramp up rate

(≈25 to 150 °C): <1.2 °C/s

B. Preheat time

(155 to 165 °C): 60 - 90 sec

(200 °C - peak): <1 °C/s

C. Ramp up

DS13252 - Rev 1

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9 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

9.1 SiP-LGA86 package information

This SiP-LGA is a 86 pin, 7.3 x 11mm, system in package land grid array package.

Figure 12. SiP-LGA86 - Outline

STM32WB5MMG

Package information

aaa (4x)

A1 CORNER

(x2)b1xb1

(x56)b2xb3

(x24)b4xb4

(x4)b2xb2

PIN A1 CORNER

TOP VIEW

bbb

DETAIL A

SEATING PLANE

ddd

SIDE VIEWBOTTOM VIEW

DS13252 - Rev 1

DETAIL A

1. Drawing is not to scale.

page 19/31

Symbol Min Typ Max Unit

A 1.382±0.046

A2 0.150 μm

M 1.100

S 0.242

D 10925 11.000 11.075

D1 7.250

D2 2.563

D3 8.438

eD 0.450

E 7.225 7.300 7.375

eE 0.450

b1 0.430

b2 0.350

b3 0.300

b4 0.600

F1 0.600

F2 0.475

F3 0.900

F4 2.300

G1 0.465

G2 2.960

G3 4.800

G4 0.475

H1 0.600 μm

H2 0.400 μm

(3)

(4)

aaa 0.075

bbb 0.100

ddd 0.100

1. Peripheral pads

2. Inner pads

3. Top surface sputter

4. Side wall sputter

STM32WB5MMG

SiP-LGA86 package information

Table 6. SiP-LGA86 - Mechanical data

(1)

40±20

(2)

30±20

3 - 6 μm

1 - 3 μm

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9.1.1 Device marking for SiP-LGA86

The following figure gives an example of topside marking versus pin 1 position identifier location.

The printed markings may differ depending on the supply chain.

Other optional marking or inset/upset marks, which depend on supply chain operations, are not indicated below.

STM32WB5MMG

SiP-LGA86 package information

Figure 13. SiP-LGA86 marking example

Product

identification

(1)

32WB5M

2D matrix

code

MGH6TR

Certification

marking

WWY

Date code

Pin 1 indentifier

1. Parts marked as “ES”, “E” or accompanied by an Engineering Sample notification letter, are not yet qualified and therefore not approved for use in production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for the customer using any of these engineering samples in production. ST’s Quality department must be contacted prior to any decision to use these engineering samples to run a qualification activity.

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10 Ordering information

Example: STM32 WB 5 M M G H 6 TR

Device family

STM32 = Arm-based 32-bit microcontroller

Product type

WB = Wireless Bluetooth

Device subfamily

5 = STM32WB55, Die 5, full set of features

Pin count

M = 86 pins

Component type

M= module

STM32WB5MMG

Ordering information

Flash memory size

G = 1 Mbyte

Package

H = LGA 86 7.3 x 11 mm

Temperature range

6 = Industrial temperature range, –40 to 85 °C

Packing

TR = tape and reel

For a list of available options (such as speed and package) or for further information on any aspect of this device, contact your nearest ST sales office.

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11 Tape and reel packing

The module tape and reel orientation and dimension are described in the figure below.

STM32WB5MMG

Tape and reel packing

Fig. 1

Figure 14. STM32WB5MMG packing drawing

DS13252 - Rev 1

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12 Certification

The STM32WB5MMG module passed the following certifications:

• ZigBee (802.15.4-4PHY)

• BLE (RF_PHY)

• CE

• FCC-TCB (USA)

• ISED-FCB (Canada)

• JRF (Japan)

• KC or MSIP (Korea)

• NCC (Taiwan)

• ROHS

• REACH

• GOST (Russia).

SRRC (China) certification is ongoing.

The following sections detail some of the module certifications from sample regions.

STM32WB5MMG

Certification

12.1 CE certification

The STM32WB5MMG module has obtained CE certification.

The module is provided with CE marking.

Figure 15. CE certification logo

12.2 FCC certification

The STM32WB5MMG module complies with part 15 of the FCC Rules.

The module is labeled with its own FCC ID: YCP-STM32WB5M001

The operation is subject to the following two conditions:

• This device may not cause harmful interference

• This device must accept any interference received, including interference that may cause undesired operation.

Note: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part

15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.

DS13252 - Rev 1

Label requirements

If the identification number is not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed module. This label must contain FCC ID: YCP-STM32WB5M001

RF radiation exposure statement caution

The module antenna must be installed to meet the RF exposure compliance separation distance of “20 cm” and any additional testing and authorization processes as required.

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12.3 ISED certification

The STM32WB5MMG module has been tested and found compliant with the ISED RSS-247 and RSS-Gen rules. The IC ID is 8976A-STM32WB5M01.

This module contains license-exempt transmitter(s) that comply with Innovation, Science and Economic Development Canada’s license-exempt RSS(s). Operation is subject to the following two conditions:

• This module may not cause interference

• This module must accept any interference, including interference that may cause undesired operation of the module.

RF radiation exposure statement caution

This Transmitter must be installed to provide a separation distance of at least 20 cm from all persons.

12.4 JRF certification

The STM32WB5MMG is certified in Japan with certification number: 005-102490

The JRF logo is the following:

STM32WB5MMG

ISED certification

Figure 16. JRF certification logo

12.5 NCC certification

The STM32WB5MMG is certified in Taiwan with NCC certification number: CCAN20LP0740T3.

The NCC log is the following:

Figure 17. NCC certification logo

Low-power radio wave radiation equipment management measures:

• Article 12: For low-power radio frequency equipment that has passed the type certification, the company, trade name, or user shall not change the frequency, increase the power, or change the characteristics and functions of the original design without permission.

• Article 14: The use of low-power radio frequency equipment must not affect flight safety and interfere with legal communications; if interference is found, it should be stopped immediately, and it can only be used when there is no interference. Legal communications in the preceding paragraph refers to radio communications operated in accordance with the Telecommunications Law. Low-power radio frequency equipment must endure interference from legal communications or industrial, scientific, and medical radio wave radiation electrical equipment.

12.6 SRRC certification

The Chinese SRRC certification is ongoing.

Note: CMIIT ID is temporarily replaced with 32WBCERTIF. This code is updated with the code assigned by the China

Ministry of Industry and Information Technology after SRRC certification is completed.

DS13252 - Rev 1

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Revision history

12-Nov-2020 1 Initial release.

STM32WB5MMG

Table 7. Document revision history

Date Revision Changes

DS13252 - Rev 1

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STM32WB5MMG

Contents

1 Introduction .......................................................................2

2 Description ........................................................................3

3 Available peripherals ..............................................................4

4 Pin description ....................................................................5

5 Recommendations.................................................................9

5.1 Pin recommendations...........................................................9

5.2 Layout recommendations.......................................................10

5.2.1 STM32WB5MMG placement...............................................10

5.2.2 Enclosure effects........................................................10

5.2.3 Ground plane ..........................................................12

5.2.4 Sensitive GPIOs ........................................................12

5.2.5 Four layer reference board design ..........................................12

6 Electrical characteristics..........................................................15

6.1 Operating conditions...........................................................15

6.2 Power consumption ...........................................................15

6.3 RF characteristics .............................................................15

6.4 Antenna radiation patterns and efficiency .........................................16

7 Thermal characteristics...........................................................17

8 Solder re-flow recommendation...................................................18

9 Package information..............................................................19

9.1 SiP-LGA86 package information .................................................19

9.1.1 Device marking for SiP-LGA86 .............................................21

10 Ordering information .............................................................22

11 Tape and reel packing ............................................................23

12 Certification ......................................................................24

12.1 CE certification ...............................................................24

12.2 FCC certification ..............................................................24

12.3 ISED certification..............................................................25

12.4 JRF certification...............................................................25

DS13252 - Rev 1

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STM32WB5MMG

Contents

12.5 NCC certification ..............................................................25

12.6 SRRC certification.............................................................25

Revision history .......................................................................26

Contents ..............................................................................27

List of tables ..........................................................................29

List of figures..........................................................................30

DS13252 - Rev 1

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STM32WB5MMG

List of tables

Table 1. STM32WB5MMG pin/ball definition .......................................................6

Table 2. Minimum enclosure dimensions (mm)..................................................... 11

Table 3. STM32WB5MMG operating conditions .................................................... 15

Table 4. STM32WB5MMG thermal characteristics .................................................. 17

Table 5. Solder re-flow specification ............................................................ 18

Table 6. SiP-LGA86 - Mechanical data .......................................................... 20

Table 7. Document revision history ............................................................. 26

DS13252 - Rev 1

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STM32WB5MMG

List of figures

Figure 1. STM32WB5MMG module block diagram ..................................................3

Figure 2. STM32WB5MMG module pinout: bottom view .............................................. 5

Figure 3. Reset circuit ......................................................................9

Figure 4. STM32WB5MMG board placement .....................................................10

Figure 5. Conductive enclosure around the antenna ................................................ 11

Figure 6. STM32WB5MMG ground plane layout ................................................... 12

Figure 7. Sensitive GPIO location ............................................................. 12

Figure 8. Reference board schematics ......................................................... 13

Figure 9. PCB layout......................................................................14

Figure 10. Antenna radiation patterns ........................................................... 16

Figure 11. Recommended re-flow profile ......................................................... 18

Figure 12. SiP-LGA86 - Outline ............................................................... 19

Figure 13. SiP-LGA86 marking example ......................................................... 21

Figure 14. STM32WB5MMG packing drawing ..................................................... 23

Figure 15. CE certification logo ............................................................... 24

Figure 16. JRF certification logo...............................................................25

Figure 17. NCC certification logo .............................................................. 25

DS13252 - Rev 1

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STM32WB5MMG

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

DS13252 - Rev 1

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ST MICROELECTRONICS STM32WB5MMGH6 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

1 Introduction

2 Description

3 Available peripherals

4 Pin description

5 Recommendations

5.1 Pin recommendations

5.2 Layout recommendations

5.2.1 STM32WB5MMG placement

5.2.2 Enclosure effects

5.2.3 Ground plane

5.2.4 Sensitive GPIOs

5.2.5 Four layer reference board design

6 Electrical characteristics

6.1 Operating conditions

6.2 Power consumption

6.3 RF characteristics

6.4 Antenna radiation patterns and efficiency

7 Thermal characteristics

8 Solder re-flow recommendation

9 Package information

9.1 SiP-LGA86 package information

9.1.1 Device marking for SiP-LGA86

10 Ordering information

11 Tape and reel packing

12 Certification

12.1 CE certification

12.2 FCC certification

12.3 ISED certification

12.4 JRF certification

12.5 NCC certification

12.6 SRRC certification

Revision history

Contents

List of tables

List of figures