The STM32L4R9I-EVAL board is designed as a complete demonstration and development
platform for the STMicroelectronics Arm
microcontroller with four I²C buses, three SPI and six USART ports, CAN port, two SAI
ports, 12-bit ADC, 12-bit DAC, internal 640-Kbyte SRAM and 2-Mbyte Flash memory, two
Octo-SPI memory interfaces, touch-sensing capability, USB OTG FS port, LCD-TFT
controller, MIPI
interface and JTAG debugging support.
The STM32L4R9I-EVAL, shown in Figure 3, Figure 4, and Figure 5, is used as a reference
design for user application development before porting to the final product.
The full range of hardware features on the board helps the user to evaluate all the
peripherals (USB, USART, digital microphones, ADC and DAC, TFT LCD, MIPI DSI
display, LDR, SRAM, NOR Flash memory device, Octo-SPI Flash memory device,
microSD™ card, sigma-delta modulators, CAN transceiver, EEPROM) and develop
applications. Extension headers allow easy connection of a daughterboard or wrapping
board for a specific application.
An ST-LINK/V2-1 is integrated on the board, as the embedded in-circuit debugger and
programmer for the STM32 MCU and the USB virtual COM port bridge.
®
DSI host controller, flexible memory controller (FMC), 8- to 14-bit camera
-based microcontroller with 2 Mbytes of Flash memory and
640 Kbytes of RAM in a UFBGA169 package
•1.2” 390x390 pixels MIPI DSI
SM
round LCD
•4.3” 480x272 pixels TFT LCD with RGB mode
•Two ST-MEMS digital microphones
•8-Gbyte microSD™ card bundled
•16-Mbit (1 M x 16 bit) SRAM device
•128-Mbit (8 M x 16 bit) NOR Flash memory device
•512-Mbit Octo-SPI Flash memory device with double transfer rate (DTR) support
•64-Mbit Octo-SPI SRAM memory device with HyperBus interface support
•EEPROM supporting 1 MHz I²C-bus communication speed
•Reset and wake-up/tamper buttons
•Joystick with four-way controller and selector
•Touch-sensing button
•Light-dependent resistor (LDR)
•Potentiometer
•Coin battery cell for power backup
•Board connectors:
–Two jack outputs for a stereo audio headphone with independent content
–Slot for microSD™ card supporting SD and SDHC
–TFT LCD standard connector
–MIPI DSI
SM
display standard connector
–EXT_I2C connector supports I²C bus
–RS-232 port configurable for communication or MCU flashing
–USB OTG FS Micro-AB port
–CAN 2.0A/B-compliant port
–Connector for ADC input and DAC output
–JTAG/SWD connector
–ETM trace debug connector
–User interface through USB virtual COM port
–Embedded ST-LINK/V2-1 debug and flashing facility
–TAG connector
–STDC14 connector
–PMOD connector
–Extension connector for the daughterboard
–Motor-control connector on the daughterboard
•Flexible power-supply options: power jack, ST-LINK/V2-1 USB connector,
a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
8/72UM2248 Rev 4
UM2248Ordering information
USB OTG FS connector, daughterboard
•On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration capability:
mass storage, virtual COM port and debug port
•Microcontroller supply voltage: fixed 3.3 V or adjustable range from 1.71 V to 3.6 V
•MCU current consumption measurement circuit
•Access to the comparator and operational amplifier of STM32L4R9AII6
•Comprehensive free software libraries and examples available with the STM32Cube
package
•Support of a wide choice of integrated development environments (IDEs) including IAR
Embedded Workbench
®
, MDK-ARM, and STM32CubeIDE
2 Ordering information
To order the STM32L4R9I-EVAL Evaluation board, refer to Ta bl e 1. Additional information is
available from the datasheet and reference manual of the target STM32.
Table 1. Ordering information
STM32L4R9I-EVAL
1. DSI display daughterboard
2. TFT LCD daughterboard
2.1 Codification
The meaning of the codification is explained in Tabl e 2.
STM32XXYY-EVALDescriptionExample: STM32L4R9I-EVAL
XX
YY
I
Order code
Board
reference
– MB1313
– MB1314
– MB1315
(1)
(2)
Targeted STM32
STM32L4R9AII6
Table 2. Codification explanation
MCU series in STM32 Arm
Cortex MCUs
STM32 product line
in the
series
STM32 Flash memory size:
– I for 2 Mbytes
STM32L4 Series
STM32L4R9
2 Mbytes
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3 Development environment
3.1 System requirements
•Windows® OS (7, 8, and 10), Linux® 64-bit, or macOS
•USB Type-A or USB Type-C® to Micro-B cable
3.2 Development toolchains
•IAR Systems - IAR Embedded Workbench
•Keil® - MDK-ARM
•STMicroelectronics - STM32CubeIDE
(b)
3.3 Demonstration software
The demonstration software, included in the STM32Cube MCU Package corresponding to
the on-board microcontroller, is preloaded in the STM32 Flash memory for easy
demonstration of the device peripherals in standalone mode. The latest versions of the
demonstration source code and associated documentation can be downloaded from
www.st.com.
®(b)
®(a)
4 Delivery recommendations
Before the first use, make sure that no damage occurred to the boards during shipment and
no socketed components are loosen in their sockets or fallen into the plastic bag.
In particular, pay attention to the following components:
1.microSD™ card in its CN8 receptacle
2. DSI display MB1314 daughterboard in its CN16 connector
For product information related to the STM32L4R9AII6 microcontroller, visit www.st.com
website.
5 Technology partners
MACRONIX: 512-Mbit Octo-SPI Flash, part number MX25LM51245GXDI00
a. macOS® is a trademark of Apple Inc. registered in the U.S. and other countries.
b. On Windows only
10/72UM2248 Rev 4
UM2248Hardware layout and configuration
MSv46034V2
3.3 V
power supply
1.8 V
power supply
VDD ADJ
power supply
STM32L4R9AII6
UFBGA169
VBAT
RTC
Octo SPI1
Octo SPI2
SDIO1
OTG FS
TSC
LPUSART1
SPI2
CAN
UART3
DAP
DFSDM
SAI1
MIPI DSI
RGB
FMC
I2C2
ADC/DAC
OPAMP1
COMP2
GPIO
Audio codec
DSI LCD connector
TFT LCD connector
NOR Flash
SRAM/PSRAM
EEPROM
EXT_I2C connector
ADC/DAC connector
Potentiometer/LDR
Joystick/buttons
LEDs
Motor control
connector
PMOD connector
CAN connector
ST-LINK/V2-1
JTAG/SWD connector
TAG connector
Trace connector
STDC14 connector
3 V battery
32 KHz crystal
Octo SPI Flash
Octo SPI SRAM
microSD card
USB connector
One TS PAD
RS232 connector
MEMs
6 Hardware layout and configuration
The STM32L4R9I-EVAL board is designed around the STM32L4R9AII6 target
microcontroller in a UFBGA 169-pin package.
connections with peripheral components. Figure 2 shows the location of the main
components on the Evaluation board. Figure 3, Figure 4, and Figure 5 are the three images
showing the
STM32L4R9I-EVAL board top view with round DSI display, top view with TFT LCD, and
bottom view.
ST-LINK/V2-1 facility for debugging and flashing of the STM32L4R9AII6 is integrated on the
STM32L4R9I-EVAL board.
Compared to the ST-LINK/V2 stand-alone tool available from STMicroelectronics, STLINK/V2-1 offers new features and drops some others.
New features:
•USB software re-enumeration
•Virtual COM port interface on USB
•Mass storage interface on USB
•USB power management request for more than 100mA power on USB
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Features dropped:
•SWIM interface
The CN21 USB connector can be used to power STM32L4R9I-EVAL regardless of the
ST-LINK/V2-1 facility use for debugging or for flashing STM32L4R9AII6. This holds also
when the ST-LINK/V2 stand-alone tool is connected to CN12, CN17, CN11, or CN15
connector and used for debugging or flashing STM32L4R9AII6. Section 6.5 provides more
details on powering STM32L4R9I-EVAL.
For full detail on both versions of the debug and flashing tool, the stand-alone ST-LINK/V2
and the embedded ST-LINK/V2-1, refer to www.st.com.
6.3.1 Drivers
Before connecting STM32L4R9I-EVAL to a Windows (XP, 7, 8 10) PC via USB, a driver for
ST-LINK/V2-1 must be installed. It is available from www.st.com.
In case the STM32L4R9I-EVAL board is connected to the PC before installing the driver, the
Windows device manager may report some USB devices found on STM32L4R9I-EVAL as
“Unknown”. To recover from this situation, after installing the dedicated driver downloaded
from www.st.com, the association of “Unknown” USB devices found on STM32L4R9I-EVAL
to this dedicated driver must be updated in the device manager manually. It is recommended
to proceed using the USB Composite Device line, as shown in
Figure 8.
Figure 8. USB composite device
6.3.2 ST-LINK/V2-1 firmware upgrade
For its operation, ST-LINK/V2-1 employs a dedicated MCU with Flash memory. Its firmware
determines ST-LINK/V2-1 functionality and performance. The firmware may evolve during
the life span of STM32L4R9I-EVAL to include new functionality, fix bugs, or support new
target microcontroller families. It is therefore recommended to keep ST-LINK/V2-1 firmware
up to date. The latest version is available from www.st.com.
6.4 ETM trace
The CN12 connector is available to output trace signals used for debugging. By default, the
Evaluation board is configured such that, STM32L4R9AII6 signals PE2, PE5, and PE6 are
not connected to trace outputs Trace_CK, Trace_D2, and Trace_D3 of CN12. They are
used for other functions.
18/72UM2248 Rev 4
UM2248Hardware layout and configuration
Tabl e 3 shows the setting of configuration elements to shunt PE2, PE5, and PE6 MCU ports
to the CN12 connector, to use them as debug trace signals.
Table 3. Setting of configuration elements for CN12 trace connector
ElementSettingConfiguration
R53
SB56
R209
SB59
R211
SB60
SB56 open
SB56 closed
SB59 open
R209 out
SB59 closed
SB60 open
R211 out
SB60 closed
Warning: Enabling the CN12 trace outputs through hardware modifications described in
Tabl e 3 results in reducing the memory address bus width to 20 address lines and so the
addressable space to 1 Mword of 16 bits. As a consequence, the onboard SRAM and NOR
Flash memory usable capacity is reduced to 16 Mbits.
6.5 Power Supply
The STM32L4R9I-EVAL board is designed to be powered from 5 V DC power source. It
incorporates a precise polymer Zener diode (Poly-Zen) protecting the board from damage
due to the wrong power supply. One of the following four 5
an appropriate board configuration:
•Power jack CN18 marked PSU_DC5V on the board. A jumper must be placed in E5V
location of JP11. The positive pole is on the center pin as illustrated in Figure 20.
•Micro-B USB receptacle CN21 of ST-LINK/V2-1 provides up to 500mA to the board.
Offering enumeration feature described in Section 6.5.1.
•Micro-AB USB receptacle CN3 of USB OTG interface marked USB OTG_FS on the
board, supplies up to 500mA to the board.
•Pin 39 of CN5 and Pin 39 of CN6 extension connectors for a custom daughterboard,
marked D5V on the board.
R53 in
R53 out
R209 in
R211 in
Default setting.
PE2 connected to memory address line A23.
PE2 connected to Trace_CK on CN12. A23 pulled down.
Default setting.
PE5 connected to memory address line A21.
PE5 connected to Trace_D2 on CN12. A21 pulled down.
Default setting.
PE6 connected to memory address line A22.
PE6 connected to Trace_D3 on CN12. A22 pulled down.
V DC power inputs is usable with
No external power supply is provided with the board.
LD7 red LED turns on when the voltage on the power line marked as +5 V is present. All
supply lines required for the operation of the components on STM32L4R9I-EVAL are
derived from that +5
V line.
Table 4 describes the setting of all jumpers related to powering the STM32L4R9I-EVAL and
its extension board. VDD_MCU is STM32L4R9AII6 digital supply voltage line. It is possible to
drive the boards with either fixed 3.3
RV3 potentiometer and producing a range of voltages between 1.71
V or with an adjustable voltage regulator controlled by
V and 3.6 V.
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6.5.1 Supplying the board through ST-LINK/V2-1 USB port
To power STM32L4R9I-EVAL in this way, the USB host (a PC) gets connected with the
STM32L4R9I-EVAL board’s Micro-B USB receptacle, via a USB cable. This event is the
beginning of the USB enumeration procedure. In its initial phase, the host’s USB port
current supply capability is limited to 100 mA. It is enough because only the ST-LINK/V2-1
part of STM32L4R9I-EVAL draws power at that time. If the SB33 solder bridge is open, the
U22 ST890 power switch is set in the OFF position, which isolates the remainder of
STM32L4R9I-EVAL from the power source. In the next phase of the enumeration
procedure, the host PC informs the ST-LINK/V2-1 facility of its capability to supply up to 300
mA of current. If the answer is positive, the ST-LINK/V2-1 sets the U22 ST890 switch to ON
position to supply power to the remainder of the STM32L4R9I-EVAL board. If the PC USB
port is not capable of supplying up to 300 mA of current, the CN18 power jack is available to
supply the board.
If a short-circuit occurs on the board, the ST890 power switch protects the USB port of the
host PC against a current exceeding 600 mA. In such an event, the LD8 LED lights on.
The STM32L4R9I-EVAL board is also supply-able from a USB power source not supporting
enumeration, such as a USB charger, as shown in
power switch ON regardless of the enumeration procedure result and passes the power
unconditionally to the board.
The LD7 red LED turns on whenever the whole board is powered.
Table 4. ST-LINK/V2-1 turns the ST890
6.5.2 Using ST-LINK/2-1 along with powering through the CN18 power jack
If the board requires more than 300 mA of supply current, this cannot be provided by the
host PC connected to the ST-LINK/2-1 USB port, used for debugging or flashing
STM32L4R9AII6. In such a case, the board is supplied through CN18 (marked PSU_DC5V
on the board).
To do this, it is important to power the board before connecting it with the host PC, which
requires the following sequence to be respected:
1.Set the jumper in JP11 header in E5V position,
2. Connect the external 5 V power source to CN18,
3. Check the red LED LD7 is turned on,
4. Connect the host PC to the CN12 USB connector.
In case the board requires more than 300 mA and the host PC is connected via USB before
the board is powered from CN18, there is a risk of the following events to occur, in the order
of severity:
1.The host PC is capable of supplying 300 mA (the enumeration succeeds) but it does
not incorporate any over-current protection on its USB port. It is damaged due to overcurrent.
2. The host PC is capable of supplying 300 mA (the enumeration succeeds) and it has
built-in over-current protection on its USB port, limiting or shutting down the power out
of its USB port when the excessive current requirement from STM32L4R9I-EVAL is
detected. This causes an operating failure to STM32L4R9I-EVAL.
3. The host PC is not capable of supplying 300 mA (the enumeration fails) so ST-LINK/V21 does not supply the remainder of STM32L4R9I-EVAL from its USB port V
BUS
line.
20/72UM2248 Rev 4
UM2248Hardware layout and configuration
E5V
U5V
STlkD5V
E5V
U5V
STlkD5V
E5V
U5V
STlkD5V
E5V
U5V
STlkD5V
E5V
U5V
STlkD5V
1
3
2
1
3
2
1
3
2
1
3
2
1
3
2
1
3
2
Jumper /
solder
bridge
JP11
Power
source
selector
JP8
Vbat
connection
JP10
VDD_MCU
connection
JP1
VDD_USB
connection
Table 4. Power supply related jumpers settings
SettingConfiguration
STM32L4R9I-EVAL is supplied through the CN18 power
jack (marked PSU_DC5V). CN5 and CN6 extension
connectors do not pass the 5 V of STM32L4R9I-EVAL to the
daughterboard.
STM32L4R9I-EVAL is supplied through the CN3 Micro-AB
USB connector. CN5 and CN6 extension connectors do not
pass the 5 V of STM32L4R9I-EVAL to the daughterboard.
Default setting.
STM32L4R9I-EVAL is supplied through the CN21 Micro-B
USB connector. CN5 and CN6 extension connectors do not
pass the 5 V of STM32L4R9I-EVAL to the daughterboard.
STM32L4R9I-EVAL is supplied through pin 39 of CN5 and
pin 39 of CN6 extension connectors.
STM32L4R9I-EVAL is supplied through the CN18 power
jack. CN5 and CN6 extension connectors pass the 5 V of
STM32L4R9I-EVAL to the daughterboard. Make sure to
disconnect from the daughterboard, any power supply that
may generate conflict with the power supply on the CN18
power jack.
Vbat is connected to the battery.
Default setting.
Vbat is connected to VDD.
Default setting.
VDD_MCU (VDD terminals of STM32L4R9AII6) is
connected to fixed +3.3 V.
VDD_MCU is connected to voltage in the range from
+1.71 V to +3.6 V, adjustable with potentiometer RV3.
Default setting.
VDD_USB (VDD USB terminal of STM32L4R9AII6) is
connected with VDD_MCU.
VDD_USB is connected to +3.3 V.
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1
3
2
1
3
2
1
2
1
2
Table 4. Power supply related jumpers settings (continued)
Jumper /
solder
bridge
JP2
VDDA
connection
SettingConfiguration
Default setting.
VDDA terminal of STM32L4R9AII6 is connected with
VDD_MCU.
VDDA terminal of STM32L4R9AII6 is connected to +3.3 V.
JP3
VDD_IO
connection
SB33
SB33 Off
Powering
through
USB of
ST-LINK/
V2-1
1. On all ST-LINK/V2-1 boards, the target application is now able to run even if the ST-LINK/V2-1 is either not
connected to a USB host, or is powered through a USB charger (or through a not-enumerating USB host).
SB33 On
6.6 Clock references
Two clock references are available on STM32L4R9I-EVAL for the STM32L4R9AII6
microcontroller.
•32.768 kHz crystal X1, for embedded RTC
•25 MHz crystal X2, for the main clock generator
Default setting.
VDD_IO (VDDIO2 terminals of STM32L4R9AII6) is
connected with VDD_MCU.
VDD_IO is open.
Default setting.
The CN21 ST-LINK/V2-1 Micro-B USB connector can be
used to supply power to the STM32L4R9I-EVAL board
remainder, depending on the powering capability of the host
PC USB port declared in the enumeration.
CN21 Micro-B USB connector of ST-LINK/V2-1 supplies
power to the STM32L4R9I-EVAL board remainder. This is
the setting for powering the board through CN21 using a
USB charger)
(1)
.
The main clock generation is possible via an internal RC oscillator, disconnected by removing
resistors R61 and R65 when the internal RC clock is used.
Solder
bridge
SB50
22/72UM2248 Rev 4
Table 5. X1 crystal related solder bridge settings
SettingConfiguration
Default setting.
Open
Closed
PC14 OSC32_IN terminal is not routed to the CN5 extension
connector. X1 is used as the clock reference.
PC14 OSC32_IN is routed to the CN5 extension connector.
Resistor R50 must be removed, for the X1 quartz circuit not to
disturb the clock reference or source on the daughterboard.
UM2248Hardware layout and configuration
Table 5. X1 crystal related solder bridge settings (continued)
Solder
bridge
SB49
Solder
bridge
SB52
SB53
SettingConfiguration
Default setting.
Open
Closed
PC15 OSC32_OUT terminal is not routed to the CN5 extension
connector. X1 is used as the clock reference.
PC15 OSC32_OUT is routed to the CN5 extension connector.
Resistor R49 must be removed, for the X1 quartz circuit not to
disturb clock reference on the daughterboard.
Table 6. X2 crystal related solder bridge settings
SettingConfiguration
Default setting.
Open
Closed
Open
Closed
PH0 OSC_IN terminal is not routed to the CN5 extension
connector. X2 is used as the clock reference.
PH0 OSC_IN is routed to the CN5 extension connector. Resistor
R61 must be removed, in order not to disturb clock reference or
source on the daughterboard.
Default setting.
PH1 OSC_OUT terminal is not routed to the CN5 extension
connector. X2 is used as the clock reference.
PH1 OSC_OUT is routed to the CN5 extension connector. Resistor
R65 must be removed, in order not to disturb clock reference or
source on the daughterboard.
6.7 Reset sources
The reset signal of the STM32L4R9I-EVAL board is active LOW.
•reset through pin 27 of CN6 extension connector (reset from daughterboard)
•embedded ST-LINK/V2-1
6.8 Boot option
After reset, the STM32L4R9AII6 MCU boot is available from the following embedded
memory locations:
•main (user, non-protected) Flash memory
•system (protected) Flash memory
•RAM, for debugging
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0<->1
0<->1
The boot option is configured by setting switch SW1 (BOOT) and the boot base address
programmed in the nBOOT1, nBOOT0, and nSWBOOT0 of FLASH_OPTR option bytes.
Switch SettingDescription
SW1
Table 7. Boot selection switch
Default setting.
BOOT0 line is tied low. STM32L4R9AII6 boots from main Flash
memory or system memory.
BOOT0 line is tied high. STM32L4R9AII6 boots from system Flash
memory (nBOOT1 bit of FLASH_OPTR register is set high) or from
RAM (nBOOT1 is set low).
6.8.1 Bootloader limitations
Boot from system Flash memory results in executing bootloader code stored in the system
Flash memory protected against writing and erasing. This allows in-system programming
(ISP), that is, flashing the STM32 user Flash memory. It also allows writing data into RAM.
The data come in via one of the communication interfaces such as USART, SPI, I2C bus,
USB, or CAN.
The bootloader version is identified by reading the Bootloader ID at the address
0x1FFF6FFE: the content is 0x91 for bootloader V9.1 and 0x92 for V9.2.
The STM32L4R9AII6 part soldered on the STM32L4R9I-EVAL main board is marked with a
date code corresponding to its date of manufacturing. STM32L4R9AII6 parts with a date
code prior or equal to week 37 of 2017 are fitted with bootloader V9.1 affected by the
limitations to be worked around, as described hereunder. Parts with the date code starting
from week 38 of 2017 contain bootloader V9.2 in which the limitations no longer exist.
To locate the visual date code information on the STM32L4R9II6 package, refer to its
datasheet (DS12023) available at www.st.com, section Package Information. Date code
related portion of the package marking takes Y WW format, where Y is the last digit of the
year and WW is the week. For example, a part manufactured in week 38 of 2017 bares the
date code 7 38.
There is also another way to identify the need for a workaround: before opening the blister
of the Discovery Kit, just check the backside of the blister. At the bottom left side, if the
reference number is equal or higher than 32L4R9IDISCO/ 02-0, it means the bootloader
version is V9.2 and there is no need to apply a workaround. Any other inferior number like
01-0 needs the workaround.
The bootloader ID for the bootloader V9.1 is 0x91.
The following limitation exists in the bootloader V9.1:
Some user Flash memory data get corrupted when written via SPI interface
Description:
During bootloader SPI Write Flash operation, some random 64-bits (2 double-words) may
be left blank at 0xFF.
Workarounds:
24/72UM2248 Rev 4
UM2248Hardware layout and configuration
1
3
2
1
3
2
1
3
2
1
3
2
WA1: add a delay between sending the Write command and its ACK request. Its duration
must be the duration of the 256-Byte Flash write time.
WA2: read back after each writing operation (256 bytes or at end of user code flashing) and
in case of error start writing again.
WA3: Using bootloader, load a patch code in RAM to write in Flash memory through the
same Write Memory write protocol as bootloader (code provided by ST).
6.9 Audio
A codec connected to the STM32L4R9AII6 SAI interface supports the DSAI port TDM
feature. This offers STM32L4R9AII6 the capability to simultaneously stream two
independent stereo audio channels to two separate stereo analog audio outputs.
There are two digital microphones on the STM32L4R9I-EVAL board.
6.9.1 Digital microphones
U30 and U31 on the STM32L4R9I-EVAL board are MP34DT01TR MEMS digital
omnidirectional microphones providing PDM (pulse density modulation) outputs. To share
the same data line, their outputs are interlaced. The combined data output of the
microphones is directly routed to STM32L4R9AII6 terminals, thanks to the integrated input
digital filters. The microphones are supplied with a programmable clock generated directly
by STM32L4R9AII6.
As an option, the microphones are connected to U26 WM8994, the Wolfson audio codec
device. In that configuration, U26 also supplies the PDM clock to the microphones.
Regardless of where the microphones are routed to, STM32L4R9AII6 or WM8994, their
power supplier is either VDD or MICBIAS1 output of the WM8994 codec device.
Tabl e 8 shows the settings of all jumpers associated with the digital microphones on the
board.
JumperSettingConfiguration
JP16
JP15
Table 8. Digital microphone-related jumper settings
The PDM clock for digital microphones comes from the WM8994
codec.
Default setting.
The PDM clock for digital microphones comes from
STM32L4R9AII6.
The power supply of digital microphones is generated by
WM8994 codec.
Default setting.
The power supply of digital microphones is V
DD
.
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6.9.2 Headphones outputs
The STM32L4R9I-EVAL board potentially drives two sets of stereo headphones. Identical or
different stereo audio contents are played back in each set of headphones. STM32L4R9AII6
sends up to two independent stereo audio channels, via its SAI1 TDM port, to the WM8994
codec device. The codec device converts the digital audio stream to stereo analog signals. It
then boosts them for direct drive of headphones connecting to 3.5
on the board, CN24 for Audio-output1, and CN23 for Audio_output2.
The CN23 jack takes its signal from the output of the WM8994 codec device intended for
driving an amplifier for loudspeakers. A hardware adaptation is incorporated on the board to
make it compatible with a direct headphone drive. The adaptation consists of coupling
capacitors blocking the DC component of the signal, attenuator, and anti-pop resistors. The
loudspeaker output of the WM8994 codec device must be configured by software in a linear
mode called “class AB” and not in a switching mode called “class D”.
The I²C-bus address of WM8994 is 0b0011 010x.
mm stereo jack receptacles
6.9.3 Limitations in using audio features
Due to the share of some terminals of STM32L4R9AII6 by multiple peripherals, the following
limitations apply in using the audio features:
•If the SAI1_MCLKA and SAI1_FSA are used as part of SAI1 port, it cannot be used as
CAN peripheral.
•If the SAI1_SDB is used as part of the SAI1 port, it cannot be used as the Comp2_OUT
signal.
•If the SAI1 port of STM32L4R9AII6 is used for streaming audio to the WM8994 codec
IC, STM32L4R9AII6 cannot control the motor.
•If the digital microphones are attached to STM32L4R9AII6, control the motor cannot be
driven.
6.10 USB OTG FS port
The STM32L4R9I-EVAL board supports USB OTG full-speed (FS) communication. The
CN3 USB OTG connector is Micro-AB type.
6.10.1 STM32L4R9I-EVAL used as a USB device
When a “USB host” connection to the CN3 Micro-AB USB connector of STM32L4R9I-EVAL
is detected, the board starts behaving like a “USB device”. Depending on the powering
capability of the USB host, the board potentially takes power from the V
In the board schematic diagrams, the corresponding power voltage line is called U5V.
Section 6.5 provides information on how to set associated jumpers for this powering option.
The resistor R23 must be left open to prevent STM32L4R9I-EVAL from sourcing 5 V to the
V
terminal, which would cause conflict with the 5 V sourced by the USB host. This may
BUS
happen if the MFX_GPIO6 is controlled by the software of the MFX MCU such that, it enables
the output of the U2 power switch.
26/72UM2248 Rev 4
terminal of CN3.
BUS
UM2248Hardware layout and configuration
6.10.2 STM32L4R9I-EVAL used as a USB host
When a “USB device” connection to the CN3 Micro-AB USB connector is detected, the
STM32L4R9I-EVAL board starts behaving like a “USB host”. It sources 5
terminal of the CN3 Micro-AB USB connector to power the USB device. For this to happen,
the STM32L4R9AII6 sets the U2 power switch STMPS2151STR to ON state. The LD6
green LED marked OTG_FS indicates that the peripheral is supplied from the board. The
LD5 red LED marked FS_OC lights up if over-current is detected. The resistor R23 must be
closed to allow the MFX_GPIO6 from MFX MCU to control the U2 power switch.
In any other STM32L4R9I-EVALpowering option, the resistor R23 must be open, to avoid
accidental damage caused to an external USB host.
V on the V
BUS
6.10.3 Limitations in using USB OTG FS port
The USB OTG FS port operation is exclusive with motor control
6.10.4 Operating voltage
The USB-related operating supply voltage of STM32L4R9AII6 (VDD_USB line) must be within
the range from 3.0
V to 3.6 V.
6.11 RS232 port
The STM32L4R9I-EVAL board offers one RS-232 communication port. The RS-232
communication port uses the CN7 DB9 male connector. RX, TX, RTS, and CTS signals of
the STM32L4R9AII6 LPUSART1 interface are routed to CN7.
6.11.1 Operating voltage
The RS-232 operating supply voltage of STM32L4R9AII6 (VDD line) must be within the range
from 1.71
V to 3.6 V.
6.12 microSD™ card
The CN8 slot for microSD™ card is routed to STM32L4R9AII6 SDIO port, accepting SD (up to
2
Gbytes) and SDHC (up to 32 Gbytes) cards. One 8-Gbyte microSD™ card is delivered as
part of STM32L4R9I-EVAL. The card insertion switch is routed to the MFX_GPIO5 of MFX
MCU port.
6.12.1 Limitations
Due to the share of SDIO port, the following limitations apply:
•The microSD™ card cannot be operated simultaneously with motor control.
•The microSD™ card cannot be operated for 4 bits date when SDIO_D1 and SDIO_D2
used as Trace_D0 and Trace_D1 signals.
6.12.2 Operating voltage
The supply voltage for the STM32L4R9I-EVAL microSD™ card operation must be within the
range from 2.7
V to 3.6 V.
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6.13 Motor control
The CN1 connector is designed to receive a motor-control (MC) module. Table 9 shows the
assignment of CN1 and STM32L4R9AII6 terminals.
Table 9 also lists the modifications to be made on the board versus its by-default
configuration. Refer to Section 6.13.1 for further details.
Table 9. Motor-control terminal and function assignment
CN1 motor-control
connector
Ter min al
1
2GND- GND --
3PWM_1H PC6TIM8_CH1-
4GND- GND --
5PWM_1LPH13 TIM8_CH1N-
6GND- GND --
7PWM_2HPC7TIM8_CH2-
8GND- GND --
9PWM_2LPH14 TIM8_CH2N-
10GND-GND--
Terminal
name
Emergency
Stop
Port
name
PI4 TIM8_BKIN-
STM32L4R9AII6 microcontroller
Function
Alternate
function
Close SB3.
Remove R234.
Close SB21.
Remove R44 or no
daughterboard.
Close SB46.
Remove R186.
Close SB19.
Open SB20.
Remove R46 or no
daughterboard.
Close SB44.
Remove R185.
Board modifications for
enabling motor control
11PWM_3HPC8TIM8_CH3-
12GND-GND--
13PWM_3LPH15 TIM8_CH3N-
14Bus VoltagePC4ADC1_IN13-
15
16
28/72UM2248 Rev 4
PhaseA
current+
PhaseA
current-
PC0ADC1_IN1-
-GND --
Close SB2.
Remove R195.
Close SB45.
Remove R184.
Close SB55.
Remove R75.
Close SB36.
Remove R242.
UM2248Hardware layout and configuration
Table 9. Motor-control terminal and function assignment (continued)
CN1 motor-control
connector
Ter min al
17
18
19
20
Terminal
name
PhaseB
current+
PhaseB
current-
PhaseC
current+
PhaseC
current-
Port
name
PC1ADC1_IN2-
-GND --
PC2ADC1_IN3-
-GND --
STM32L4R9AII6 microcontroller
Function
Alternate
function
21ICL ShutoutPG9GPIO-
22GND-GND--
23
24
Dissipative
Brake
PFC indirect
current
PG13GPIO-
PA0ADC1_IN5-
25+5V-+5V--
Board modifications for
enabling motor control
Close SB37.
Remove R244.
Close SB43.
Remove R217.
Close SB34.
Remove R236.
Close SB47.
Remove SB29 and no board
on the PMOD connector.
Close SB38
Remove R214 and SB39
26
Heatsink
Te mp .
PA1ADC1_IN6-
27PFC SyncPB14TIM15_CH1-
28+3.3V-+3.3V--
29PFC PWMPB15TIM15_CH2-
30
PFC
Shutdown
PA9TIM15_BKIN-
31Encoder APB6TIM4_CH1ADC12_IN
32PFC VacPC3ADC1_IN4-
Close SB40.
Remove R216.
Close SB41.
Remove R207 and no board
on the PMOD connector.
Close SB51.
Remove R187.
Close SB35.
Remove R203.
Close SB14.
Remove SB15 and SB16.
Remove R26 or no
daughterboard.
Close SB54.
Remove R67.
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Hardware layout and configurationUM2248
Table 9. Motor-control terminal and function assignment (continued)
CN1 motor-control
connector
Ter min al
33Encoder BPB7TIM4_CH2ADC12_IN
34
Terminal
name
Encoder
Index
Port
name
PB8TIM4_CH3ADC12_IN
STM32L4R9AII6 microcontroller
Function
Alternate
function
6.13.1 Board modifications to enable motor control
Figure 9 (top side) and Figure 10 (bottom side) illustrate the board modifications listed in
Table 9, required for the operation of motor control. The red color denotes a component to be
removed. The green color denotes a component to be fitted.
6.13.2 Limitations
Motor-control operation is exclusive with Octo-SPIP1 Flash memory device, audio codec,
potentiometer, LDR, microSD™ card, LED1 to LED4 drive, MEMS, MFX, PMOD, USB
OTG_FS, TFT LCD connector, DSI display connector, and touch sensing.
Board modifications for
enabling motor control
Close SB17.
Remove SB18.
Remove R30 or no
daughterboard.
Close SB42.
Remove R235 and open JP12.
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UM2248Hardware layout and configuration
Figure 9. PCB top-side rework for motor control
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Figure 10. PCB bottom-side rework for motor control
32/72UM2248 Rev 4
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1
3
2
1
3
2
1
2
1
2
1
2
1
2
6.14 CAN
The STM32L4R9I-EVAL board supports one CAN2.0A/B channel compliant with CAN
specification. The CN22 DB9 male connector is available as the CAN interface.
A 3.3 V CAN transceiver is fitted between the CN22 connector and the CAN controller port
of STM32L4R9AII6.
The JP14 jumper selects one of the high-speed, standby, and slope control modes of the CAN
transceiver. The JP13 jumper allows integrating a CAN termination resistor. The JP12 is used
to connected the CAN transceiver avoiding unknown signals from the CAN transceiver.
JumperSettingConfiguration
JP14
Table 10. CAN related jumpers
Default setting.
CAN transceiver operates in high-speed mode.
CAN transceiver is in standby mode.
JP13
JP12
6.14.1 Limitations
CAN operation is exclusive with the audio codec and MC operation.
6.14.2 Operating voltage
The supply voltage for STM32L4R9I-EVAL CAN operation must be within the range from
3.0
V to 3.6 V.
Default setting.
Termination resistor fitted on CAN physical link.
No termination resistor on CAN physical link.
Default setting.
CAN_TX is not used for CAN transceiver.
CAN_TX is used from the STM32L4R9AII6 terminal.
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6.15 Extension connectors CN5, CN6, CN13, and CN14
The CN5, CN6, CN13, and CN14 headers complement to give access to all GPIOs of the
STM32L4R9AII6 microcontroller. In addition to GPIOs, the following signals and power
supply lines are also routed on CN5 or CN6 or CN13 or CN14:
Each header has two rows of 20 pins, with 1.27 mm pitch and 2.54 mm row spacing. For
extension modules, SAMTEC RSM-120-02-L-D-xxx and SMS-120-x-x-D are recommendable
as SMD and through-hole receptacles, respectively (x is a wild card).
6.16 User LEDs
Four general-purpose color LEDs (LD1, LD2, LD3, LD4) are available as light indicators.
Each LED is ON with a low level of the corresponding ports of STM32L4R9AII6.
And the four LEDs are exclusive with MC operation.
6.17 Physical input devices
The STM32L4R9I-EVAL board provides several input devices for physical human control,
listed below:
•four-way joystick controller with select key (B1)
•wake-up/ tamper button (B3)
•reset button (B2)
•10 kΩ potentiometer (RV2)
•light-dependent resistor, LDR (R121)
The potentiometer and the light-dependent resistor are mutually exclusively rout-able to either
PB4 or PA0 port of STM32L4R9AII6.
jumpers.
As illustrated in the schematic diagram, the PB4 port is routed, in the STM32L4R9AII6, to the
non-inverting input of comparator Comp2. The PA0 is routed to the non-inverting input of the
operational amplifier OpAmp1.
Tabl e 11 depicts the setting of associated configuration
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UM2248Hardware layout and configuration
1
3
2
1
3
2
1
3
2
1
3
2
1
3
2
1
3
2
1
3
2
1
3
2
Table 11. Port assignment for control of physical input devices
JumperSettingRouting
JP9
A potentiometer is routed to pin PB4 o fSTM32L4R9AII6.
JP5
JP9
Default setting.
A potentiometer is routed to pin PA0 of STM32L4R9AII6.
JP5
JP9
LDR is routed to pin PB4 of STM32L4R9AII6.
JP5
JP9
LDR is routed to pin PA0 of STM32L4R9AII6.
JP5
6.17.1 Limitations
The potentiometer and the light-dependent resistor are exclusive with MFX, audio codec,
OctoSPIP1, the debugging connector, and MC operation. They are mutually exclusive.
6.18 Operational amplifier and comparator
6.18.1 Operational amplifier
STM32L4R9AII6 provides two onboard operational amplifiers, one of which, OpAmp1, is
made accessible on STM32L4R9I-EVAL. OpAmp1 has its inputs and its output routed to I/O
ports PA0, PA1, and PA3, respectively. The non-inverting input PA0 is accessible on the
terminal 1 of the JP5 jumper header. On top of the possibility of routing either of the
potentiometer or LDR to PA0, an external source is also connectible to it, using the terminal
1 of JP5.
The PA3 output of the operational amplifier is accessible on test point TP9. Refer to the
schematic diagram.
The gain of OpAmp1 is determined by the ratio of the variable resistor RV1 and the resistor
R246, as shown in the following equation:
Gain = 1 + RV1 / R246
With the RV1 ranging from 0 to 10 kΩ and R246 being 1 kΩ, the gain varies from 1 to 11.
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The R108 resistor in series with PA0 is beneficial for reducing the output offset.
Table 12 shows the configuration elements and their settings allowing them to access the
OpAmp1 function.
ElementSettingConfiguration
SB39
SB38
R214
Table 12. Configuration elements related to OpAmp1
SB38 open
SB39 closed
R214 out
SB38 open
SB39 closed
R214 in
SB38 closed
SB39 open
R214 out
OpAmp1_INP is routed to pin PA0 of STM32L4R9AII6.
Default setting.
PA0 port of STM32L4R9AII6 is routed to MFX_IRQ_OUT or
motor control signal.
PA0 port of STM32L4R9AII6 is routed to the motor-control signal.
R216
SB40
R215
R221
6.18.2 Comparator
STM32L4R9AII6 provides two onboard comparators, one of which, Comp2, is made
accessible on STM32L4R9I-EVAL. Comp2 has its non-inverting input and its output routed
to I/O ports PB4 and PB5, respectively. The input is accessible on the terminal 3 of the JP5
jumper header. On top of the possibility of routing either the potentiometer or LDR to PB4,
an external source is connectible to it, using the terminal 3 of JP5.
The PB5 output of the comparator is accessible on test point TP6. Refer to the schematic
diagram.
Table 13 shows the configuration elements and their settings allowing them to access the
Comp2 function.
R216 in
SB40 open
R216 out
SB40 closed
R215 in
R221 out
R215 out
R221 in
Default setting.
OpAmp1_INM is routed to pin PA1 of STM32L4R9AII6.
PA1 port of STM32L4R9AII6 is routed to the motor-control signal.
OpAmp1_VOUT is routed to pin PA3 of STM32L4R9AII6.
Default setting.
OpAmp1_VOUT is not routed to pin PA3 of STM32L4R9AII6. PA3
port of STM32L4R9AII6 is routed to OctoSPI1_CLK.
Table 13. Configuration elements related to Comp2
ElementSettingConfiguration
R200 out
R200
SB22
36/72UM2248 Rev 4
SB22 closed
R200 in
SB22 open
Default setting.
Comp2_INP is routed to pin PB4 of STM32L4R9AII6.
PB4 port of STM32L4R9AII6 is routed to the TRST signal.
UM2248Hardware layout and configuration
Table 13. Configuration elements related to Comp2 (continued)
ElementSettingConfiguration
R204
SB48
R204 out
SB48 open
R204 in
SB48 closed
Comp2_OUT is routed to pin PB5 of STM32L4R9AII6.
Default setting.
Comp2_OUT is not routed to pin PB4 of STM32L4R9AII6. PB4
port of STM32L4R9AII6 is routed to SAI1_SDB.
6.18.3 Limitations
The OpAmp1 is exclusive with MFX, OctoSPIP1, and MC operation.
The Comp2 is exclusive with the debugging connector and SAI1.
6.19 Analog input, output, VREF
STM32L4R9AII6 provides onboard analog-to-digital converter ADC, and digital-to-analog
converter DAC. The port PA4 is configurable to operate either as ADC input or as DAC
output. PA4 is routed to the two-way header CN4 allowing to fetch signals to or from PA4 or
to ground it by fitting a jumper into CN4.
Parameters of the ADC input low-pass filter formed with R31 and C21 are adjustable by
replacing these components according to application requirements. Similarly, parameters of
the DAC output low-pass filter formed with R32 and C21 are modifiable by replacing these
components according to application requirements.
The VREF+ terminal of STM32L4R9AII6 is used as the reference voltage for both ADC and
DAC. By default, it is routed to VDDA through a jumper fitted into the two-way header CN10.
The jumper is removable and an external voltage applied to the terminal 1 of CN10, for
specific purposes.
6.20 SRAM device
IS61WV102416BLL, a 16-Mbit static RAM (SRAM), 1 M x 16 bit, is fitted on the
STM32L4R9I-EVAL main board, in U17 position. The STM32L4R9I-EVAL main board, as well
as the addressing capabilities of FMC, allow hosting SRAM devices up to 64
the reason why the schematic diagram mentions several SRAM devices.
The SRAM device is attached to the 16-bit data bus and accessed with FMC. The base
address is 0x6000
selected with the FMC_NE1 chip select. FMC_NBL0 and FMC_NBL1 signals allow
selecting
8-bit and 16-bit data word operating modes.
By removal of R134, a zero-ohm resistor, the SRAM is deselected and the STM32L4R9AII6
ports PD7, PE0, and PE1 corresponding to FMC_NE1, FMC_NBL0, and FMC_NBL1
signals, respectively, are usable for other application purposes.
Mbytes. This is
0000, corresponding to NOR/SRAM1 bank1. The SRAM device is
UM2248 Rev 437/72
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Hardware layout and configurationUM2248
1
2
1
2
.
Table 14. SRAM chip select configuration
ResistorFittingConfiguration
In
R134
Out
Default setting.
SRAM chip select is controlled with FMC_NE1
SRAM is deselected. FMC_NE1 is freed for other application
purposes.
6.20.1 Limitations
The SRAM addressable space is limited if some or all of A21 FMC address lines are shunted
to the CN12 connector for debug trace purposes. In such a case, the disconnected addressing
inputs of the SRAM device are pulled down by resistors.
the associated configuration elements.
6.20.2 Operating voltage
The SRAM device operating voltage is in the range from 2.4 V to 3.6 V.
6.21 NOR Flash memory device
M29W128GL70ZA6E, a 128-Mbit NOR Flash memory, 8 M x16 bit, is fitted on the
STM32L4R9I-EVAL main board, in U11 position. The STM32L4R9I-EVAL main board, as well
as the addressing capabilities of FMC, allow hosting M29W256GL70ZA6E, a 256-Mbit NOR
Flash memory device. This is the reason why the schematic diagram mentions both devices.
Section 6.4 provides information on
The NOR Flash memory device is attached to the 16-bit data bus and accessed with FMC.
The base address is 0x6800
memory device is selected with the FMC_NE3 chip select signal. 16-bit data word operation
mode is selected by a pull-up resistor connected to the BYTE terminal of NOR Flash
memory. The jumper JP6 is dedicated to writing protect configuration.
By default, the FMC_NWAIT signal is not routed to the RB port of the NOR Flash memory
device, and, to know its ready status, its status register is polled by the demo software fitted in
STM32L4R9I-EVAL. This is modifiable with configuration elements, as shown in
JumperSettingConfiguration
JP6
6.21.1 Limitations
The NOR Flash memory device’s addressable space is limited if some or all of A21, A22, and
A23 FMC address lines are shunted to the CN12 connector for debug trace purposes. In such
0000, corresponding to NOR/SRAM2 bank1. The NOR Flash
Table 15. NOR Flash memory-related jumper
Default setting.
NOR Flash memory write is enabled.
NOR Flash memory write is inhibited. Write protect is
activated.
Tab le 15.
38/72UM2248 Rev 4
UM2248Hardware layout and configuration
a case, the disconnected addressing inputs of the NOR Flash memory device are pulled down
by resistors.
Section 6.4 provides information on the associated configuration elements.
6.21.2 Operating voltage
NOR Flash memory operating voltage must be in the range from 1.65 V to 3.6 V.
6.22 EEPROM
M24128-DFDW6TP, a 128-Kbit I²C-bus EEPROM device, is fitted on the main board of
STM32L4R9I-EVAL, in U3 position. It is accessed with I²C-bus lines I2C2_SCL and
I2C2_SDA of STM32L4R9AII6. It supports all I²C-bus modes with speeds up to 1
base I²C-bus address is 0xA0. Write-protecting the EEPROM is possible through opening
the SB13 solder bridge. By default, SB13 is closed and writing into the EEPROM enabled.
6.22.1 Operating voltage
The M24128-DFDW6TP EEPROM device’s operating voltage must be in the range from
1.7
V to 3.6 V.
MHz. The
6.23 EXT_I2C connector
The connection of CN2 EXT_I2C to the I²C bus daughterboard is possible. MFX_GPIO8 of
MFX MCU provides the EXT_RSET signal, and the SB12 solder bridge is used to connect
the +5
V power supply of the daughterboard.
6.24 Octo-SPI Flash memory device
MX25LM51245GXDI00, a 512-Mbit Octo-SPI Flash memory device, is fitted on the
STM32L4R9I-EVAL main board, in U6 position. It allows evaluating STM32L4R9AII6
Octo-SPI interface.
MX25LM51245GXDI00 operates in a single transfer rate (STR) mode or a double transfer
rate (DTR) mode.
Ta bl e 16 shows the configuration elements and their settings allowing them to access the
Octo-SPI Flash memory device.
.
ElementSettingConfiguration
Table 16. Configuration elements related to Octo-SPI Flash device
R221
R215
R221 in
R215 out
R221 out
R215 in
Default setting.
OctoSPI1_CLK is available to the Octo-SPI Flash memory device.
OctoSPI1_CLK is not available to the Octo-SPI Flash memory
device. PA3 port of STM32L4R9AII6 is routed to the OpAmp1_Vout
signal.
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Table 16. Configuration elements related to Octo-SPI Flash device (continued)
ElementSettingConfiguration
R67 in
R67
SB54
R75
SB55
SB54 open
R67 out
SB54 closed
R75 in
SB55 open
R75 out
SB55 closed
6.24.1 Limitations
Octo-SPI Flash memory device operation is exclusive with OpAmp1 and with motor control.
6.24.2 Operating voltage
The voltage of Octo-SPI Flash memory device MX25LM51245GXDI00 is in the range of
2.7 V to 3.6 V.
Default setting.
OctoSPI1_IO6 data line is available to the Octo-SPI Flash memory
device.
OctoSPI1_IO6 is not available to the Octo-SPI Flash memory
device. PC3 port of SSTM32L4R9AII6 is routed to the motor-control
signal.
Default setting.
OctoSPI1_IO7 data line is available to the Octo-SPI Flash memory
device.
OctoSPI1_IO7 is not available to the Octo-SPI Flash memory
device. PC4 port of STM32L4R9AII6 is routed to the motor-control
signal.
6.25 Octo-SPI DRAM device
IS66WVH8M8BLL-100BLI, a 64-Mbit self-refresh dynamic RAM (DRAM) device with a
HyperBus interface, is fitted on the STM32L4R9I-EVAL main board, in U5 position. It allows
the evaluation of the STM32L4R9AII6 Octo-SPI interface.
6.25.1 Operating voltage
The voltage of the Octo-SPI DRAM device IS66WVH8M8BLL-100BLI is in the range of
2.7
V to 3.6 V.
6.25.2 Limitations
Board does not support Octo-SPI operation with IS66WVH8M8BLL-100BLI. No workaround
is available. Please refer to STM32L4Rxxx and STM32L4Sxxx device errata (ES0393).
6.26 Touch-sensing button
The STM32L4R9I-EVAL board supports a touch sensing button based on either RC
charging or charge-transfer technique. The latter is enabled, by default.
The touch sensing button is connected to the PC6 port of STM32L4R9AII6 and the related
charge capacitor is connected to PC7.
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An active shield is designed in layer 2 of the main PCB, under the button footprint. It allows
reducing disturbances from other circuits to prevent false touch detections.
The active shield is connected to the PB6 port of STM32L4R9AII6 through the resistor R22.
The related charge capacitor is connected to PB7.
Ta bl e 17 shows the configuration elements related to the touch sensing function. Some of
them serve to enable or disable its operation. However, most of them serve to optimize the
touch sensing performance, by isolating copper tracks to avoid disturbances due to their
antenna effect.
.
ElementSettingConfiguration
Table 17. Touch-sensing-related configuration elements
In
R44
Out
Open
SB21
Closed
In
R46
Out
Open
SB19
Closed
Open
SB20
Closed
In
R26
Out
Open
SB14
Closed
SB15Open
PC6 port is routed to the CN6 connector of the daughterboard.
This setting is not good for the robustness of touch sensing.
Default setting.
PC6 port is cut from CN6.
Default setting.
PC6 is not routed to motor control.
PC6 is routed to motor control.
This setting is not good for the robustness of touch sensing.
PC7 port is routed to the CN6 connector of the daughterboard.
This setting is not good for the robustness of touch sensing.
Default setting.
PC7 port is cut from CN6.
Default setting.
PC7 is not routed to motor control.
PC7 is routed to motor control.
This setting is not good for the robustness of touch sensing.
PC7 is not routed to the sampling capacitor. Touch sensing cannot
operate.
Default setting.
PC7 is routed to the sampling capacitor. Touch sensing available.
PB6 port is routed to the CN5 connector of the daughterboard.
This setting is not good for the robustness of touch sensing.
Default setting.
PB6 port is cut from CN5.
Default setting.
PB6 is not routed to motor control.
PB6 is routed to motor control.
This setting is not good for the robustness of touch sensing.
PB6 is not routed to the active shield under the touch sensing button.
This setting is not good for the robustness of touch sensing.
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Table 17. Touch-sensing-related configuration elements (continued)
ElementSettingConfiguration
Default setting.
Closed
PB6 is routed to the active shield under the touch sensing button. This
setting is not good for the robustness of touch sensing.
SB16
R30
SB17
SB18
Open
Closed
In
Out
Open
Closed
Open
Closed
Default setting.
PB6 is not routed to the CN16 DSI display connector.
PB6 is routed to the CN16 DSI display connector.
This setting is not good for the robustness of touch sensing.
PB7 port is routed to the CN5 connector of the daughterboard.
This setting is not good for the robustness of touch sensing.
Default setting.
PB7 port is cut from CN5.
Default setting.
PB7 is not routed to motor control.
PB7 is routed to motor control.
This setting is not good for the robustness of touch sensing.
PB7 is not routed to the sampling capacitor of the active shield under
the touch sensing button.
This setting is not good for the robustness of touch sensing.
Default setting.
PB6 is routed to the sampling capacitor of the active shield under the
touch sensing button.
This setting is not good for the robustness of touch sensing.
6.26.1 Limitations
The touch-sensing button is exclusive with the DSI display connector, motor control, and
daughterboard connector.
6.27 MFX MCU
The MFX MCU is used as MFX (multi-function expander) and IDD measurement.
The MFX circuit on the STM32L4R9I-EVAL board acts as IO-expander. The communication
interface between MFX and STM32L4R9AII6 is the I2C2 bus. The signals connected to MFX
are listed in
Pin number
of MFX
42/72UM2248 Rev 4
Tab le 18.
Table 18. MFX signals
Pin name
of MFX
15PA5MFX_GPIO5uS_DetectInputmicroSD™
16PA6MFX_GPIO6USB _PSONOutputUSB_FS
17PA7MFX_GPIO7USB_OVRCRInputUSB_FS
MFX functions
STM32L4R9AII6
Function of
Direction
(for MFX)
Termi nal
device
UM2248Hardware layout and configuration
1
3
2
1
3
2
Table 18. MFX signals (continued)
Pin number
of MFX
Pin name
of MFX
MFX functions
18PB0MFX_GPIO0JOY_SELInputJoystick
19PB1MFX_GPIO1JOY_DOWNInputJoystick
20PB2MFX_GPIO2JOY_LEFTInputJoystick
26PB13MFX_GPIO13---
27PB14MFX_GPIO14---
28PB15MFX_GPIO15---
29PA8MFX_GPIO8 EXT_RESETOutputEXT_I2C
30PA9MFX_GPIO9DSI_RSTOutputDSI LCD
31PA10MFX_GPIO10---
32PA11MFX_GPIO11LCD_DISPOutputTFT LCD
33PA12MFX_GPIO12LCD_RSTOutputTFT LCD
39PB3MFX_GPIO3JOY_RIGHTInputJoystick
40PB4MFX_GPIO4JOY_UPInputJoystick
6.28 IDD measurement
Function of
STM32L4R9AII6
Direction
(for MFX)
Termi nal
device
STM32L4R9AII6 has a built-in circuit allowing to measure its current consumption (IDD) in
Run and Low-power modes, except for Shutdown mode. It is strongly recommended that
the MCU supply voltage (VDD_MCU line) does not exceed 3.3
components on STM32L4R9I-EVAL supplied from 3.3
through I/O ports. Voltage exceeding 3.3
3.3
V-supplied peripheric I/Os and false the MCU current consumption measurement.
V on the MCU output port may inject current into
Ta bl e 19 shows the setting of jumpers associated with the IDD measurement on the board.
s
JumperSettingConfiguration
JP4
Table 19. IDD measurement related jumper setting
Default setting.
STM32L4R9AII6 has a built-in circuit allowing to measure its
current consumption.
IDD measurement is not available, bypass mode only for
STM32L4R9AII6 VDD_MCU power supply.
6.29 DSI display (MIPI) connector
The CN16 connector is designed to connect a DSI display daughterboard. MB1314
daughterboard is available to mount on the STM32L4R9I-EVAL board.
assignment of CN16 and STM32L4R9AII6 terminals.
The DSI display module connector signal INT is used both for TFT LCD and DSI display
connector.
44/72UM2248 Rev 4
UM2248Hardware layout and configuration
6.30 TFT LCD (RGB and FMC mode) connector
The CN20 50-pin 1.27 mm-pitch female connector is designed to connect TFT LCD
daughterboard, supporting RGB and FMC modes. MB1315 daughterboard is available to
mount on the STM32L4R9I-EVAL board with RGB mode.
CN20 and STM32L4R9AII6 terminals.
.
Table 21. CN20 TFT LCD module connector
Ta bl e 21 shows the assignment of
Pin
No.
RGB mode
description
1GNDGND-2GNDGND-
3R0-PE24G0-PF14
5R1RS(A19)PE36G1-PF15
7R2D12PE158G2D6PE9
9R3D13PD810G3D7PE10
11R4D14PD912G4D8PE11
13R5D15PD1014G5D9PE12
15R6-PD1116G6D10PE13
17R7-PD1218G7D11PE14
19GNDGND-20GNDGND-
21B0-PE422DETEPF11
23B1-PF1324LCD_DSIP-
25B2D0PD1426HSYNC-PE0
27B3D1PD1528VSYNC-PE1
29B4D2PD030GNDGND-
FMC mode
description
Pin
connection
Pin
No.
RGB mode
description
FMC mode
description
Pin
connection
MFX_
GPIO11
31B5D3PD132PCLK-PD3
33B6D4PE734GNDGND-
35B7D5PE836RST#RST#
37GNDGND-38SDASDAPH5
39INTINTPC240SCLSCLPH4
41-RSPE242-NOEPD4
43BL_CTRLBL_CTRLPA544-NWEPD5
45BL+5 VBL+5 V-46-CSPG12
47BLGNDBLGND-48VDDVDD-
49BLGNDBLGND-50+3.3 V+3.3 V-
UM2248 Rev 445/72
MFX_
GPIO12
71
Hardware layout and configurationUM2248
6.30.1 Limitations
The TFT LCD module connector supports RGB mode or FMC mode only at the same time.
The signal INT is used both for TFT LCD and DSI display connectors. When RGB mode
TFT LCD is used, STM32L4R9AII6 cannot access onboard SRAM and NOR Flash memory.
6.31 PMOD connector
The P1 PMOD-standard connector is available on the STM32L4R9I-EVAL board to support
flexibility in small form factor applications. The PMOD connector implements the PMOD
type 2A and 4A on the STM32L4R9I-EVAL board.
Pin numberDescriptionPin numberDescription
1SS/CTS (PI0/PB13)7INT (PG13)
2MOSI/TXD (PI3/PG7)8RESET (PB14)
3MISO/RXD (PI2/PG8)9-
4SCK/RTS (PI1/PB12)10-
5GND11GND
Table 22. P1 PMOD connector
63.3 V123.3 V
6.32 MB1314 DSI display board
MB1314 is the DSI display daughterboard that is available to mount on the STM32L4R9IEVAL board via CN1 connector. GVO IEG1120TB103GF-001 is selected for round LCD with
one data lane, 390x390 resolution, 24 bpp with capacitive touch panel (FocalTech FT3x67
driver).
Tab le 23 shows the pin function description of the CN1 MB1314 board connector.
Table 23. Pin function description of the CN1 MB1314 board connector
Pin numberDescriptionPin numberDescription
1GND2 -
3DSI_CK_P4DSI_INT
5DSI_CK_N6GND
7GND8RFU
9DSI_D0_P10RFU
11DSI_D0_N12GND
13GND14RFU
15RFU16RFU
17RFU18GND
19GND20-
21BLVDD (5 V)22RFU
46/72UM2248 Rev 4
UM2248Hardware layout and configuration
Table 23. Pin function description of the CN1 MB1314 board connector (continued)
Pin numberDescriptionPin numberDescription
23BLVDD (5 V)24RFU
25-26RFU
27BLGND28RFU
29BLGND30-
31-32-
33-34-
35RFU363.3 V
37RFU38VDD
39RFU40I2C_SDA
41-42-
43SWIRE44I2C_SCL
45RFU46-
47RFU48-
49DSI_TE50-
51-52-
53DSI_BL_CTRL54-
55-56-
57DSI_RST58-
59-60RFU
Warning:Permanent Image sticking may occur if AMOLED displays the
same image for an extended time.
6.33 MB1315 TFT LCD board
MB1315 is the TFT LCD daughterboard supporting RGB mode, available to mount on the
STM32L4R9I-EVAL board via CN1 connector.
The 4.3” TFT LCD uses LCD RK043FN48H-CT672B with a capacitive touch panel which only
supports 3.3
TFT RGB LCD daughterboard to support a wide power supply range.
function description of the CN1 MB1315 board connector.
V power and interface. So a level shifter SN74LVC16T245DGGR is requested on
Tab le 24 shows the pin
UM2248 Rev 447/72
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Hardware layout and configurationUM2248
Table 24. Pin function description of the CN1 MB1315 board connector
Pin numberDescriptionPin numberDescription
1GND2GND
3R04G0
5R16G1
7R28G2
9R310G3
11R412G4
13R514G5
15R616G6
17R718G7
19GND20GND
21B022DE
23B124LCD_DSIP
25B226HSYNC
27B328VSYNC
29B430GND
31B532PCLK
33B634GND
35B736RST#
37GND38SDA
39INT40SCL
41-42-
43BL_CTRL44-
45BL+5 V46-
47BLGND48VDD
49BLGND50+3.3 V
48/72UM2248 Rev 4
UM2248Connectors
MSv46051V1
31292725232119171513119753133
323028262422201816141210864234
7 Connectors
7.1 CN1 motor-control connector
Figure 11. CN1 motor-control connector (top view)
Description
Emergency STOP PI412-GND
PWM_1HPC634-GND
PWM_1LPH1356-GND
PWM_2HPC778-GND
PWM_2LPH14910-GND
PWM_3HPC81112-GND
PWM_3LPH151314PC4BUS VOLTAGE
CURRENT APC01516-GND
CURRENT BPC11718-GND
CURRENT CPC21920-GND
ICL ShutoutPG92122-GND
DISSIPATIVE
BRAKE
+5 V power-2526PA1
PFC SYNCPB142728-3.3 V power
Table 25. CN1 motor-control connector
Pin of
STM32L4R9AII6
PG132324PA0PCD Ind. Current
Pin
number
of CN1
Pin
number
of CN1
Pin of
STM32L4R9AII6
Description
Heatsink
temperature
PFC PWMPB152930PA9PFC Shut Down
Encoder APB63132PC3PFC Vac
Encoder BPB73334PB8Encoder Index
UM2248 Rev 449/72
71
ConnectorsUM2248
MS30715V2
17
28
7.2 CN2 external I2C connector
Figure 12. CN2 EXT_I2C connector (front view)
Pin numberDescriptionPin numberDescription
1I2C1_SDA (PH5)5VDD
2NC6NC
3I2C_SCL (PH4)7GND
4EXT_RESET (MFX_GPIO8)8NC
Table 26. CN2 EXT_I2C connector
7.3 CN3 USB OTG FS Micro-AB connector
Figure 13. CN3 USB OTG FS Micro-AB connector (front view)
Pin numberDescriptionPin numberDescription
1V
2DM (PA11)5GND
3DP (PA12)--
Table 27. CN3 USB OTG FS Micro-AB connector
BUS
50/72UM2248 Rev 4
(PA9)4ID (PA10)
UM2248Connectors
MSv46052V1
21
7.4 CN4 analog input-output connector
Figure 14. CN4 analog input-output connector (top view)
Table 28. CN4 analog input-output connector
Pin numberDescriptionPin numberDescription
1GND2Analog input-output PA4
7.5 CN5, CN6, CN13, and CN14 extension connectors
All GPIO signals from STM32L4R9AII6 are connected to CN5, CN6, CN13, and CN14
extension connectors. CN13 and CN14 extension connectors are also used for the FMC
device.
Do not use CN11, CN12, CN15, and CN17 for
debug connector.
Do not use CN11, CN12, CN15, and CN17 for
debug connector.
24PB11UART3_RX
26PD9FMC_D14-
28PD12FMC_A17-
30GND--
32PE13FMC_D10-
34PE8FMC_D5-
36PE11FMC_D8-
38PE9FMC_D6-
40+3V3--
Remove R171.
No connection for CN11
56/72UM2248 Rev 4
UM2248Connectors
MS30720V1
7.6 CN7 RS232 connector
Figure 15. RS232 D-sub male connector (front view)
Pin numberDescription
1NC6NC
2RS232_RX (PG8)7RS232_RTS (PB12)
3RS232_TX (PG7)8RS232_CTS (PB13)
4NC9NC
5GND--
Table 33. RS232 D-sub male connector
7.7 CN8 microSD™ connector
Figure 16. CN8 microSD™ connector (top view)
Pin
number
Description
UM2248 Rev 457/72
71
ConnectorsUM2248
Pin
number
Table 34. CN8 microSD™ connector
Description
number
1SDIO_D2 (PC10)6Vss/GND
2SDIO_D3 (PC11)7SDIO_D0 (PC8)
3SDIO_CMD (PD2)8SDIO_D1 (PC9)
4VDD9GND
5SDIO_CLK (PC12)10MicroSDcard_detect (MFX GPIO15)
7.8 CN9 MFX programming connector
The CN9 connector is used only for embedded MFX (multi-function expander) programming
during board manufacture. It is not populated by default and not for the end-user.
The CN19 connector is used only for embedded ST-LINK/V2-1 programming during board
manufacturing. It is not populated by default and not for end-users.
7.16 CN20 TFT LCD connector (RGB)
A TFT-color LCD board is mounted on CN20. Refer to Section 6.30 for details.
7.17 CN21 ST-LINK/V2-1 USB Micro-B connector
The CN21 USB connector is used to connect on-board ST-LINK/V2-1 facility to a PC for
programming and debugging purposes.
Figure 21. CN21 USB Micro-B connector (front view)
Pin numberDescriptionPin numberDescription
Table 39. CN21 USB Micro-B connector (front view)
1V
(power)4GND
BUS
UM2248 Rev 461/72
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ConnectorsUM2248
MS30720V1
Table 39. CN21 USB Micro-B connector (front view) (continued)
Pin numberDescriptionPin numberDescription
2DM5Shield
3DP--
7.18 CN22 CAN D-type male connector
Figure 22. CN22 CAN D-type 9-pin male connector (front view)
Table 40. CN22 CAN D-type 9-pin male connector
Pin numberDescriptionPin numberDescription
1,4,8,9NC7CANH
2CANL3,5,6GND
62/72UM2248 Rev 4
UM2248I/O assignment
Appendix A I/O assignment
Primary
key
UFBGA
169 DSI
Table 41. STM32L4R9I-EVAL I/O assignment
Pin namePinout assignment
RGB LCD with
FMC mode
Motor-control
connector
1K12DSI_CKN---
2K11DSI_CKP---
3L12DSI_D0N---
4L11DSI_D0P---
5J12DSI_D1N---
6J11DSI_D1P---
7L13VCAPDSI---
8[L13]VDD12DSI---
9[L13]VDD12DSI---
10J13VSSDSI---
11K13VSSDSI---
12H3NRSTNRST--
13K3PA0OPAMP1_VINP || MFX_IRQ_OUT-PFC indirect current
The sticker located on the top or bottom side of the PCB board shows the information about
product identification such as board reference, revision, and serial number.
The first identification line has the following format: ‘MBxxxx-Variant-yzz’, where ‘MBxxxx’ is
the board reference, ‘Variant’ (optional) identifies the mounting variant when several exist,
‘y’ is the PCB revision and ‘zz’ is the assembly revision: for example B01.
The second identification line is the board serial number used for traceability.
Evaluation tools marked as “ES” or “E” are not yet qualified and therefore not ready to be
used as reference design or in production. Any consequences deriving from such usage will
not be at ST charge. In no event, ST will be liable for any customer usage of these
engineering sample tools as reference design or in production.
‘E’ or ‘ES’ marking examples of location:
•On the target STM32 that is soldered on the board (for illustration of STM32 marking,
refer to the STM32 datasheet “Package information” paragraph at the www.st.com
website).
•Next to the evaluation tool ordering part number that is stuck or silk-screen printed on
the board.
Some boards feature a specific STM32 device version that allows the operation of any stack
or library. This STM32 device shows a ‘U’ marking option at the end of the standard part
number and is not available for sales.
In order to use the same commercial stack in his application, a developer may need to
purchase a part number specific to this stack/library. The price of those part numbers
includes the stack/library royalties.
The board reference for the STM32L4R9I-EVAL Evaluation board is MB1313, MB1314 for
the DSI display daughterboard, and MB1315 for the TFT LCD daughterboard.
UM2248 Rev 469/72
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STM32L4R9I-EVAL board informationUM2248
8.2 Board revision history
MB1313
Revision B01
The revision B-01 is the initial release.
MB1314
Revision B01
The revision B-01 is the initial release.
Revision C01
CN2 changed to BM20B(0.8)-24DS-0.4V(51)
MB1315
Revision A01
The revision A-01 is the initial release.
8.3 Board known limitations
MB1313
Revision B01
None
MB1314
Revision C01
ZZ1 update to IEG1120TB105GG-001 with a different connector
MB1315
Revision A01
None
70/72UM2248 Rev 4
UM2248Revision history
Revision history
Table 42. Document revision history
DateRevisionChanges
18-Aug-20171Initial version
Added:
STM32L4R9I-EVAL board bottom view in Figure 5
Bootloader limitation in Chapter 9.8.1
25-Oct-20172
Warning on AMOLED display in Chapter 9.32
Updated:
Cover views Figure 3 and Figure 4 moved to Section 9.1
Table 27 and Tab l e 3 9 alternative function removed
Figure 23, Figure 24, and Figure 37 in Electrical schematics
Updated:
9-Jan-20183
Section 9.8.1: WA3 simplified
Table 34: PE3 replaced by PC9, PE4 replaced by PC10
Reorganized the entire document:
– Updated Features, Ordering information, Development
environment, Development toolchains, and Demonstration
9-Sep-20204
software
– Added Codification, Section 6.25.2: Limitations, and
Section 8: STM32L4R9I-EVAL board information
– Removed Electrical schematics
UM2248 Rev 471/72
71
UM2248
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