STMicroelectronics STM32 Application note

AN5224

Application note

STM32 DMAMUX: the DMA request router

Introduction

In order to offload certain data transfer duties from the CPU, STM32 microcontrollers (MCUs) and microprocessors (MPUs) embed direct memory access (DMA) controllers. The DMA can perform block-oriented data transfer upon a peripheral request or a software trigger.

Each DMA channel has a software-configurable selection of the peripheral requesting its services. On legacy STM32 products, the channel request selection is implemented within the DMA controller with a restricted list of peripheral requests for a given channel. The software application cannot freely map any peripheral request to any channel.

STM32 DMA request routing capabilities are enhanced by a DMA request multiplexer (DMAMUX peripheral). The DMAMUX adds more flexibility to give full dynamic DMA peripheral request mapping instead of pseudo-dynamic mapping. It offers fully configurable routing of any DMA request from a given peripheral to any DMA controller and/or controller DMA channel.

This application note explains the various DMAMUX features of the products listed in the table below: how to configure the DMAMUX as well as giving guidance on the use of the new synchronization and request generation capabilities.

For further information on DMAMUX in STM32 devices, refer to the product reference manuals available on www.st.com.

 

Table 1. Applicable products

 

 

 

Type

 

Product series

 

 

STM32H7 Series

 

 

 

 

 

STM32G0 Series

 

 

 

Microcontrollers

 

STM32G4 Series

 

 

 

STM32L4+ Series

 

 

 

 

 

 

 

STM32L5 Series

 

 

 

 

 

STM32WB Series

 

 

 

Microprocessors

 

STM32MP1 Series

 

 

 

AN5224 - Rev 4 - June 2020

www.st.com

For further information contact your local STMicroelectronics sales office.

 

 

 

STMicroelectronics STM32 Application note

AN5224

DMAMUX description

1DMAMUX description

A peripheral indicates a request for DMA transfer by setting its DMA request signal. The DMA request is pending until it is served by the DMA controller that generates a DMA acknowledge signal, and the corresponding DMA request signal is de-asserted.

In this document, the set of control signals required for the DMA request/acknowledge protocol is not explicitly described and it is referred to as peripheral DMA request line.

The DMA request router can be considered as an extension of the DMA controller. It routes the DMA peripheral requests to the DMA controller itself.

The DMAMUX request multiplexer enables routing a DMA request line from the peripherals to the DMA controllers of the product. The routing function is ensured by a programmable multi-channel DMA request line multiplexer. Each channel (DMAMUX channel 0 in the example of the figure below) selects a unique DMA request line to forward (unconditionally or synchronously) to the associated DMA controller channel (DMA channel 0 in the example of the figure below). This allows DMA requests to be managed with a high flexibility, maximizing the number of DMA requests that run concurrently.

Figure 1. DMAMUX request multiplexer

P1

P2

P3

<![if ! IE]>

<![endif]>...

Pn

<![if ! IE]>

<![endif]>DMAMUX channel 0

<![if ! IE]>

<![endif]>...

<![if ! IE]>

<![endif]>DMAMUX channel 15

DMA channel 0

DMA channel 15

Px Peripheral x request (example LPUART1_TX or LPUART1_RX)

AN5224 - Rev 4

page 2/14

 

 

AN5224

DMAMUX features

2DMAMUX features

The figure below represents a simplified DMAMUX block diagram. The “Request multiplexer” structure is duplicated N times depending on the number of DMA channels managed by the DMAMUX.

Figure 2. DMAMUX simplified block diagram

DMA requests from peripherals: dmamux_req_inx

DMAMUX

 

 

 

 

Request multiplexer

p

 

 

 

 

 

 

Channel 0

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

DMAMUX_C0CR

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

Channel

Ctrl

 

 

 

 

 

 

 

select

 

 

 

 

 

 

 

n+p+2

 

 

 

 

Request generator

 

 

 

n+3

 

 

 

 

 

Channel n

n

<![if ! IE]>

<![endif]>dmamux req genx

<![if ! IE]>

<![endif]>dmamux reqx

Sync

 

 

n+2

 

 

DMAMUX_RGCnCR

 

 

 

 

 

 

 

 

 

 

 

 

n+1

 

 

 

 

 

Channel 1

1

2

s

 

1

0

 

 

 

 

 

 

DMAMUX_RGC1CR

0

1

 

 

 

 

 

Channel 0

 

 

 

 

 

 

 

 

 

 

 

DMAMUX_RGC0CR

 

 

 

 

 

 

 

 

t

1

0

 

 

 

 

s

1

0

 

Trigger inputs:

Synchronization inputs:

dmamux_trgx

dmamux_syncx

Note: Simplified block diagram with only one request multiplexer.

 

DMA request to DMA Channel 0: dmamux_req_out0

DMA channel event: dmamux_evt0

The DMAMUX is mainly composed of two components, the request multiplexer (or router block) and the request generator.

The request multiplexer includes a synchronization unit per channel, with inputs/outputs as follows:

Inputs:

dmamux_reqx: DMA request from a peripheral (dmamux_req_inx) or from the request generator (dmamux_req_genx)

dmamux_req_gen[0..n] are affected respectively to dmamux_req[1..n+1] and dmamux_req_inx are affected starting from dmamux_req[n+2].

dmamux_syncx: optional synchronization event

Outputs:

dmamux_req_outx: DMA request dmamux_reqx forwarded from the input to the output

dmamux_evtx: optional generated event that may be used to trigger/synchronize other DMAMUX channels

The request generator allows DMA request generation on interrupt signals or events, with input/output as follows:

Input: dmamux_trgx, trigger event inputs to the request generator sub-block

Output: dmamux_req_genx, DMA request from the request generator sub-block to the DMAMUX request multiplexer channels

The number of request multiplexer blocks depends on the number of DMA channels managed by the DMAMUX. For examples:

For a 8 channels DMA, 8 request multiplexer channels must be available.

For a product with two DMA controllers with 8 channels each, 16 request multiplexer channels must be available.

AN5224 - Rev 4

page 3/14

 

 

AN5224

Request routing and synchronization

The request generator is instantiated once by DMAMUX. It contains N channels (depending on the product) capable of generating DMA requests. Refer to the 'DMAMUX implementation' section in the product reference manual for more details.

Thanks to the request generator block, user software can trigger DMA transfers based on signals from peripherals that do not implement the DMA requests.

2.1Request routing and synchronization

2.1.1Unconditional request forwarding

In order to perform peripheral-to-memory or memory-to-peripheral transfers, the DMA controller channel requires each time a peripheral DMA request line. Each time a request occurs, the DMA channel transfers data from/to peripheral. The DMAMUX request multiplexer channel x allows the selection/routing of the peripheral DMA request line to the DMA channel x.

When the multiplex is set (DMAREQ_ID not equal to zero), it ensures the actual routing of DMA request line. The connection of peripheral DMA request to the multiplexer channel output is selected through the programmed ID in DMAREQ_ID bits of the channel control register (DMAMUX_CxCR).

For each peripheral DMA request line in the product, a unique ID is affected. The value zero (DMAREQ_ID = 0x00) corresponds to no DMA request line selected.

After the configuration of a DMAMUX channel, the corresponding DMA controller channel can be configured on its turn. Two different DMAMUX channels can not be configured to select the same peripheral DMA request line as source.

2.1.2Conditional request forwarding

In addition to unconditional request forwarding, the synchronization unit allows the software to implement conditional request forwarding. The routing is effectively done only when a defined condition is detected. The DMA transfers can be synchronized with internal or external signals.

For example, the user software can use the synchronization unit to initiate or adjust data transmission throughput. DMA request can be forwarded in one of the following way:

each time an edge is detected on a GPIO pin (EXTI)

in response to a periodic event from a timer

in response to an asynchronous event from a peripheral

in response to an event from another request router (request chaining)

On top of DMA request conditioning, the synchronization unit allows the generation of events that may be used by other DMAMUX sub-blocks (such as the request generator or another DMAMUX request multiplexer channel).

Figure 3. DMA request line multiplexer channel - Event generation

dmamux_req dmamux_req_out

DMA request counter

dmamux_evt

Request counter auto-reload

3

2

1

0

3

2

1

0

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Event generation (can be used as sync event) Request counter decrements after each transfer.

AN5224 - Rev 4

page 4/14

 

 

AN5224

Request routing and synchronization

When DMAMUX channel is configured in synchronous mode its behavior is as follows:

1.The request multiplexer input (DMA request from the peripheral) can become active but it is not forwarded on the DMAMUX request multiplexer output until the synchronization signal is received.

2.When the sync event is received the request multiplexer connects its input and output and the pending peripheral request, if any, is forwarded.

3.Each forwarded DMA request decrements the request multiplexer counter (user programmed value). When the counter reaches zero and the last forwarded request is acknowledged by the DMA controller, the connection between the DMA controller and the peripheral is disabled (not forwarded) waiting for a new synchronization event.

For each underrun of the counter, request multiplexer line can generate an optional event to synchronize with a second DMAMUX line. The same event can be used in some low-power scenarios to switch the system back to stop mode without any CPU intervention.

Synchronization mode can be used to automatically synchronize data transfers with a timer for example, or to trigger the transfers on a peripheral event.

The synchronization signal (SYNC_ID), the synchronization signal polarity (SPOL) and the number of requests to forward (NBREQ+1) are configured in the request line multiplexer channel configuration register (DMAMUX_CxCR).

AN5224 - Rev 4

page 5/14

 

 

Loading...
+ 9 hidden pages