STMicroelectronics STEVAL-DPSTPFC1 User Manual

UM2792

User manual

Getting started with the STEVAL-DPSTPFC1 3.6 kW PFC totem pole with inrush

current limiter reference design

Introduction

The STEVAL-DPSTPFC1 3.6 kW bridgeless totem pole boost circuit achieves a digital power factor correction (PFC) with inrush current limiter (ICL). It helps you to design an innovative topology with the latest ST power kit devices: silicon carbide MOSFETs (SCTW35N65G2V), thyristor SCRs (TN3050H-12WY), isolated FET drivers (STGAP2S) and a 32-bit MCU (STM32F334).

This reference design also opens the path to a compact converter running at 72 kHz offering a high peak efficiency, low THD distortion (97.5 % with 3.7 % THD) and reduced bill of materials.

It achieves a robust circuit that meets EMC standards up to 4 kV delivering high switching lifetime with reduced EMI emissions.

Thyristor SCRs used as AC line polarity switches allow achieving an active current limitation at power up or line drop recovery: the PFC efficiency is optimal and no EMI bouncing effect occurs.

The reference design includes a power board with a bridgeless totem pole boost (with an inrush limiter circuit, switch drivers and an auxiliary power supply), a control board with its MCU, a PFC/ICL control firmware and an adapter board for software debug.

Figure 1. STEVAL-DPSTPFC1 totem pole

UM2792 - Rev 1 - January 2021

For further information contact your local STMicroelectronics sales office.

www.st.com

UM2792

Getting started

1 Getting started

1.1 Safety instructions

Attention: The STEVAL-DPSTPFC1 evaluation board is designed for demonstration purposes only and is not intended for

domestic or industrial installations.

Danger:

The high voltage levels used to operate the STEVAL-DPSTPFC1 evaluation board could provoke a serious electrical shock. This evaluation board has to be used in a suitable laboratory by qualified personnel only, familiar with the installation, use, and maintenance of power electrical systems.

The STEVAL-DPSTPFC1 radiated field levels could exceed the general public exposure limit if positioned at less than 60 cm.

During operation, do not touch the board as some of its components could reach a very high temperature.

1.2

Overview

The STEVAL-DPSTPFC1 is a 3.6 kW PFC totem pole controlled by an STM32 MCU. It has been designed to offer high performances in terms of efficiency, THD, power factor and reliability by controlling the inrush current at board startup.

The totem pole board is composed of three different boards:

• an AC-DC power board

• a digital control board based on the STM32F334 microcontroller used to control the PFC stage

• an adapter board to debug the MCU firmware

Figure 2. STEVAL-DPSTPFC1 AC-DC power board and PFC control board (highlighted in yellow)

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Figure 3. STEVAL-DPSTPFC1 adapter board

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Main components

1.3

The STEVAL-DPSTPFC1 offers:

• inrush current limitation without inrush current resistor or NTC and relay

• very high efficiency AC-DC conversion

• DC power stage disconnection from the AC line grid thanks to SCRs

Main components

The STEVAL-DPSTPFC1 main components are:

• TN3050H-12WY inrush current limiter SCRs

• SCTW35N65G2V SiC MOSFETs

• STM32F334 MCU

• VIPER26LD flyback IC

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Figure 4. STEVAL-DPSTPFC1 main component diagram

Insulated

SCR

TN3050H-12WY

SCTW35N65G2V

STGAP2S

Driver

Current sensor

insulated

HVDC

Driver

Input filter

SCR

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Main components

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Figure 5. STEVAL-DPSTPFC1 components - overview

1. Common mode filter + MOV

2. Boost inductor

3. SCR

4. SCR

5. DC load connectors

6. SiC MOSFET

7. SiC MOSFET

8. DC power supply

9. MCU daughter board

10. Potentiometer to control peak inrush current

11. ICL strategy control switch

12. ICL startup switch

13. PFC LEDs status

14. AC line connectors

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Main components

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1.4 Totem pole PFC specifications

Table 1. PFC electrical specifications

Description Symbol Min. Typ. Max. Unit Comments

Input

AC line voltage

AC line frequency HZ 45 65

AC line current

Maximum input power PIN MAX

Output

Output voltage regulated HVDC 400 420

HVDC ripple Vripple (PK-PK) 15 V

Maximum output DC current

Control

Switching frequency Fs 72 kHz

Operating temperature

Maximum ambient temperature

IAC MAX

IDC Max

AMB

MAX

85 264

3.6 kW

1.8 kW

9 A

4 A

45 °C

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Totem pole PFC specifications

RMS

VAC = 230 V

IAC MAX = 16 A

VAC = 110 V

IAC MAX = 16 A

OUT

VAC = 230 V

IAC MAX = 16 A

OUT

VAC = 230 V

IAC MAX = 16 A

OUT

VAC = 110 V

IAC = 16 A

RMS

= 3.6 kW

RMS

= 3.6 kW

RMS

= 1.7 kW

RMS

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Table 2. PFC temperature specifications

Description

Thermal components

Inductor T_Choke 120 °C T

Sic MOSFETs TC_MOS 80 °C

SCRs TC_SCR 65 °C

Symbol Min. Typ. Max. Unit Comments

= 30°C

AMB

FAN ON

= 3.6 kW

OUT

VAC = 230 V

RMS

IAC MAX = 16 A

RMS

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Totem pole PFC specifications

Table 3. PFC protection specifications

Description Symbol Min. Typ. Max. Unit Comments

HVDC overvoltage protection 450 VDC

IAC peak overcurrent protection

24 A

Table 4. Passive component specifications

Description Symbol Min. Typ. Max. Unit Comments

Primary EMI filter inductor

Output capacitor

L_FILT

L3 / L4 / L14

C_HVDC

C76/C77/C78

3 x 1.6 mH

3 x 680 µF

Table 5. PFC efficiency specifications

Description Symbol Min. Typ. Max. Unit Comments

Power factor

230 V

PF 0.9903 N.A.

PF 0.9956 N.A.

PF 0.9965 N.A.

PF 0.9932 N.A.

PF 0.9982 N.A.

PF 0.9981 N.A.

Distortion

THD 6.9 %

THD 3.7 %

THD 3.5 %

THD 9.7 %

THD 4.6 %

THD 4.2 %

RMS

IAC = 4.5 A

230 V

RMS

IAC = 8.8 A

230 V

RMS

IAC = 15.5 A

110 V

RMS

IAC = 3.8 A

110 V

RMS

IAC = 9.5 A

110 V

RMS

IAC = 15.5 A

230 V

RMS

IAC = 4.5 A

230 V

RMS

IAC = 8.8 A

230 V

RMS

IAC = 15.5 A

110 V

RMS

IAC = 3.8 A

110 V

RMS

IAC = 9.5 A

110 V

RMS

IAC = 15.5 A

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/50 Hz

RMS

/50 Hz

RMS

/50 Hz

RMS

/60 Hz

RMS

/50 Hz

RMS

/60 Hz

RMS

/50 Hz

RMS

/50 Hz

RMS

/50 Hz

RMS

/60 Hz

RMS

/50 Hz

RMS

/60 Hz

RMS

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Description Symbol Min. Typ. Max. Unit Comments

Efficiency

230 V

η 96.8 %

η 97.5 %

η 97.2 %

η 92.4 %

η 94.8 %

η 94.6 %

RMS

IAC = 4.5 A

230 V

RMS

IAC = 8.8 A

230 V

RMS

IAC = 15.5 A

110 V

RMS

IAC = 3.8 A

110 V

RMS

IAC = 9.5 A

110 V

RMS

IAC = 15.5 A

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Status LEDs

/50 Hz

RMS

/50 Hz

RMS

/50 Hz

RMS

/60 Hz

RMS

/50 Hz

RMS

/60 Hz

RMS

1.5 Status LEDs

The following board LEDs define the PFC status:

• HV CAPACITOR DISCHARGE - LED7: lights up in red when the HVDC output voltage is higher than 30 V (voltage between HVDC and GND_DC terminals)

Danger:

While LED7 is red, the DC output capacitor is not discharged and could provoke a serious electrical shock

• POWER_SUPPLY - LED6: lights up in red when the PFC totem pole board is powered

• PFC STATUS LEDs (LED 1/2/3/4/5): at board startup, all these LEDs are alternatively lit in red, then orange, green and then OFF. This indicates the microcontroller has finalized the initialization procedure (right mains connection, line frequency measurement, power supply available, etc.) and the board is ready to be used. From this moment, the DC output capacitor can be charged when the HVDC switch (SW1) is in the ON position.

LEDs definition LEDs state Comments

IAC (LED1)

HVDC (LED2)

FREQ (LED3)

Table 6. Status LEDs

OFF PFC board not supplied

GREEN

RED IAC_Peak > 25 A

OFF PFC board not supplied

GREEN

GREEN FLASHING DC output capacitor in charge

ORANGE

RED

OFF PFC board not supplied

GREEN 45 Hz < AC Line frequency < 65 Hz

ORANGE AC Line frequency < 45 Hz

IAC < 16 A

RMS

HVDC = 400 V

HVDC < 380 V

HVDC > 450 V

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LEDs definition LEDs state Comments

FREQ (LED3)

RED AC Line frequency > 65 Hz

OFF PFC board not supplied

VAC (LED4)

GREEN

ORANGE

RED

85 V

< VAC < 264 V

RMS

VAC < 85 V

VAC > 264 V

OFF PFC board not supplied

TEMP (LED5)

GREEN Heat sink temperature < 120 °C

ORANGE N.A.

RED Heat sink temperature > 120°C

Figure 6. PFC status LEDs overview

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Status LEDs

RMS

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2 Board connection and startup

2.1 Mechanical switches and potentiometer configuration

Step 1. Push the FC switch (SW1) on OFF position

Step 2. To control the inrush current by SCRs with a constant progressive phase control, push the ICL_PEAK

switch (SW2) on VAR position. The constant progressive phase control value is defined by the max. inrush current potentiometer (R30)

Step 3. To control the inrush current by SCRs with a variable progressive phase control, push the ICL_PEAK

switch on FIX position.

Step 4. The max. inrush current potentiometer (R30) value is read only by the MCU if the ICL_PEAK switch

is set to VAR position. Max. inrush current potentiometer is used to define the constant progressive phase control value. The DC capacitor charge speed can be increased if the allowed peak current is increased. For this purpose, the max. inrush current potentiometer has to be turned clockwise.

Figure 7. STEVAL-DPSTPFC1 switches and potentiometer

1. PFC switch (SW1)

2. ICL_PEAK switch (SW2)

3. Max. inrush current potentiometer (R30)

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Board connection and startup

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2.2 AC line wires connection

Step 1. Connect the line (L), neutral (N) and earth (PE) wires with J3, J6 and J7 headers, respectively, to an

unpowered mains plug.

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AC line wires connection

Figure 8. AC line wire connection overview

2.3 Output DC load connection

Step 1. Connect the DC load between the HVDC and GND_DC connectors.

Figure 9. STEVAL-DPSTPFC1 output HVDC connection

If an electronic DC load is used:

– connect the positive input of the electronic DC load to HVDC connector

– connect the negative input of the electronic DC load to GND_DC connector

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2.4 PFC board power on

Step 1. Put the AC line voltage ON.

Danger: Do not touch components under the AC line voltage.

The power supply LED6 lights up in red to signal the PFC totem pole board is powered. The PFC status LEDs (LED1/2/3/4/5) blinking sequence is red, orange, green. At board startup, parameters like VAC, IAC, temperature and current sensor are checked. After board initialization, the PFC status LEDs light up as per the table and figure below.

POWER SUPPLY - LED6 Red light

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PFC board power on

Table 7. STEVAL-DPSTPFC1 LEDs

Definition State

I_AC - LED1 OFF

HVDAC - LED2 OFF

FREQ - LED3 Green light

V_AC - LED4 Green light

TEMP - LED5 Green light

1. PFC status LEDs (LED1/2/3/4/5)

2. Power supply (LED6)

Figure 10. LED status overview

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2.5 PFC startup

Step 1. Slide the PFC switch (SW1) to ON to start up the PFC totem pole board (see Figure 7)

The PFC status LEDs must light up as per the following table and Figure 6.

2.6 PFC board turn off

Step 1. Slide the PFC switch (SW1) to OFF position to start up the PFC totem pole board (see Figure 7)

The PFC status LEDs must light up as per the following table and Figure 6. PFC status LEDs overview.

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PFC startup

Table 8. PFC LED status

Definition Status

I_AC - LED1 Green light

HVDAC - LED2 Green light

FREQ - LED3 Green light

V_AC - LED4 Green light

TEMP - LED5 Green light

POWER SUPPLY - LED6 Red light

HV_CAPACITOR STATUS Red light

Table 9. PFC LED status

Definition Status

I_AC - LED1 OFF

HVDAC - LED2 OFF

FREQ - LED3 Green light

V_AC - LED4 Green light

TEMP - LED5 Green light

POWER SUPPLY - LED6 Red light

HV_CAPACITOR STATUS - LED7 OFF

Note: HV_CAPACITOR STATUS (LED7) switches off after an interval of time that depends on the DC load impedance

(around 3 minutes if no DC load is connected to the HVDC output).

Danger:

When HV_CAPACITOR STATUS (LED7) lights up in red, the DC output capacitor is not discharged and could provoke a serious electrical shock. This LED remains switched on as long as the HVDC voltage remains above 30 V.

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3 DC bus capacitor discharge

R67

HVDC

STQ1NK80ZR-AP

R103

STN4NF03L

D11

165k

R66

MMSZ5256BT1G

STN4NF03L

MMSZ5V6T3G

R65

High voltage visualization

165k

R105

3.3k

R106

5V_DC

HV_DISCHARGE

R64

R68

GND_DC

165k

R104

MMSZ5245BT1G

D10

10k

33k 5W

R63

165k

P6KE440A

BUL216

165k

DZ1

165k

HV capacitor discharge

A circuit has been implemented to accelerate the output DC capacitors (C76, C77 and C78) discharge through R63 resistor. This circuit is turned on every time the PFC board is in OFF state. The full discharge time takes around 3 minutes when no DC load is connected. LED7 (HV CAPACITOR DISCHARGE) is lit up as long as the HVDC voltage remains above 30 V.

Figure 11. DC bus capacitor discharge circuit

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DC bus capacitor discharge

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4 Additional external components

The STEVAL-DPSTPFC1 board allows adding some external components to the front-end circuit.

4.1 DC-DC circuit connection

A DC-DC converter can be connected to the HVDC bus via HVDC (J3) and GND_DC (J8) connectors. To allow the correct operation of the STEVAL-DPSTPFC1 front-end circuit, the DC-DC converter has to be activated after the PFC_START signal has been set to high level state. The PFC_START signal indicates the PFC is operational and the HVDC output voltage is 400 VDC. This signal refers to GND_DC terminal and is available from the J1

header.

Figure 12. DC-DC converter activation (DC_DC_Start signal) when PFC totem pole is operational

VAC = AC line voltage

IAC = AC line current

HVDC = PFC output voltage

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Additional external components

4.2 Motor inverter connection

An inverter can be added behind the HVDC bus output. A 12 V positive output, referred to the DC Bus Ground (GND_DC), is available on header J1 to supply an IPM module, if needed.

4.3 Control through an external microcontroller

Instead of using the embedded MCU daughter board, the STEVAL-DPSTPFC1 can be controlled through an external MCU daughter board to directly check the compliance of its firmware with this board circuit. For pin numbers and names of the daughter board connectors, refer to the external connectors section shown in

Figure 87. STEVAL-DPSTPFC0 circuit schematic (1 of 4).

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5 Totem pole PFC control

5.1 Bridgeless PFC totem pole overview

Figure 13. Bridgeless PFC totem pole synoptic

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Totem pole PFC control

The figure above highlights the main components:

• SCRs (SCR1 and SCR2) in the bridgeless PFC totem pole to:

– control inrush current at board startup

– disconnect the DC link bus (HVDC) from the AC line voltage

• SiC MOSFETs (S1 and S2) to shape the input AC line current

• STGAP2S drivers to control SiC MOSFETs

• an STM32 MCU which mainly drives SCRs and SiC MOSFETs

• a flyback power converter providing:

– 5V_SCR1: 5 VDC insulated output. This supply is used to control SCR1

– 5V_SCR2: 5 VDC insulated output. This supply is used to control SCR2

– 12V_DC: 12 VDC insulated regulated output referenced to the DC bus ground (GND_DC). This supply

is used to supply the insulated DC-DC converter (needed by SiC MOSFETs) and the fan. From this 12 VDC:

◦ a 5V_DC is created to supply current sensor

◦ a 3V3_DC is created to supply the PFC board control and all the control circuits

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5.2 Soft start

To ensure a smooth PFC startup, a soft start procedure has been implemented in the STM32 MCU:

• to reduce the inrush current at board startup, SCRs are controlled by a progressive phase control and the output DC capacitor can smoothly increase up to the AC line peak voltage

• to reduce the inrush current when the PFC output voltage (HVDC) switches from the peak AC line voltage to regulated 400 V

• once the PFC output voltage reference is reached, the PFC output DC voltage (HVDC) is regulated according to output and input conditions

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Soft start

Figure 14. PFC soft start principle

The following figure shows an example of the described progressive PFC soft start. Tests have been performed at board startup with the board connected to a 230 V 50 Hz grid (VAC) with a 3.3 kW DC load.

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VAC = AC line voltage

IAC = AC line current

HVDC = PFC output voltage

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Inrush current control

Figure 15. PFC soft start procedure

5.3 Inrush current control

5.3.1 IEC 61000-3-3 standard

The IEC 61000-3-3 standard gives the limitation of voltage changes and fluctuations for equipment with rated RMS current lower than 16 A when connected to a public low voltage grid.

If a too high current is sunk from the grid, the equipment causes these voltage fluctuations and voltage drop occurs due to the line impedance.

The mains voltage fluctuation causes undesired brightness variation of lamps and displays (flicker phenomenon). For this reason, you should keep the inrush current sunk by your equipment lower than the specified limits.

5.3.2 Inrush current controlled by NTC resistor

Usually, the PFC totem pole uses diodes (D1/D2) or a standard MOSFET (S3/S4) operating at low frequency. However, MOSFETs or diodes need a resistor or an NTC (RLim) to control the inrush current at board startup. The resistor has then to be bypassed by a relay (RL2) to limit the power losses during steady state operation. To disconnect the DC bus in standby mode, a second relay (RL1) is required. In steady state operation, this solution increases global power losses due to the relay contact resistor as well as the PFC converter cost.

Note: The contact resistor value increases according to the number of operating cycles and, therefore, decreases PFC

efficiency.

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Figure 16. PFC totem pole topology with NTC resistor

Low frequency

Diodes or MSOFETs

High frequency

BP2

GND

SiC MOSFETs

RLim

EMI FILTER

BP1

HVDC

SCR

EMI FILTER

Low frequency

SCRs

BP2

GND

SiC MOSFETs

BP1

SCR

HVDC

High frequency

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Inrush current control

5.3.3 Inrush current controlled by SCRs

With the totem pole PFC the capacitor can be smoothly charged with a progressive phase control and avoid the use of an NTC or a resistor thanks to SCRs.

Figure 17. PFC totem pole topology with SCRs

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T_OFF_2

T_OFF_Max

∆t

5x∆t

2x∆t

3x∆t

HVDC

SCR1

T_OFF_Min

SCR2

T_OFF_3

T_OFF_1

4x∆t

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Inrush current control

As long as SCRs are not triggered, the bridge does not conduct current and the DC bus capacitor is not charged. To start charging the DC capacitor, SCR1 and SCR2 have to be turned on according to the AC line voltage polarity (SCR1 is turned on when the AC line polarity is negative and SCR2 is turned on when the AC line polarity is positive). To reduce the inrush current, SCRs are alternatively triggered at the end of the half line voltage cycle, just few hundreds of microseconds before the line zero voltage. This allows the output capacitor to be charged to a low level (around 10 to 30 V) and not directly to the peak line voltage. The current driven from the line is then much lower than in case of a direct full charge of the DC capacitor.

This soft start solution can work only when an inductor is present on the line side as the rate of current increase has also to be limited to prevent SCRs damage. The inductor is already present for most applications where the EMI filter usually embeds a common mode choke which has a differential mode parasitic inductor due to the copper turns of the windings.

To control the inrush current at PFC board startup with SCRs, two solutions have been implemented in the MCU firmware: fixed SCRs on delay and variable SCRs on delay

Fixed SCRs on delay

To allow a complete charge of this capacitor to the peak line voltage, SCRs have to be triggered on the subsequent half cycle with a shorter turn on delay than the one used to start charging. With VAC, the AC line

voltage and HVDC represent the PFC output voltage.

Figure 18. HV capacitor charges controlled by SCRs

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By reducing SCRs turn-on delay by few tens or hundreds of microseconds from half-cycle to half-cycle, the output capacitor is progressively charged while the line current is kept low. The step of SCRs turn-on delay reduction is constant from one half-cycle to the following one.

The step of SCRs turn-on delay is defined by reading the MAX_INRUSH CURRENT potentiometer value on the PFC totem pole board (see Eq. (1)). In the firmware, the step of SCRs turn-on delay is called Delta_Phase_Angle_μs. Step_Phase_Control_Min_μs is the allowed minimum step of SCRs turn-on delay (30 μs) and the Delta_Phase_Control_Max_μs parameter is the allowed maximum step of SCRs turn-on delay (200 μs).

Delta_Control_Max_μs × ADC_Value

Delta_Pℎase_Angle_μs =

+ Step_Pℎase_Control_Min_μs

(1)

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Inrush current control

When the SCRs turn-on delay is lower than 3 ms, the SCRs gate pulse is directly set to a continuous DC pulse according to the AC line polarity (SCR1 is set to continuous DC pulse when the AC line polarity is negative and SCR2 is set to continuous DC pulse when the AC line polarity is positive). Below approximately a 5 ms or 4.2 ms delay (respectively for 50 and 60 Hz line frequency), the output DC capacitor is fully charged. So it is not necessary to ensure a soft start for turn-on delays much lower than a fourth cycle. In the firmware, the SCRs turn-on delay to switch SCRs to a continuous DC pulse is called Phase_Control_ON_Max_μs.

The following figure shows an example of progressive DC capacitor charge. The test has been performed at startup when the STEVAL-DPSTPFC1 board is connected to a 230 V 50 Hz grid without an output DC load, while the output DC capacitor is fully uncharged (i.e., its initial voltage is null). In these conditions, the maximum inrush peak current is around 30 A and the output capacitor is charged in 1.5 s.

Figure 19. Inrush current control at board startup (with fixed SCRs on delay)

HVDC=PFC output voltage IAC = AC line current

VAC = AC line voltage

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Variable SCRs on delay

The peak current during the output capacitor charge is not constant. Only the reduction step of the SCRs turn-on delay is constant. According to the time of the SCR turn-on, peak current can slightly vary from one period of the AC line voltage to another. In this case, a second solution has been implemented in the firmware: by reducing the SCRs turn-on delay defined in a look-up table, half-cycle to half-cycle, the output capacitor is progressively charged while the line current is kept low with a constant value.

The look up table is defined according to the AC line voltage model (equivalent inductance and resistance), the input common filter, the output DC bulk capacitor and the dynamic resistance of the SCRs and MOSFETs.

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Figure 20. Inrush current control at board startup (with variable SCRs on delay)

HVDC=PFC output voltage IAC = AC line current

VAC = AC line voltage

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Inrush current control

The look-up table listing the steps of SCRs turn-on delay reduction is defined by the TAB_SCRs_Delay_us table in the ICL_Current_Constant.h file.

Note: The look-up table has been defined without DC load connected at the output PFC.

5.3.4 Inrush current control flowchart

SCRs are controlled to limit the inrush current at board startup (refer to Figure 21).

At each AC line voltage zero cross (see Figure 22. ICL flowchart (1 of 2) and Figure 23. ICL flowchart (2 of 2)):

• SCRs are switched to OFF state

• a timer is initialized to reduce SCR control turn-on delay from half-cycle to half-cycle

• test end of ICL procedure is performed:

– to check if the SCR turn-on delay is lower than 3 ms, the SCR gate pulse is directly set to a continuous

DC pulse according to the AC line polarity (SCR1 is set to continuous DC pulse when the AC line polarity is negative and SCR2 is set to continuous DC pulse when the AC line polarity is positive). In the firmware, the SCR turn-on delay is called Phase_Control_ON_Max_us.

– to check if the HVDC output DC voltage are charged at least 70% of the peak AC line voltage. In the

firmware, this value is called VAC_Rate_ICL_Min.

At each timer interrupt:

• SCRs are controlled according to the AC line voltage polarity

• the SCR control turn-on delay decreases

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Figure 21. SCR control management

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Inrush current control

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Figure 22. ICL flowchart (1 of 2)

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Inrush current control

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Figure 23. ICL flowchart (2 of 2)

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Steady state operation

5.4 Steady state operation

The bridgeless PFC totem pole increases its efficiency by eliminating the diode bridge in the conventional PFC. It uses two SiC MOSFETs (S1 and S2) that operate at fixed PWM frequency and two SCRs (SCR1 and SCR2) which operate at AC line frequency.

During the positive AC line cycle, SCR2 is always ON and SCR1 is always OFF. S1 and S2 are controlled in synchronous mode. S1 and S2, together with the input inductor L1 and the output capacitor C1, form a boost converter topology. S2 switch increases the boost inductor current and S1 acts as freewheeling boost diode.

[0 ; d.TS] on the left [d.Ts ; TS] on the right

Figure 24. Positive AC line cycle operation

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During the negative AC line cycle, SCR1 is always ON and SCR2 is always OFF. S1 and S2 are controlled in synchronous mode. S1 and S2, together with the input inductor L1 and the output capacitor C1, form a boost converter topology. S2 switch increases the boost inductor current and S1 acts as a freewheeling boost diode.

Figure 25. Negative AC line cycle operation

[0 ; d.TS] on the left [d.Ts ; TS] on the right

The following figure shows an example of the PFC totem pole behaviour in steady state operation with a 3.6 kW DC load and VAC = 230 V

RMS

Note: Under the previous conditions, the HVDC peak to peak ripple is around 15 V.

UM2792

PFC soft start

HVDC = PFC output voltage IAC = AC line current

VAC = AC line voltage

Figure 26. Steady state operation

5.5

UM2792 - Rev 1

PFC soft start

After the inrush current control procedure, the internal voltage loop output increases from initial voltage under the soft start control to reduce the current stress due to all power switches. Once HVDC has reached 400 VDC, the

soft start control is released to achieve the desired regulation.

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HVDC = PFC output voltage IAC = AC line current

VAC = AC line voltage

UM2792

PFC soft start

Figure 27. PFC soft start

Figure 28 shows how the PFC soft start is managed after the inrush current control procedure. The soft start PFC

management routine is called at each zero cross of the AC line voltage (see Figure 29). This routine increases the HVDC output voltage target up to 400 VDC.

Figure 28. PFC startup soft start management after inrush control procedure

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Figure 29. PFC startup soft start flowchart

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PFC soft start

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6 Switch control

6.1 SiC MOSFET control

A digital PWM signal is used to control SiC MOSFETs though STM32 timer (TIM1). Digital TIM1 counter period is defined by Equation 2 where Fs is the PWM frequency fixed at 72 kHz and F

frequency fixed at 72 MHz.

Note: The duty cycle of the PWM control is defined by the STM32 TIM1 CCR2 register.

TIM1

Counter_Period

CPU

72 × 10

= 1000

The Duty cycle is clamped at the minimum (100 pulses) and the maximum (970 periods) of the digital TIM1 timer counter.

To improve the PFC totem pole bridgeless efficiency, S1 and S2 SiC MOSFETS are operating in synchronous conduction mode. Two complementary PWM signals (CH2 and CH2N) are used to control SiC MOSFETs. To avoid the short circuits due to a slight turns ON and OFF of SiC MOSFETs, a dead time (DT) has been added (see the following figure) with IL as the inductor current.

Figure 30. Synchronous SiC MOSFET control

CPU

UM2792

Switch control

is the STM32 oscillator

(2)

UM2792 - Rev 1

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Zero cross current spike control

Figure 31. Synchronous SiC MOSFET control waveform

UM2792

The digital dead time is called “DeadTime_MOSFET” in the firmware and this parameter is fixed at 20 periods of the TIM1 Timer.

DT =

DeadTime

Fs⋅ TIM1

Counter_Period

6.2 Zero cross current spike control

An input current (IAC) spike is generated at each AC line zero cross (VAC). This issue is related to the PFC totem pole. For example, during the negative AC line cycle, SCR1 is always on and SCR2 is always off and the PFC

output voltage (400 VDC) is applied across SCR2. S1 SiC MOSFET switch increases the boost inductor current and S2 SiC MOSFET acts as a freewheeling boost diode. When the AC line voltage polarity is changing from

negative to positive AC line cycle, the duty cycle of the S1 SiC MOSFET changes from 100% to zero and the active S2 SiC MOSFET change from zero to 100%. The SCR1 voltage is then applied across the boost inductor and current spike is generated (see Figure 32 and Figure 33). The same phenomenon occurs with diodes or MOSFETs.

MOSFET

72000 ⋅ 1000

= 278 ns

(3)

UM2792 - Rev 1

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