ST MICROELECTRONICS STD5NK40Z Datasheet

IPAK

TAB

1

2

3

TAB

1

3

2

DPAK

D(2, TAB)

G(1)

S(3)

AM01475V1

STD5NK40Z-1, STD5NK40ZT4

Datasheet

N-channel 400 V, 1.45 Ω typ., 3 A SuperMESH™ Power MOSFETs in

IPAK and DPAK packages

Features

Product status link

STD5NK40Z-1

STD5NK40ZT4

Order codes

STD5NK40Z-1

STD5NK40ZT4 DPAK

V

DS

400 V 1.80 Ω 45 W

R

DS(on)

max. P

TOT

Package

IPAK

• 100% avalanche tested

• Gate charge minimized

• Very low intrinsic capacitance

• Zener-protected

Applications

• Switching applications

Description

These high-voltage devices are Zener-protected N-channel Power MOSFETs
developed using the SuperMESH™ technology by STMicroelectronics, an
optimization of the well-established PowerMESH™. In addition to a significant
reduction in on-resistance, these devices are designed to ensure a high level of dv/dt
capability for the most demanding applications.

DS2854 - Rev 4 - September 2018
For further information contact your local STMicroelectronics sales office.

www.st.com

1 Electrical ratings

Symbol Parameter Value Unit

V

DS

V

GS

I

D

I

D

IDM

P

TOT

dv/dt

ESD Gate-source human body model (C = 100 pF, R = 1.5 kΩ) 2.8 kV

T

T

stg

1. Pulse width limited by safe operating area.

2. ISD ≤ 3 A, di/dt ≤ 200 A/µs, VDD ≤ V

Drain-source voltage 400 V

Gate-source voltage ±30 V

Drain current (continuous) at TC = 25 °C

Drain current (continuous) at TC = 100 °C

(1)

Drain current (pulsed) 12 A

Total dissipation at TC = 25 °C

(2)

Peak diode recovery voltage slope 4.5 V/ns

Operating junction temperature range

j

Storage temperature range

Table 1. Absolute maximum ratings

.

(BR)DSS

STD5NK40Z-1, STD5NK40ZT4

Electrical ratings

3 A

1.9 A

45 W

-55 to 150 °C

Table 2. Thermal data

SymbolParameter

R

thj-case

R

thj-amb

R

thj-pcb

1. When mounted on an 1-inch² FR-4, 2oz Cu board.

Thermal resistance junction-case 2.78 °C/W

Thermal resistance junction-ambient 100 °C/W

(1)

Thermal resistance junction-pcb 50 °C/W

Table 3. Avalanche characteristics

Symbol

I

AR

E

AS

Avalanche current, repetitive or not-repetitive

(pulse width limited by Tj max)

Single pulse avalanche energy

(starting Tj = 25 °C, ID = IAR, VDD = 50 V)

Parameter Value Unit

Value

Unit

IPAK DPAK

3 A

130 mJ

DS2854 - Rev 4

page 2/23

2 Electrical characteristics

(T

= 25 °C unless otherwise specified)

CASE

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

1. Defined by design, not subject to production test.

Drain-source breakdown
voltage

Zero gate voltage drain
current

Gate-body leakage current

Gate threshold voltage

Static drain-source on
resistance

Table 4. On/off states

VGS = 0 V, ID = 1 mA

VGS = 0 V, VDS = 400 V

VGS = 0 V, VDS = 400 V,
TC = 125 °C

VDS = 0 V, VGS = ±20 V

VDS = VGS, ID = 50 µA

VGS = 10 V, ID = 1.5 A

(1)

STD5NK40Z-1, STD5NK40ZT4

Electrical characteristics

400 V

1 µA

50 µA

±10 µA

3 3.75 4.5 V

1.45 1.80 Ω

C

1. C

Table 5. Dynamic

Symbol

C

iss

C

oss

C

rss

oss eq.

Q

Q

gs

Q

gd

oss eq.

80% V

Input capacitance

Output capacitance 57

Reverse transfer capacitance 11.5

(1)

Equivalent output capacitance

Total gate charge

g

Gate-source charge 2.8

Gate-drain charge 5.8

is defined as a constant equivalent capacitance giving the same charging time as C

.

DSS

Parameter Test conditions Min. Typ. Max. Unit

VDS = 25 V, f = 1 MHz,

VGS = 0 V

VGS = 0 V, VDS = 0 V to 320 V

VDD = 320 V, ID = 3 A,

VGS = 0 to 10 V

(see Figure 14. Test circuit for

gate charge behavior)

Table 6. Switching times

Symbol

t

d(on)

t

r

t

d(off)

t

f

t

r(Voff)

t

f

t

c

Turn-on delay time

Rise time 6

Turn-off delay time 22.5

Fall time 11

Off-voltage rise time

Fall time 7.5

Cross-over time 14.5

Parameter Test conditions Min. Typ. Max. Unit

VDD = 200 V, ID = 1.5 A,

RG = 4.7 Ω, VGS = 10 V

(see Figure 13. Test circuit for

resistive load switching times

and Figure 18. Switching time

waveform)

VDD = 320 V, ID = 3 A,

RG = 4.7 Ω, VGS = 10 V

(see Figure 15. Test circuit for

inductive load switching and
diode recovery times)

305

-

- 44

11.7 17

-

oss

9.2

-

8.5

pF

nC

when VDSincreases from 0 to

- ns

DS2854 - Rev 4

page 3/23

STD5NK40Z-1, STD5NK40ZT4

Electrical characteristics

Table 7. Source-drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

SD

I

SDM

VSD

t

rr

Q

I

RRM

1. Pulse width limited by safe operating area.

2. Pulsed: Pulse duration = 300 μs, duty cycle 1.5 %.

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)GSO

Source-drain current - 3

(1)

Source-drain current (pulsed) - 12

(2)

Forward on voltage

Reverse recovery time

Reverse recovery charge - 464 nC

rr

ISD = 3 A, VGS = 0 V

ISD = 3 A, di/dt = 100 A/µs

VDD = 40 V, Tj = 150 °C

- 1.6 V

- 145 ns

(see Figure 15. Test circuit for

Reverse recovery current - 6.4 A

inductive load switching and
diode recovery times)

Table 8. Gate-source Zener diode

Gate-source breakdown
voltage

IGS = ±1 mA, ID = 0 A

±30 - - V

A

The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.
The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for
additional external componentry.

DS2854 - Rev 4

page 4/23

2.1 Electrical characteristics (curves)

STD5NK40Z-1, STD5NK40ZT4

Electrical characteristics (curves)

Figure 1. Safe operating area

Figure 3. Output characterisics Figure 4. Transfer characteristics

Figure 2. Thermal impedance

DS2854 - Rev 4

Figure 5. Capacitance variations Figure 6. Gate charge vs gate-source voltage

page 5/23

V

(BR)DSS

(norm)

STD5NK40Z-1, STD5NK40ZT4

Electrical characteristics (curves)

Figure 7. Normalized gate threshold voltage vs

temperature

Figure 8. Static drain-source on resistance

Figure 9. Source-drain diode forward characteristic Figure 10. Maximum avalanche energy vs temperature

DS2854 - Rev 4

Figure 11. Normalized V

(BR)DSS

vs temperature

Figure 12. Normalized on resistance vs temperature

page 6/23

3 Test circuits

AM01468v1

V

D

R

G

R

L

D.U.T.

2200

μF

V

DD

3.3
μF

+

pulse width

V

GS

AM01469v1

47 kΩ

1 kΩ

47 kΩ

2.7 kΩ

1 kΩ

12 V

IG= CONST

100 Ω

100 nF

D.U.T.

+

pulse width

V

GS

2200

μF

V

G

V

DD

AM01470v1

A

D

D.U.T.

S

B

G

25 Ω

A

A

B

B

R

G

G

D

S

100 µH

µF

3.3

1000
µF

V

DD

D.U.T.

+

_

+

fast
diode

AM01471v1

V

D

I

D

D.U.T.

L

V

DD

+

pulse width

V

i

3.3
µF

2200
µF

AM01472v1

V(BR)DSS

VDD

VDD

VD

IDM

ID

AM01473v1

0

V

GS

90%

V

DS

90%

10%

90%

10%

10%

t

on

t

d(on)

t

r

0

t

off

t

d(off)

t

f

STD5NK40Z-1, STD5NK40ZT4

Test circuits

Figure 13. Test circuit for resistive load switching times

Figure 15. Test circuit for inductive load switching and

diode recovery times

Figure 14. Test circuit for gate charge behavior

Figure 16. Unclamped inductive load test circuit

DS2854 - Rev 4

Figure 17. Unclamped inductive waveform

Figure 18. Switching time waveform

page 7/23