STMicroelectronics STD2NK70Z, STD2NK70Z-1 User Guide

STD2NK70Z - STD2NK70Z-1
N-CHANNEL 700 V - 6 Ω - 1.6 A DPAK/IPAK
Zener-Protected SuperMESH™ MOSFET

Table 1: General Features

TYPE V
STD2NK70Z STD2NK70Z-1
TYPICAL R
ESD IMPRO VED CAPABILIT Y
100% AVALANCHE TESTED
NEW HIGH VOLTAGE BENCHMARK
GATE CHARGE MINIMIZED
DSSRDS(on)ID
700 V 700 V
(on) = 6
DS
7 7
1.6 A
1.6 A
Pw
45 W 45 W
DESCRIPTION
The Supe rME SH™
series is obtained through an
extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushin g on-resis tance sign ifican tly down, special care is taken to en sur e a v er y good d v/ d t c ap ab i lity for the most demanding application. Such series compl ements ST fu ll range of high vltag e MOS­FETs i n cludi n g re vol u tion ar y MDme sh™ p r od uct s.
APPLICATIONS
SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
WELDING EQUIPMENT
FLYBACK CONFIGURATION FOR BATTERY
CHARGER

Figure 1: Package

3
1
DPAK
IPAK

Figure 2: Internal Schematic Diagram

3
2
1

Table 2: Order Codes

Sales Type Marking Package Packaging
STD2NK70ZT4 D2NK70Z DPAK TAPE & REEL
STD2NK70Z-1 D2NK70Z IPAK TUBE
Rev. 2
1/12January 2005
STD2NK70Z - STD2NK70Z-1

Table 3: Absolute Maximum ratings

Symbol Parameter Value Unit
V
V
V
I
DM
P
V
ESD(G-S)
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
T
(*) Pulse width limited by safe operating area (1) I
SD

Table 4: Thermal Data

Rthj-case Thermal Resistance Junction-case Max 2.78 °C/W
Rthj-amb

Table 5: Avalanche Characteristics

Symbol Parameter Max Value Unit
I
E
Drain-source Voltage (VGS = 0)
DS
Drain-gate Voltage (RGS = 20 KΩ)
DGR
Gate- source Voltage ± 30 V
GS
Drain Current (continuous) at TC = 25°C 1.6
I
D
I
Drain Current (continuous) at TC = 100°C
D
(*)
Drain Current (pulsed) 6.4 A Total Dissipation at TC = 25°C
TOT
700 V 700 V
1A
45 W Derating Factor 0.36 W/°C Gate source ESD (HBM-C = 100pF, R = 1.5 KΩ) 2000 V
Storage Temperature
stg
T
Max. Operating Junction Temperature
j
1.6 A, di/dt 200 A/µs, VDD V
Thermal Resistance Junction-ambient Max
T
Maximum Lead Temperature For Soldering Purpose
l
Avalanche Current, Repetitive or Not-Repetitive
AR
(pulse width limited by T Single Pulse Avalanche Energy
AS
(starting T
= 25 °C, ID = IAR, VDD = 50 V)
j
(BR)DSS
max)
j
-55 to 150 °C
100 300
1.6 A
110 mJ
A
°C/W
°C

Table 6: Gate-Source Zener D iode

Symbol Parameter Test Condition Min. Typ. Max Unit
BV
Gate-Source Breakdown
GSO
Voltage
Igs= ± 1mA (Open Drain)
30 A
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external compon ents.
2/12
STD2NK70Z - STD2NK70Z-1
TABLE 7: ELECTRICAL CHARACTERISTICS (T
=25°C UNLESS OTHERWISE SPECIFIED)
CASE
On /Off
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
I
I
V
R
DS(on)
Drain-source Breakdown Voltage
Zero Gate Voltage
DSS
Drain Current (V Gate-body Leakage
GSS
Current (V Gate Threshold Voltage
GS(th)
Static Drain-source On Resistance
ID = 1 mA, VGS = 0 700 V
= Max Rating
V
= 0)
GS
= 0)
DS
DS
= Max Rating, TC = 125°C
V
DS
= ± 20 V ± 10 µA
V
GS
V
= VGS, ID = 50 µA 3
DS
3.75
1
50
4.5 V
VGS = 10 V, ID = 0.8 A 6 7

Table 8: Dynamic

Symbol Parameter Test Condi tions Min. Typ. Max. Unit
(1) Forward Transconductance VDS = 15 V,
g
fs
C
(3) Equivalent Output
oss eq.
C C C
t
d(on)
t
d(off)
Q Q Q
Capacitance Input Capacitance
iss
Output Capacitance
oss
Reverse Transfer
rss
Capacitance Turn-on Delay Time
Rise Time
t
r
Turn-off-Delay Time Fall Time
t
f
Total Gate Charge
g
Gate-Source Charge
gs
Gate-Drain Charge
gd
= 0.8 A
I
D
VGS = 0 V, VDS = 0 to 560 V 17
V
= 25 V, f = 1 MHz, VGS = 0 280
DS
V
= 350 V, ID = 0.8 A,
DD
= 4.7 Ω, V
R
G
(see Figure 17)
V
= 560 V, ID = 0.8 A,
DD
= 10 V
V
GS
(see Figure 20)
GS
= 10 V
1.4 S
35
6.5
7 17 20 35
11.4
6.8
15 nC
2
µA µA
pF pF pF
nC nC
ns ns ns ns

Table 9: Source Drain Diode

Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
I
SDM
V
SD
Q
I
RRM
Q
I
RRM
(1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5% (2) Pulse width limited by safe operating area (3) C
oss eq
Source-drain Current
SD
(2)
Source-drain Current (pulsed)
(1)
Forward On Voltage
t
Reverse Recovery Time
rr
Reverse Recovery Charge
rr
Reverse Recovery Current
t
Reverse Recovery Time
rr
Reverse Recovery Charge
rr
Reverse Recovery Current
. is defined as a constant equivalent capacitance giving the same charging time as C
ISD = 1.6 A, VGS = 0 I
= 1.6, di/dt = 100 A/µs
SD
=50 V, Tj = 25°C
V
DD
(see Figure 18) I
= 1.6, di/dt = 100 A/µs
SD
= 50 V, Tj = 150°C
V
DD
(see Figure 18)
334 918
350
1050
when VDS increases from 0 to 80% V
oss
1.6
6.4
1.6 V
5.5
6
A A
ns
µC
A
ns
µC
A
3/12
DSS
STD2NK70Z - STD2NK70Z-1

Figure 3: Safe Operating Area

Figure 4: Output Characteristics

Figure 6: Thermal Impedance

Figure 7: Transfer Characteristics

Figure 5: Transconductance

4/12

Figure 8: Static Drain-source On Resistance

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