STD26P3LLH6
DPAK
D(2 or TAB)
G(1)
S(3)
AM11258v1
P-channel 30 V, 0.024 Ω typ., 12 A, STripFET™ VI DeepGATE™
Power MOSFET in a DPAK package
Datasheet - production data
Features
R
TAB
Order code V
3
2
1
STD26P3LLH6 30 V 0.030 Ω
1. @ VGS= 10 V
• R
* Qg industry benchmark
DS(on)
DSS
• Extremely low on-resistance R
• High avalanche ruggedness
• Low gate input resistance
DS(on)
max
I
(1)
12 A 40 W
DS(on)
P
D
TOT
Figure 1. Internal schematic diagram
Applications
• Switching applications
• LCC converters, resonant converters
Description
This device is a P-channel Power MOSFET
developed using the 6
DeepGATE™ technology, with a new gate
structure. The resulting Power MOSFET exhibits
the lowest R
Table 1. Device summary
Order code Marking Package Packaging
STD26P3LLH6 26P3LLH6 DPAK Tape and reel
DS(on)
th
generation of STripFET™
in all packages
Note: For the P-channel Power MOSFETs the actual polarity of the voltages and the current must
be reversed.
February 2014 DocID023574 Rev 5 1/16
This is information on a product in full production.
www.st.com
Contents STD26P3LLH6
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2/16 DocID023574 Rev 5
STD26P3LLH6 Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
V
I
D
I
D
I
DM
P
TOT
T
T
1. Limited by wire bonding.
2. Pulse width limited by safe operating area.
Drain-source voltage 30 V
DS
Gate-source voltage ±20 V
GS
(1)
Drain current (continuous) at TC = 25 °C 12 A
(1)
Drain current (continuous) at TC = 100 °C 8.5 A
(1)(2)
Drain current (pulsed) 48 A
(1)
Total dissipation at TC = 25 °C 40 W
Storage temperature -55 to 175 °C
stg
Max. operating junction temperature 175 °C
j
Table 3. Thermal data
Symbol Parameter Value Unit
R
thj-case
Thermal resistance junction-case max 3.75 °C/W
T able 4. Avalanche characteristics
Symbol Parameter Value Unit
Single pulse avalanche energy
E
AS
(starting T
=10 V)
V
gs
=25 °C, ID=6 A, IAS=12 A, VDD=25 V,
J
350 mJ
Note: For the P-channel Power MOSFETs the actual polarity of the voltages and the current must
be reversed.
DocID023574 Rev 5 3/16
16
Electrical characteristics STD26P3LLH6
2 Electrical characteristics
(T
= 25 °C unless otherwise specified)
CASE
Table 5. Static
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source breakdown
Voltage
Zero gate voltage drain
current (V
GS
= 0)
Gate body leakage current V
Gate threshold voltage V
Static drain-source onresistance
ID = 250 μA, VGS= 0 30 V
V
= 30 V 1 μA
DS
V
= 30 V, Tc = 125 °C 10 μA
DS
= ± 20 V, (VDS = 0)
GS
= VGS, ID = 250 μA1 2.5V
DS
V
= 10 V, ID = 6 A 0.024 0.03 Ω
GS
V
= 4.5 V, ID = 6 A 0.038 0.045 Ω
GS
±
100 nA
Table 6. Dynamic
Symbol Parameter Test conditions Min Typ. Max. Unit
C
C
C
Input capacitance
iss
= 25 V, f=1 MHz,
Output capacitance - 178 - pF
oss
Reverse transfer
rss
capacitance
V
DS
V
= 0
GS
- 1450 - pF
-120-pF
Q
Q
Q
Total gate charge
g
Gate-source charge - 4.4 - nC
gs
Gate-drain charge - 5 - nC
gd
V
= 24 V, ID = 12 A
DD
V
= 4.5 V
GS
(see Figure 14)
-12-nC
f = 1 MHz , gat e DC
R
Gate input resistance
g
Bias = 0,
test signal level = 20 mV,
= 0
I
D
-1.8 -Ω
Note: For the P-channel Power MOSFETs the actual polarity of the voltages and the current must
be reversed.
4/16 DocID023574 Rev 5
STD26P3LLH6 Electrical chara ct er istics
Table 7. Switching on/off (inductive load)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
Turn-on delay time
= 24 V, ID = 1.5 A,
V
t
Rise time - 15 - ns
r
Turn-off delay time - 24 - ns
t
Fall time - 21 - ns
f
DD
R
= 4.7 Ω, V
G
(see Figure 13)
GS
= 10 V
-15 - ns
Table 8. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%
Source-drain current - 12 A
(1)
Source-drain current (pulsed) - 48 A
(2)
Forward on voltage I
Reverse recovery time I
rr
Reverse recovery charge - 6.5 nC
rr
Reverse recovery current - 0.9 A
= 12 A, V
SD
SD
= 12 A,
GS
di/dt = 100 A/μs,
= 16 V
V
DD
(see Figure 15)
= 0 - 1.1 V
-15 ns
Note: For the P-channel Power MOSFETs the actual polarity of the voltages and the current must
be reversed.
DocID023574 Rev 5 5/16
16
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