N-CHANNEL 800V - 13 Ω - 1 A TO-92 /SOT-223/DPAK/IPAK
Zener - Protected SuperMESH™ MOSFET
Table 1: General Features
TYPEV
STQ1NK80ZR-AP
STN1NK80Z
STD1NK80Z
STD1NK80Z-1
■ TYPICAL R
■ EXTREMELY HIGH dv /d t CAPABILITY
■ ESD IMPROVED CAPABILITY
■ 100% AVALANCHE TESTED
■ NEW HIGH VOLTAGE BENCHMARK
■ GATE CHARGE MINIMIZED
DS
DSSRDS(on)
800 V
800 V
800 V
800 V
(on) = 13Ω
< 16 Ω
< 16 Ω
< 16 Ω
< 16 Ω
I
D
0.3 A
0.25A
1.0 A
1.0 A
Pw
3 W
2.5 W
45 W
45 W
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding applications. Such series
complements ST full range of high voltage MOS
Operating Junction Temperature
Storage Temperature
-55 to 150°C
TO-92SOT-223DPAK/IPAKUnit
Thermal Resistance Junction-lead Max40----°C/W
Maximum Lead Temperature For Soldering
260--300°C
Purpose
Table 5: Avalanche Characteristics
SymbolParameterMax ValueUnit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
1A
(pulse width limited by Tj max)
E
AS
Single Pulse Avalanche Energy
50mJ
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Table 6: GATE-SOURCE ZENER DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs=± 1mA (Open
Drain)
30V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These
packages have a Lead-free second level interconnect . The category of second level interconnect is
marked on the package and on the inner box label, i n compliance with JEDEC Standard JESD97. The
maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an
ST trademark. ECOPACK specifications are available at:
nformation furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequence
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y implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subjec
o change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are no
uthorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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