STQ1NK80ZR-AP - STN1NK80Z
1
2
3
3
3
STD1NK80Z - STD1NK80Z-1
N-CHANNEL 800V - 13 Ω - 1 A TO-92 /SOT-223/DPAK/IPAK
Zener - Protected SuperMESH™ MOSFET
Table 1: General Features
TYPE V
STQ1NK80ZR-AP
STN1NK80Z
STD1NK80Z
STD1NK80Z-1
■ TYPICAL R
■ EXTREMELY HIGH dv /d t CAPABILITY
■ ESD IMPROVED CAPABILITY
■ 100% AVALANCHE TESTED
■ NEW HIGH VOLTAGE BENCHMARK
■ GATE CHARGE MINIMIZED
DS
DSSRDS(on)
800 V
800 V
800 V
800 V
(on) = 13Ω
< 16 Ω
< 16 Ω
< 16 Ω
< 16 Ω
I
D
0.3 A
0.25A
1.0 A
1.0 A
Pw
3 W
2.5 W
45 W
45 W
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding applications. Such series
complements ST full range of high voltage MOS
-
FET s including revolutionary MDmesh™ products.
Figure 1: Package
TO-92 (Ammopack)
1
DPAK
SOT-223
IPAK
Figure 2: Internal Schematic Diagram
2
2
1
APPLICATIONS
■ AC ADAPTORS AND BATTERY CHARGERS
■ SWITH MODE POWER SUPPLI ES ( SMPS)
Table 2: Order Codes
SALES TYPE MARKING PACKAGE PACKAGING
STQ1NK80ZR-AP Q1NK80ZR TO-92 AMMOPAK
STN1NK80Z N1NK80Z SOT-223 TAPE & REEL
STD1NK80ZT4 D1NK80Z DPAK TAPE & REEL
STD1NK80Z-1 D1NK80Z IPAK TUBE
Rev. 3
1/15January 2006
STQ1NK80ZR-AP - STN1NK80Z - STD1NK80Z - STD1NK80Z-1
Table 3: Absolute Maximum ratings
Symbol Parameter Value Unit
TO-92 SOT-223 DPAK/IPAK
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
V
ESD(G-S)
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
T
j
T
stg
() Pulse wi dt h l i m i ted by safe operating area
(1) ISD ≤ 1 A, d i/dt ≤ 200 A/µs, VDD ≤ 640
Table 4: Thermal Data
Rthj-case Thermal Resistance Junction-case Max -- -- 2.78 °C/W
Rthj-amb(#) Thermal Resistance Junction-ambient Max 120 50 100 °C/W
Rthj-lead
T
l
(#) When m ounted on 1in ch² FR-4 BOARD, 2 oz Cu
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
800 V
800 V
Gate- source Voltage ± 30 V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
()
Drain Current (pulsed) 5 A
Total Dissipation at TC = 25°C
0.3 0.25 1.0 A
0.19 0.16 0.63 A
3 2.5 45 W
Derating Factor 0.025 0.02 0.36 W /°C
Gate source ESD (HBM-C= 100pF, R= 1.5KΩ) 1000 V
Operating Junction Temperature
Storage Temperature
-55 to 150 °C
TO-92 SOT-223 DPAK/IPAK Unit
Thermal Resistance Junction-lead Max 40 -- -- °C/W
Maximum Lead Temperature For Soldering
260 -- 300 °C
Purpose
Table 5: Avalanche Characteristics
Symbol Parameter Max Value Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
1 A
(pulse width limited by Tj max)
E
AS
Single Pulse Avalanche Energy
50 mJ
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Table 6: GATE-SOURCE ZENER DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs=± 1mA (Open
Drain)
30 V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
2/15
STQ1NK80ZR-AP - STN1NK80Z - STD1NK80Z - STD1NK80Z-1
ELECTRICAL CHARACTERISTICS (T
=25°C UNLESS OTHERWISE SPECIFIED)
CASE
Table 7: On/Off
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID = 1 mA, VGS = 0 800 V
Breakdown Voltage
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (VGS = 0)
Gate-body Leaka ge
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
VGS = ± 20V ±10 µA
Current (VDS = 0)
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
VDS = VGS, ID = 50 µA
3 3.75 4.5 V
VGS = 10V, ID = 0.5 A 13 16 Ω
Resistance
Table 8: Dynamic
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(1) Forward Transconductance VDS = 15 V, ID = 0.5 A 0.8 S
fs
C
oss eq.
C
C
C
t
d(on)
t
d(off)
Q
Q
Q
iss
oss
rss
t
r
t
gs
gd
f
g
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
(3) Equivalent Outpu t
Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDS = 25 V, f = 1 MHz, VGS = 0 160
26
6.7
VGS = 0V, VDS = 0V to 640V 9.5 pF
VDD = 400 V, ID = 0.5 A
RG = 4.7Ω VGS = 10 V
(see Figure 21)
8
30
22
55
VDD = 640V, ID = 1.0 A,
VGS = 10V
(see Figure 24)
7.7
1.4
4.5
µA
µA
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Table 9: Source Drain Diode
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
(2)
SDM
VSD (1)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: P ul se duration = 300 µs, d ut y cy cle 1.5 %.
2. Pulse wi dt h l i m ited by safe op erating area.
3. C
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
V
DSS
ISD = 1.0 A, VGS = 0
ISD = 1.0 A, di/dt = 100 A/µs
VDD = 50 V, Tj = 25°C
(see Figure 22)
ISD = 1.0 A, di/dt = 100 A/µs
VDD = 50 V, Tj = 150°C
(see Figure 22)
365
802
4.4
388
802.7
4.6
when VDS increases from 0 to 80%
oss
1.0
5
1.6 V
A
A
ns
nC
A
ns
nC
A
3/15
STQ1NK80ZR-AP - STN1NK80Z - STD1NK80Z - STD1NK80Z-1
Figure 3: Safe Operating Area for SOT-223
Figure 4: Safe Operating Area for TO-92
Figure 6: Thermal Impedan ce for SO T-223
Figure 7: Th erm al Impedan c e for TO-92
Figure 5: Safe Operating Area for IPAK-DPAK
4/15
Figure 8: Thermal Impedance for DPAK-IPAK
STQ1NK80ZR-AP - STN1NK80Z - STD1NK80Z - STD1NK80Z-1
Figure 9: Output Characteristics
Figure 10: Transconductance
Figure 12: Transfer Characteristics
Figure 13: Static Drain-source On Resistance
Figure 11: Gate Charge vs Gate-source Voltage
Figure 14: Capacitance Variations
5/15
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