STMicroelectronics STP12NK80Z, STB12NK80Z, STW12NK80Z Technical data
STP12NK80Z - STB12NK80Z
STW12NK80Z
N-CHANNEL 800V - 0.65Ω - 10.5A TO-220 / D2PAK / TO-247
Zener-Protected SuperMESH™Power MOSF ET
TYPE V
STP12NK80Z
STB12NK80Z
STW12NK80Z
■ TYPICAL R
■ EXTREMELY HIGH dv/dt CAPABILITY
■ 100% AVALANCHE TESTED
■ GATE CHARGE MINIMIZED
■ VERY LOW INTRINSIC CAPACITANCES
■ VERY GOOD MANUFACTURING
800 V
800 V
800 V
(on) = 0.65 Ω
DS
DSS
R
DS(on)
<0.75Ω
<0.75Ω
<0.75Ω
I
D
10.5 A
10.5 A
10.5 A
Pw
190 W
190 W
190 W
REPEATIBILITY
DESCRIPTION
The SuperM ESH™ s eries is obtained through an
extreme optimization of ST’s we ll established stripbased PowerMESH™ layout. In addition to pus hing
on-resistance significantly down,specialcareis taken to ensure a ver y good dv/dt capab ility for the
most dem anding applications. Such series c omplements ST full range of high voltage MOSFETs including revolutionary MDm es h™ products.
3
2
1
TO-220
2
1
D2PAK
3
TO-247
INTERNAL SCHEMATIC DIAGRAM
3
1
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ IDEAL FOR OFF-LINE POWER SUPPLIES
ORDERING INFORMATION
SALES TYPE MARKING PACKAGE PACKAGING
STP12NK80Z P12NK80Z TO-220 TUBE
STB12NK80ZT4 B12NK80Z
STW12NK80Z W12NK80Z TO-247 TUBE
2
PAK
D
TAPE & REEL
1/12February 2004
STP12NK80Z - STB12NK80Z - STW12NK80Z
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
D
IDM()
P
TOT
V
ESD(G-S)
dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns
T
j
T
stg
() Pulse width limited by safe operating area
≤ 10.5A,di/dt ≤200A/µs, VDD≤ V
(1) I
SD
(*) Limited only by ma ximum temperature allowed
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max 0.66 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 50 °C/W
T
l
Drain-source Voltage (VGS=0)
Drain-gate Voltage (RGS=20kΩ)
800 V
800 V
Gate- source Voltage ± 30 V
Drain Current (continuous) at TC=25°C
Drain Current (continuous) at TC = 100°C
10.5 A
6.6 A
Drain Current (pulsed) 42 A
Total Dissipation at TC=25°C
190 W
Derating Factor 1.51 W/°C
Gate source ESD(HBM-C=100pF, R=1.5KΩ) 6000 V
Operating Junction Temperature
Storage Temperature
(BR)DSS,Tj
≤ T
JMAX.
-55 to 150 °C
TO-220/ D²PAK TO-247
Maximum Lead Temperature For Soldering Purpose 300
°C
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
=25°C, ID=IAR,VDD=50V)
j
10.5 A
400 mJ
GATE-SOURCE ZENER DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BV
GSO
Gate-Source Breakdown
Igs=± 1mA (Open Drain) 30 V
Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD c apability, but also to make them safely absorb pos sible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to prote ct the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
2/12
STP12NK80Z - STB 12N K80 Z - STW12NK80Z
ELECTRICAL CHARACTERISTICS (T
=25°C UNLESS OTHERWISE SPECIFIED)
CASE
ON/OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID=1mA,VGS= 0 800 V
Breakdown Voltage
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Zero Gate Voltage
Drain Current (V
GS
=0)
Gate-body Leakage
Current (V
DS
=0)
Gate Threshold Voltage
Static Drain-source On
V
=MaxRating
DS
=MaxRating,TC= 125 °C
V
DS
V
= ± 20V ±10 µA
GS
V
DS=VGS,ID
= 100 µA
3 3.75 4.5 V
1
50
VGS=10V,ID= 5.25 A 0.65 0.75 Ω
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
(1) Forward Transconductance VDS=15V,ID=5.25A 12 S
fs
C
oss eq.
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
(3) Equivalent Output
=25V,f=1MHz,VGS= 0 2620
V
DS
250
53
VGS=0V,VDS= 0V to 640V 100 pF
Capacitance
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
Q
Q
Q
Turn-on Delay Time
t
r
g
gs
gd
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD=400V,ID=5.25A
R
=4.7Ω VGS=10V
G
(Resistive Load see, Figure 3)
=640V,ID= 10.5 A,
V
DD
V
=10V
GS
30
18
87
14
44
µA
µA
pF
pF
pF
ns
ns
nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
Turn-off Delay Time
t
f
FallTime
VDD=400V,ID=5.25A
R
=4.7Ω VGS=10V
G
70
20
(Resistive Load see, Figure 3)
t
r(Voff)
t
f
t
c
FallTime
Cross-over Time
Off-voltage Rise Time
=640V,ID=10.5A,
V
DD
RG=4.7Ω, VGS= 10V
(Inductive Loadsee, Figure5)
16
15
28
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD(1)
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
Source-drain Current
(2)
Source-drain Current (pulsed)
ForwardOnVoltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
.
V
DSS
ISD=10.5A,VGS=0
I
SD
V
DD
(see test circuit, Figure 5)
= 10.5 A, di/dt = 100A/µs
=100V,Tj=150°C
635
5.9
18.5
when VDSincreases from 0 to 80%
oss
10.5
42
1.6 V
ns
ns
ns
ns
ns
A
A
ns
µC
A
3/12
STP12NK80Z - STB12NK80Z - STW12NK80Z
Safe Operating Area for To-220/ D²P A K
Safe Operating Area for To-247
Thermal Impedance for To-220/D²PAK
Thermal Impedance for To-247
Output Characteristics
4/12
Transfer Characteristics
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