Standard Software Driver for C55 Flash module embedded on
SPC57 K, L and S line microcontroller
Introduction
This document is the user manual for the Standard Software Driver (SSD) for single C55
Flash module integrated in SPC574Kxx, SPC572Lxx, SPC570Sxx and SPC574Sxx
devices.
The SSD is a set of APIs that ena
embedded on a microcontroller. The C55 SSD contains a set of functions to program/erase
a single C55 Flash module.
The C55 Standard Software Driver (
F
lashInit
FlashErase
FlashEraseAlternate
BlankCheck
FlashProgram
ProgramVerify
CheckSum
FlashCheckStatus
FlashSuspend
FlashResume
GetLock
SetLock
OverPgmProtGetStatus
FlashArrayIntegrityCheck
FlashArrayIntegritySuspend
FlashArrayIntegrityResume
UserMarginReadCheck
bles user application to operate on the Flash module
Section 1.2 shows the features of the driver. Appendix C: System requirements details the
system requirement for the driver development.Appendix E: Document references and lists
the documents referred and terms used in making of this document. Appendix D: Acronyms
lists the acronyms used.
Chapter 2 describes the API specifications. In this section there are many sub sections,
which describe the different aspects of the driver. Section 2.1 provides a general overview of
the driver. Section 2.2 mentions about the type definitions used for the driver. Section 2.3
mentions the driver configuration parameters. Section 2.4 and Section 2.5 describe the data
context structure and some other data structures used in this driver. Section 2.6 provides
return code information. Section 2.7 and Section 2.8 provide the detailed description of
normal mode and user’s test mode standard software Flash Driver APIs’ respectively.
1.2 Features
The C55 SSD provides the following features:
Driver binary built with Variable-Length-Encoding (VLE) instruction set.
Driver released in binary c-array format to provide compiler-independent support for
non-debug-mode embedded applications.
Driver released in s-record format to provide compiler-independent support for debug-
mode/JTAG programming tools.
Each driver function is independent of each other so the end user can choose the
function subset to meet their particular needs.
Support from word-wise to quad-page-wise programming according to specific
hardware feature for fast programming.
Position-independent and ROM-able
Ready-to-use demos illustrating the usage of the driver
Concurrency support via asynchronous design.
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2 API specification
2.1 General overview
The C55 SSD has APIs to handle the erase, program, erase verify and program verify
operations on the Flash. Apart from these, it also provides the feature for locking specific
blocks and calculating check sum. This SSD also provides four User Test APIs for checking
the Array Integrity and do user margin read check as well as do suspend/resume those
operations. All functions work as asynchronous model for concurrency event support by
invoking ‘FlashCheckStatus’ function to track the on-going status of targeted operation.
2.2 General type definitions
Derived typeSizeC language type description
BOOL8-bitsunsigned char
INT88-bitssigned char
VINT88-bitsvolatile signed char
UINT88-bitsunsigned char
VUINT88-bitsvolatile unsigned char
INT1616-bitssigned short
VINT1616-bitsvolatile signed short
UINT1616-bitsunsigned short
VUINT1616-bitsvolatile unsigned short
INT3232-bitssigned long
VINT3232-bitsvolatile signed long
UINT3232-bitsunsigned long
VUINT3232-bitsvolatile unsigned long
Table 1. Type definitions
2.3 SSD configuration parameter
The configuration parameter which is used for SSD operations is explained in this section.
The configuration parameters are handled as structure. User should correctly initialize the
fields including c55RegBase, mainArrayBase, uTestArrayBase,, mainInterfaceFlag, programmableSize and BDMEnable before passing the structure to SSD functions. The rest
of parameters such as lowBlockInfo, midBlockInfo, highBlockInfo and nLargeBlockNum, are
initialized by ‘FlashInit’ automatically and can be used for other purposes of user’s
application.
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Parameter nameTypeParameter description
c55RegBaseUINT32The base address of C55 control registers.
mainArrayBaseUINT32The base address of Flash main array.
lowBlockInfoBLOCK_INFO
midBlockInfoBLOCK_INFO
highBlockInfoBLOCK_INFO
nLargeBlockNumUINT32
uTestArrayBaseUINT32The base address of the UTest block.
mainInterfaceFlagBOOLThe flag to select main interface or not.
programmableSizeUINT32
BDMEnableBOOL
Table 2. SSD configuration structure field definition
Block info of the low address space. It includes
information of this block space based on different block
sizes.
Block info of the mid address space. It includes
information of this block space based on different block
sizes.
Block info of the high address space. It includes
information of this block space based on different block
sizes.
Number of blocks of the large address space (128K or
256K).
The maximum programmable size of the C55 Flash
according to specific interface.
The debug mode selection. User can enable/disable
debug mode via this input argument.
The type definition for the structure is given below.
typedef struct _c55_ssd_config
{
UINT32 c55RegBase;
UINT32 mainArrayBase;
BLOCK_INFO lowBlockInfo;
BLOCK_INFO midBlockInfo;
BLOCK_INFO highBlockInfo;
UINT32 nLargeBlockNum;
UINT32 uTestArrayBase;
BOOL mainInterfaceFlag;
UINT32 programmableSize;
BOOL BDMEnable;
} SSD_CONFIG, *PSSD_CONFIG;
2.4 Context data structure
The Context Data structure is used for storing the context variable values while an
operation is in-progress. The operations that support asynchronous model may
require caching the context data including ‘FlashProgram’, ‘ProgramVerify’,
‘BlankCheck’, ‘CheckSum’, ‘FlashArrayIntegrityCheck’, and
‘UserMarginReadCheck’
. User needs to declare and initialize a context data
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structure before passing it to the above SSD functions. Refer to ‘FlashCheckStatus’
to have a quick view of how to initialize the context data. The context data structure
contents can be reviewed at any time during the operation progress (these
information may be useful in some cases), but they must not be changed for any
reason in order to make the operation completes correctly.
NameDescription
destThe context destination address of an operation
sizeThe context size of an operation
sourceThe context source of an operation
pFailedAddressThe context failed address of an operation
pFailedDataThe context failed data of an operation
pFailedSourceThe context failed source of an operation
pSumThe context sum of an operation
pMisrThe context MISR values of an operation
pReqCompletionFnFunction pointer to the Flash function being checked for status
Table 3. Context data structure field definitions
The type definition for the structure is given below.
typedef struct _c55_context_data
{
UINT32 dest;
UINT32 size;
UINT32 source;
UINT32 *pFailedAddress;
UINT32 *pFailedData;
UINT32 *pFailedSource;
UINT32 *pSum;
MISR *pMisr;
void* pReqCompletionFn;
} CONTEXT_DATA, *PCONTEXT_DATA;
2.5 Other data structures
Some other data structures used for SSD operation is explained in this section. They are the
structures used for variable declaration in SSD configuration and context data structures or
input argument declaration in some APIs.
Table 4. Block information structure field definitions
NameTypeDefinition
n16KBlockNumUINT32Number of 16K block.
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Table 4. Block information structure field definitions (continued)
NameTypeDefinition
n32KBlockNumUINT32Number of 32K block.
n64KBlockNumUINT32Number of 64K block.
The type definition for the structure is given below:
typedef struct _c55_block_info
{
UINT32 n16KBlockNum;
UINT32 n32KBlockNum;
UINT32 n64KBlockNum;
} BLOCK_INFO, *PBLOCK_INFO;
firstLargeBlockSelectUINT32
secondLargeBlockSelectUINT32
Table 5. Large block select structure field definitions
NameTypeDefinition
Bit map for the first 32 bit block select (from bit 0 to bit
31) in Large block (128K or 256K block) space such that
bit 0 is corresponding to the least significant bit and bit
31 is corresponding to the most significant bit.
Bit map for the second 32 bit block select (from bit 32 to
upper bits) in Large block (128K or 256K block) space
such that bit 32 is corresponding to the least significant
bit and bit 63 is corresponding to the most significant bit.
The type definition for the structure is given below:
typedef struct _c55_nLarge_block_sel
{
UINT32 firstLargeBlockSelect;
UINT32 secondLargeBlockSelect;
} NLARGE_BLOCK_SEL, *PNLARGE_BLOCK_SEL;
Table 6. MISR structure field definitions
NameTypeDefinition
Wn
n = 0, 1, …9
UINT32
Each Wn is corresponding to each MISR value provided by
user. User must provide totally ten MISR values via this
structure to do user’s test mode functions.
The type definition for the structure is given below:
typedef struct _c55_misr
{
UINT32 w0;
UINT32 w1;
UINT32 w2;
UINT32 w3;
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UINT32 w4;
UINT32 w5;
UINT32 w6;
UINT32 w7;
UINT32 w8;
UINT32 w9;
} MISR, *PMISR;
2.6 Return codes
The return code is returned to the caller function to notify the success or errors of the API
execution. These are the possible values of return code:
NameValueDescription
C55_OK0x00000000The requested operation is successful.
C55_ERROR_ALIGNMENT0x00000001Alignment error.
C55_ERROR_BUSY0x00000004
C55_ERROR_PGOOD0x00000008The program operation is unsuccessful.
C55_ERROR_EGOOD0x00000010The erase operation is unsuccessful.
Table 7. Return codes
New program/erase cannot be performed
while a high voltage operation is already in
progress.
New array integrity cannot be performed
while an array integrity is going on.
C55_ERROR_NOT_BLANK0x00000020
There is a non-blank Flash memory location
within the checked Flash memory region.
There is a mismatch between the source data
C55_ERROR_VERIFY0x00000040
and the content in the checked Flash
memory.
C55_ERROR_BLOCK_INDICATOR0x00000080Invalid block space indicator.
C55_ERROR_ALTERNATE0x00000100
The operation does not support alternate
interface for the specified address space.
C55_ERROR_FACTORY_OP0x00000200Factory erase/program is locked.
In ‘FlashArrayIntegrityCheck’ or
C55_ERROR_MISMATCH0x00000400
‘UserMarginReadCheck’, the MISR values
generated by the hardware do not match the
values passed by the user.
more this operation requested on
FlashCheckStatus function.
The operation is in progress and user need
call FlashCheckStatus more times finish this
operation.
2.7 Normal mode functions
2.7.1 FlashInit
Description
This function initializes an individual Flash module. It accesses to Flash configuration
register and read out the number of block for each memory space of single Flash module.
For each time of using this driver, user must provide the chip-dependent
parameters such as c55RegBase, mainArrayBase, uTestArrayBase, mainInterfaceFlag, programmableSize and DBMEnable and the rest of parameters
are initialized via this function. Those are block information including number of
block based on block size for each address space.
Prototype
UINT32 FlashInit (PSSD_CONFIG pSSDConfig);
Arguments
ArgumentDescriptionRange
pSSDConfig
Pointer to the SSD
Configuration Structure.
Table 8. Arguments for FlashInit
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
Return values
TypeDescriptionPossible values
UINT32Indicates successful completion of operation. C55_OK
Table 9. Return values for FlashInit
Troubleshooting
None.
Comments
In case of mainInterfaceFlag is main interface, ‘FlashInit’ checks the C55_MCR_RWE,
C55_MCR_EER and C55_MCR_SBC bits, and then clear them if any of them is set.
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This function also clears PGM/ERS bit in MCR/MCRA register if any of them is set.
Assumptions
None.
2.7.2 FlashErase
Description
This function is to do erase operation for multi-blocks on single Flash module according to
user’s input arguments via main interface. The targeted Flash module status is checked in
advance to return relevant error code if any. This function only sets the high voltage without
waiting for the operation to be finished. Instead, user must call ‘FlashCheckStatus’ function
to confirm the successful completion of this operation.
Prototype
UINT32 FlashErase(PSSD_CONFIG pSSDConfig,
UINT8 eraseOption,
UINT32 lowBlockSelect,
UINT32 midBlockSelect,
UINT32 highBlockSelect,
NLARGEK_BLOCK_SEL nLargeBlockSelect);
Arguments
ArgumentDescriptionRange
pSSDConfig
eraseOption
lowBlockSelect
Table 10. Arguments for FlashErase
Pointer to the SSD
Configuration Structure.
The option is to select
user’s expected erase
operation.
To select the array blocks
in low address space for
erasing.
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
The valid value can be:
C55_ERASE_MAIN (0x0)
C55_ERASE_MAIN_FERS (0x1)
C55_ERASE_UTEST (0x2)
C55_ERASE_UTEST_FERS (0x3)
Bit-mapped value such that the least significant
bit is at bit 0 of 16K block region (if available),
then 32K block region (if available) and lastly
64K block region (if available). Select the block
in the low address space to be erased by setting
1 to the appropriate bit of lowBlockSelect. If
there is not any block to be erased in the low
address space, lowBlockSelect must be set to 0.
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Table 10. Arguments for FlashErase (continued)
ArgumentDescriptionRange
Bit-mapped value such that the least significant
bit is at bit 0 of 16K block region (if available),
then 32K block region (if available) and lastly
midBlockSelect
highBlockSelect
To select the array blocks
in mid address space for
erasing.
To select the array blocks
in high address space for
erasing.
64K block region (if available). Select the block
in the middle address space to be erased by
setting 1 to the appropriate bit of
midBlockSelect. If there is not any block to be
erased in the middle address space,
midBlockSelect must be set to 0.
Bit-mapped value such that the least significant
bit is at bit 0 of 16K block region (if available),
then 32K block region (if available) and lastly
64K block region (if available). Select the block
in the high address space to be erased by
setting 1 to the appropriate bit of
highBlockSelect. If there is not any block to be
erased in the high address space,
highBlockSelect must be set to 0.
nLargeBlockSelect
To select the array blocks
in Large (128K or 256K)
address space for erasing.
It includes two elements to
decode the first half of
Large block select and the
second half of Large block
select.
Bit-mapped value such that the least significant
bit is at bit 0 of Large block region (if available).
Select the block in the Large address space to
be erased by setting 1 to the appropriate bit of
because there is
program/erase sequence in
progress on the Flash
module.
The factory erase could not
be performed.
Use one of the valid values for the
option.
Wait until all previous program/erase
operations on the Flash module
finish. Possible cases that erase
cannot start are:
– erase in progress (MCR-ERS is
high);
– program in progress (MCR-PGM
is high);
Factory erase is locked by the
system due to the data at the UTest
NVM ‘diary’ location.
Comments
'FlashErase' always uses main interface to complete an erase operation and ignores the
value of the ‘mainInterfaceFlag’ in the SSD configuration structure. However, it is
recommended that user should explicitly set this flag value to TRUE before calling
'FlashErase'.
The eraseOption input argument provides an option for user to select his expected erase
operation. If user wants to do factory erase, he must select eraseOption as
C55_ERASE_MAIN_FERS or C55_ERASE_UTEST_FERS. If user wants to do normal
erase operation on main array, eraseOption must be C55_ERASE_MAIN and lastly, user
must select C55_ERASE_UTEST to do erase operation on UTest block.
The factory erase feature can be used to provide a faster erase. But the feature cannot be
performed if the data at “diary” location in the UTest NVM space contains at least one zero
at reset. In that case, each try to perform factory erase causes the error
C55_ERROR_FACTORY_OP be returned.
The inputs lowBlockSelect, midBlockSelect, highBlockSelect and nLargeBlockSelect are
bit-mapped arguments that are used to select the blocks to be erased in the
Low/Mid/High/Large address spaces of main array. The selection of the blocks of the main
array is determined by setting/clearing the corresponding bit in lowBlockSelect,
midBlockSelect, highBlockSelect or nLargeBlockSelect.
The bit allocations for blocks in one address space are: the least significant bit is
corresponding to 16K block region and start with block 0 (if available), then 32K block region
(if available), then 64K block region (if available), and lastly 8K block region (if available).
The following diagrams show the formats of lowBlockSelect, midBlockSelect, highBlockSelect and nLargeBlockSelect for the C55 module.
The Large block select includes two elements to decode the block selection for first 32
blocks (from bit 0 to bit 31) and second 32 blocks (from bit 32 to upper bits) separately.
Below is example for block allocation and bit map for specific Flash module with two blocks
for each block size in low, middle or high address space. The invalid blocks are marked as
reserved. And the number of valid bits may be various according to specific Flash module.
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Table 13. Bit allocation for blocks in low address space
If the selected main array blocks or UTest block are locked for erasing, those blocks are not
erased, but ‘FlashErase’ still returns C55_OK. User needs to check the erasing result with
the ‘BlankCheck’ function.
It is impossible to erase any Flash block when a program or erase operation is already in
progress on C55 module. ‘FlashErase’ returns C55_ERROR_BUSY when trying to do so. In
addition, when ‘FlashErase’ is running, it is unsafe to read the data from the Flash partitions
having one or more blocks being erased. Otherwise, it causes a Read-While-Write error.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit’ API.
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