STMicroelectronics M74HC139 Technical data

M74HC139

DUAL 2 TO 4 DECODER/DEMULTIPLEXER

HIGH SPEED:

tPD = 13ns (TYP.) at VCC = 6V

LOW POWER DISSIPATION: ICC = 4μA(MAX.) at TA=25°C

HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.)

SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

BALANCED PROPAGATION DELAYS: tPLH tPHL

WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V

PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 139

DESCRIPTION

DIP

SOP

TSSOP

 

 

ORDER CODES

 

PACKAGE

 

TUBE

T & R

 

 

 

 

DIP

 

M74HC139B1R

 

 

 

 

 

SOP

 

M74HC139M1R

M74HC139RM13TR

 

 

 

 

TSSOP

 

 

M74HC139TTR

 

 

 

 

The M74HC139 is an high speed CMOS QUAD 2-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

The active low enable input can be used for gating or as a data input for demultiplexing applications.

While the enable input is held high, all four outputs are high independently of the other inputs.

All inputs are equipped with protection circuits against static discharge and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 2001

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STMicroelectronics M74HC139 Technical data

M74HC139

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

 

 

PIN No

SYMBOL

NAME AND FUNCTION

 

1, 15

1G, 2G

Enable Inputs

 

2, 3

1A, 1B

Address Inputs

 

4, 5, 6, 7

1Y0 TO 1Y3

Outputs

 

12, 11, 10, 9

2Y0 TO 2Y3

Outputs

 

14, 13

2A, 2B

Address Inputs

 

8

GND

Ground (0V)

 

16

VCC

Positive Supply Voltage

TRUTH TABLE

 

 

INPUTS

 

 

 

 

OUTPUTS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SELECTED

ENABLE

SELECT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OUTPUT

Y0

 

Y1

 

Y2

 

Y3

 

 

 

 

 

 

 

 

 

 

G

B

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

X

X

 

H

 

H

 

H

 

H

NONE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

L

L

 

L

 

H

 

H

 

H

 

Y

0

 

L

L

H

 

H

 

L

 

H

 

H

 

Y

1

 

L

H

L

 

H

 

H

 

L

 

H

 

Y2

 

L

H

H

 

H

 

H

 

H

 

L

 

Y

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays

2/9

 

 

 

M74HC139

ABSOLUTE MAXIMUM RATINGS

 

 

 

 

 

 

 

 

Symbol

Parameter

Value

 

Unit

 

 

 

 

 

VCC

Supply Voltage

-0.5 to +7

 

V

VI

DC Input Voltage

-0.5 to VCC + 0.5

 

V

VO

DC Output Voltage

-0.5 to VCC + 0.5

 

V

IIK

DC Input Diode Current

± 20

 

mA

IOK

DC Output Diode Current

± 20

 

mA

IO

DC Output Current

± 25

 

mA

ICC or IGND

DC VCC or Ground Current

± 50

 

mA

PD

Power Dissipation

500(*)

 

mW

Tstg

Storage Temperature

-65 to +150

 

°C

TL

Lead Temperature (10 sec)

300

 

°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C

RECOMMENDED OPERATING CONDITIONS

Symbol

 

Parameter

Value

Unit

 

 

 

 

 

 

VCC

Supply Voltage

 

 

2 to 6

V

VI

Input Voltage

 

 

0 to VCC

V

VO

Output Voltage

 

 

0 to VCC

V

Top

Operating Temperature

 

 

-55 to 125

°C

 

Input Rise and Fall Time

 

VCC = 2.0V

0 to 1000

ns

tr, tf

 

 

VCC = 4.5V

0 to 500

ns

 

 

 

VCC = 6.0V

0 to 400

ns

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