TYP. AT NO LOAD, 170µA TY P. AT 150mA
LOAD; MAX 1.5µA IN OFF MODE)
■ GUARANTEED OUTPUT CURRENT UP TO
150mA
■ WIDE RANGE OF OUTPUT VOLTAGE: 1.2V;
1.22V; 1.25V; 1.35V; 1.5V; 1.8V; 2V; 2.1V;
2.2V; 2.4V; 2.5V; 2.6V; 2.7V; 2.8V; 2.85V;
2.9V; 3V; 3.1V; 3.2V; 3.3V; 4.7V; 5V
■ FAST TURN-ON TIME: TYP. 200µs [C
C
= 10nF AND IO=1mA]
BYP
■ LOGIC-CONTROLLED ELECTRONIC
=1µF,
O
SHUTDOWN
■ INTERNAL CURRENT AND THERMAL LIMIT
■ OUTPUT LOW NOISE VOLTAGE 30µVRMS
OVER 10Hz to 100KHz
■ S.V.R. OF 60dB AT 1KHz, 50dB AT 10KHz
■ TEMPERATURE RANGE: -40°C TO 125°C
DESCRIPTION
The LD3985 provides u p to 150mA, from 2.5V to
6V input voltage.
Flip-Chip
(1.57x1.22)
TSOT23-5LSOT23-5L
The ultra low drop-voltage, low quiescent current
and low noise make it suitable for low power
applications and in battery powered systems.
Regulator ground current increases only slightly in
dropout, further prolonging th e battery life. P ower
supply rejection is better than 60 dB at low
frequencies and starts to roll off at 10KHz. High
power supply rejection is maintained do wn to low
input voltage levels common to battery operated
circuits. Shutdown Logic Control function is
available, this means that when the device is used
as local regulator, it is possible to put a part of the
board in standby, decreasing the total power
consumption. The LD3985 is designed to work
with low ESR ceramic capacitors. Typical
applications are in mobile phone and similar
battery powered wireless systems.
Figure 1: Schematic Diagram
Rev. 9
1/14March 2005
LD3985 SERIES
Table 1: Absolute Maximum Ratings
SymbolParameterValueUnit
V
V
V
INH
I
P
T
STG
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
(*) The in put pin is able to withstand non repet iti ve spike of 6. 5V for 200ms .
Table 2: Thermal Data
DC Input Voltage
I
DC Output Voltage-0.3 to VI+0.3
O
INHIBIT Input Voltage-0.3 to VI+0.3
Output Current
O
Power Dissipation
D
Storage Temperature Range
Operating Junction Temperature Range
LD3985M122RLD3985G122R (*)LD3985J122R1.22 V
LD3985M125R (*)LD3985G125R (*)LD3985J125R1.25 V
LD3985M135R (*)LD3985G135R (*)LD3985J135R1.35 V
LD3985M15RLD3985G15R (*)LD3985J15R (*)1.5 V
LD3985M18RLD3985G18RLD3985J18R1.8 V
LD3985M20R (*)LD3985G20R (*)LD3985J20R (*)2.0 V
LD3985M21R (*)LD3985G21R (*)LD3985J21R (*)2.1 V
LD3985M22R (*)LD3985G22R (*)LD3985J22R (*)2.2 V
LD3985M24R (*)LD3985G24R (*)LD3985J24R2.4 V
LD3985M25RLD3985G25RLD3985J25R2.5 V
LD3985M26R (*)LD3985G26R (*)LD3985J26R2.6 V
LD3985M27RLD3985G27RLD3985J27R2.7 V
LD3985M28R (*)LD3985G28R (*)LD3985J28R2.8 V
LD3985M285R (*)LD3985G285R (*)LD3985J285R (*)2.85 V
LD3985M29RLD3985G29RLD3985J29R2.9 V
LD3985M30R (*)LD3985G30R (*)LD3985J30R3.0 V
LD3985M31R (*)LD3985G31R (*)LD3985J31R3.1 V
LD3985M32R (*)LD3985G32R (*)LD3985J32R (*)3.2 V
LD3985M33RLD3985G33R (*)LD3985J33R3.3 V
LD3985M44R (*)LD3985G44R (*)LD3985J44R (*)4.4 V
LD3985M47RLD3985G47R (*)LD3985J47R4.7 V
LD3985M48R (*)LD3985G48R (*)LD3985J48R4.8 V
LD3985M49R (*)LD3985G49R (*)LD3985J49R (*)4.9 V
LD3985M50R (*)LD3985G50R (*)LD3985J50R (*)5.0 V
Flip-ChipUnit
(*) Avai l abl e on reque st .
2/14
LD3985 SERIES
Figure 2: Connection Di agram (top view for SOT and TSOT, top through view for Flip-Chip)
TSOT23-5L/SOT23-5LFlip-Chip
Table 4: Pin Description
Pin N°
SOT23-5L/
TSOT23-5L
14V
Pin N°
Flip-Chip
SymbolName and Function
Input Voltage of the LDO
I
22GNDCommon Ground
31V
INH
Inhibit Input Voltage: ON MODE when V
≥ 1.2V, OFF MODE when V
INH
0.4V (Do not leave floating, not internally pulled down/up)
45BYPASSBypass Pin: Connect an external capacitor (usually 10nF) to minimize noise
voltage
53V
O
Output Voltage of the LDO
Figure 3: Typi cal Application Ci rcuit
INH
≤
3/14
LD3985 SERIES
Table 5: Electrical Characteristics For LD3985 (Tj = 25°C, VI = V
C
= 10nF, IO = 1mA, V
BYP
= 1.4V, unless otherwise specified)
INH
O(NOM)
+0.5V, CI = 1µF,
SymbolParameterTest ConditionsMin.Typ.Max.Unit
VIOperating Input Voltage2.56V
V
Output Voltage < 2.5VIO = 1 mA-5050mV
O
= -40 to 125°C-7575
T
J
Output Voltage ≥ 2.5VIO = 1 mA-22% of
V
O
Line Regulation (Note 1)VI = V
∆V
O
Load RegulationIO = 1 mA to 150mA VO < 2.5V
∆V
O
Load RegulationIO = 1 mA to 150mA VO ≥ 2.5V
∆V
O
∆V
Output AC Line Regulation VI = V
O
I
Quiescent Current
V
DROP
Q
ON MODE: V
OFF MODE: V
Dropout Voltage (NOTE 1) IO = 1mA0.4mV
Short Circuit CurrentRL = 0600mA
I
SC
= 1.2V
INH
= 0.4V0.003
INH
SVRSupply Voltage RejectionV
I
O(PK)
V
Peak Output CurrentVO ≥ V
Inhibit Input Logic LowVI = 2.5V to 6V TJ= -40 to
INH
Inhibit Input Logic High1.2
I
Inhibit Input CurrentV
INH
eNOutput Noise VoltageB
t
Turn On Time (Note 4)C
ON
T
Thermal ShutdownNote 5160°C
SHDN
TJ= -40 to 125°C-33
+ 0.5 to 6 VTJ= -40 to 125°C-0.10.1%/V
O(NOM)
V
= 4.7 to 5V-0.190.19
O
0.0020.008%/mA
T
= -40 to 125°C
J
0.00040.002%/mA
T
= -40 to 125°C (for Flip-Chip)
J
I
= 1 mA to 150mA, TJ= -40 to 125°C
O
(for SOT23-5L/TSOT23-5L), V
+ 1 V, IO = 150mA,
O(NOM)
t
= tF = 30µs
R
I
= 085µA
O
I
= 0TJ= -40 to 125°C150
O
= 0 to 150mA170
I
O
= 0 to 150mATJ= -40 to 125°C250
I
O
T
= -40 to 125°C1.5
J
I
= 1mATJ= -40 to 125°C2
O
= 50mA20
I
O
= 50mATJ= -40 to 125°C35
I
O
= 100mA45
I
O
I
= 100mATJ= -40 to 125°C70
O
= 150mA60
I
O
= 150mATJ= -40 to 125°C100
I
O
= V
I
V
RIPPLE
V
O(NOM)
+0.25V ±
O(NOM)
= 0.1V, IO= 50mA
< 2.5V, VI = 2.55V
- 5%300550mA
O(NOM)
≥ 2.5V
O
f = 1KHz60dB
f = 10KHz50
0.00250.005
1.5mV
125°C
= 0.4VVI = 6V±1nA
INH
= 10 Hz to 100 KHzCO = 1 µF30µV
W
= 10 nF100250µs
BYP
V
O(NOM)
0.4V
PP
RMS
4/14
LD3985 SERIES
SymbolParameterTest ConditionsMin.Typ.Max.Unit
C
Output CapacitorCapacitance (Note 6)122µF
O
Note 1 – Fo r V
Note 2 – Fo r V
Note 3 – Dropout volt age is the inpu t- to-output voltage difference at which the output volta ge is 100mV be l ow its nomina l val ue. This specification does not apply for input voltages bel ow 2.5V.
Note 4 – Turn-on time is time measured between the enable input just exceeding V
of its nomi nal value
Note 5 – Typi cal therm al protection hysteresis i s 20°C
Note 6 - The minimum capacitor value is 1µF, anyway the LD3985 is still stable if the compensation capacitor has a 30% tolerance in all
temperature range.
< 2V, VI = 2.5V
O(NOM)
= 1.25V , VI = 2.5V
O(NOM)
ESR55000mΩ
High Value and the output voltage just reaching 95%
INH
TYPICAL PERFORMANCE CHARACTERISTICS (Tj = 25°C, VI = V
= 10nF, IO = 1mA, V
C
BYP
Figure 4: Output Voltage vs Temperature
Figure 5: Output Voltage vs Temperature
= 1.4V, unless otherwise specified)
INH
Figure 6: Output Voltage vs Temperature
Figure 7: Shutdown Voltage vs Temperature
O(NOM)
+0.5V, CI = CO = 1µF,
5/14
LD3985 SERIES
Figure 8: Shutdown Voltage vs Temperature
Figure 9: Line Regulation vs Temperature
Figure 11: Line Regulation vs Temperature
Figure 12: Load Regulation vs Temperature
Figure 10: Line Regulation vs Temperature
6/14
Figure 13: Load Regulation vs Temperature
LD3985 SERIES
Figure 14: Load Regulation vs Temperature
Figure 15: Quiescent Current vs Temperature
Figure 17: Quiescent Current vs Temperature
Figure 18: Supply Voltage Rejection vsFrequency
Figure 16: Quiescent Current vs Temperature
Figure 19: Load Transient Response
VI = 3.2V, IO = 1 to 150mA, Rise-Fall tim e = 1µsec
7/14
LD3985 SERIES
Figure 20: Line Transient Response
VI = 3.8V to 4.4V, TJ = 25°C, IO = 150mA, CI = CO = 1µF (X7R),
C
17-Mar-20059Improved Drawing Quality for Figures 19-20-21-22.
values are Changed on Table 5.
ON
LD3985 SERIES
13/14
LD3985 SERIES
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of s uch inf ormati on nor for a ny infr ing eme nt o f p atent s or o ther ri ghts of third parties wh ich m ay res ul t from i ts us e. N o lic ense i s gran ted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners