STMicroelectronics L99VR01 Datasheet

L99VR01

Datasheet

Automotive low dropout linear voltage regulator with configurable output voltage

having 200 mA current capability

Features

Product status link

L99VR01

Max. supply voltage (load
dump)

Max. output voltage tolerance

Output current

Quiescent current

1. Maximum value with regulator disabled

ΔV

V

S

O

I

O

I

qn

40 V

+/-2%

200 mA

≤1 µA

(1)

• AEC-Q100 qualified

• Operating DC power supply voltage range from 2.15 V to 28 V

• Battery and post regulation operating modes are allowed

• Low dropout voltage

• Low quiescent current consumption

• User-selectable output voltage (0.8 V; 1.2 V; 1.5 V; 1.8 V; 2.5 V; 2.8 V; 3.3 V or
5 V)

• Output voltage precision ±2%

• Enable input for enabling/disabling the voltage regulator

• Output voltage monitoring with reset output

• Negligible ESR effect on output voltage stability for load capacitor

• Programmable autonomous watchdog through external capacitor (L99VR01J
only)

• Undervoltage lockout UVLO

• Fast output discharge

• Thermal shutdown and short-circuit current limitation

• Advanced thermal warning and output overvoltage diagnostic (L99VR01J only)

• Programmable short-circuit output current (L99VR01J only)

• Wide operating temperature range (TJ = -40°C to 175°C L99VR01J only)

• Documentation available for customers that need support when dealing with
ASIL requirements as per ISO 26262

DS13649 - Rev 2 - April 2021
For further information contact your local STMicroelectronics sales office.

www.st.com

L99VR01

Description

L99VR01 is a low dropout linear voltage regulator designed for automotive

applications available in SO-8 and in PowerSSO-12 packages. The LDO delivers
up to 200 mA of load current and consumes as low as 1 μA of quiescent current
when the regulator is disabled. The input is 40 V tolerant to withstand load dump,
while the operating input voltage range is between 2.15 V and 28 V. The L99VR01
can be configured, through SELx pins, to generate a fixed selectable output voltage
(0.8 V; 1.2 V; 1.5 V; 1.8 V; 2.5 V; 2.8 V; 3.3 V or 5 V). High output voltage
accuracy (±2%) is kept over wide temperature range, line and load variation. The
L99VR01 features enable, reset, autonomous watchdog, advanced thermal warning,
fast output discharge and IShort control (IShort control, autonomous watchdog and
advanced thermal warning are available only for the L99VR01J). The regulator output
current is internally limited so that the device is protected against short-circuit and
overload, besides it features over temperature protection; the short current value
is configurable by an external resistance in the L99VR01J version. The L99VR01
can operate both in post regulation, attached to a pre-regulated voltage or directly
connected to battery.

DS13649 - Rev 2

page 2/47

1 Block diagram and pins description

Figure 1. Functional block diagram of L99VR01S

L99VR01

Block diagram and pins description

DS13649 - Rev 2

page 3/47

Block diagram and pins description

Figure 2. Functional block diagram of L99VR01J

L99VR01

Table 1. Pins description

Pin name SO-8 pin

V

S

1 1

SEL1 2 2

SEL2 3 3

SEL3 4 4

TW 5

I

Short

EN 5 7

GND 6 8 Ground reference.

V

CW

PowerSSO-12

pin

6

9

Supply voltage.

Block directly to ground with ceramic capacitor ≥ 4.7 µF and a 100 nF
capacitator as close as possible to the pin

Output voltage selectors.

Advanced thermal warning output.

If the device detects a junction temperature above the warning
threshold, the pin is pulled low. If an overvoltage condition occurs, a
square wave is provided through the TW output. Leave floating if not
used.

Programmable short circuit output current input pin. A resistor between
Ishort pin and GND sets the short circuit output current value.

Enable input.

With the Enable high, regulator, watchdog and reset are operating.
With the Enable low, regulator, watchdog and reset are shutdown,
while the fast discharge circuit is turned on.

Connect the Enable to Vs to keep the device always enabled

Watchdog timer adjust.

A capacitor between VCW pin and GND sets the time response of the
watchdog monitor (just for L99VR01J).

Function

DS13649 - Rev 2

page 4/47

SO-8

PowerSSO-12

L99VR01

Block diagram and pins description

Pin name SO-8 pin

Wi 10

RST 7 11

V

O

TAB TAB Connected to ground

8 12

PowerSSO-12

pin

Watchdog refresh input.

If the square wave frequency at this input pin is too low, a low pulse at
RST pin is generated (just for L99VR01J).

Reset output.

It is pulled down when output voltage goes below Vo_th or frequency at
Wi is too low (just for L99VR01J). Leave floating if not used.

Voltage regulator output.

Block to ground with a capacitor ≥ 3.3 µF (needed for regulator
stability).

Figure 3. Pins configuration

Function

DS13649 - Rev 2

page 5/47

2 Electrical specifications

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the Table 2. Absolute maximum ratings may cause permanent
damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

V

S

V

S

I

S

V

O

I

O

V

Wi

V

CW

V

rst

I

rst

V

tw

I

tw

V

sh_ctrl

V

EN

V

SELx

VESD HBM ESD HBM voltage level (HBM-MIL STD 883C) ±2 kV

VESD CDM

DC supply voltage -0.3 to 28 V

Single pulse / tmax < 400 ms “transient load
dump”

Input current internally limited

DC output voltage -0.3 to 6.7 V

DC output current internally limited

Watchdog input voltage

Watchdog delay voltage

Reset output voltage

Reset output current Internally limited

Thermal warning output voltage

Thermal warning output current Internally limited

“Short current” control voltage -0.3 to 3.6 V

Enable input

Selectors input voltage

ESD CDM voltage level (CDM AEC-Q100-011) ±500 V

ESD CDM voltage level on corner pins (CDM
AEC-Q100-011)

40 V

-0.3 to VO + 0.3

- 0.3 to VO + 0.3

-0.3 to VO + 0.3

-0.3 to VO + 0.3

-0.3 to VS + 0.3

-0.3 to VS + 0.3

±750 V

L99VR01

Electrical specifications

V

V

V

V

V

V

DS13649 - Rev 2

page 6/47

2.2 Thermal data

2.2.1 Thermal resistance

L99VR01

Thermal data

Table 3. Operation junction temperature

Item Symbol Parameter

Value

PowerSSO-12 SO-8

A.001

A.057

A.002

1. Measured on Vs

R

thj-case

R

thj-lead

R

thj-amb

Thermal resistance junction to
case

Thermal resistance junction to

(1)

lead

Thermal resistance junction to
ambient

8.5

54.5 °C/W

27.4 71 °C/W

Note: the values quoted are for PCB 77 mm x 86 mm x 1.6 mm, FR4, four layers; Cu thickness 0.070 mm (outer

layers) . Cu thickness 0.035 mm (inner layers), Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm
+/- 0.08 mm, Cu thickness on vias 0.025 mm.

2.2.2 Thermal protection

Table 4. Temperature threshold

Item Symbol Parameter Test condition Min. Typ. Max. Unit

(1)

A.003

A.004

A.005

A.006

A.007

1. Thermal protection is guaranteed by design and characterization.

T

prot_s

T

prot_j

T

prot_hyst

T

T

stg

Thermal protection temperature L99VR01S 150 180 °C

(1)

Thermal protection temperature L99VR01J 175 200 °C

Thermal protection hysteresis 11 °C

Operating

J

junction
temperature

Storage temperature

SO-8

T

Power-SSO-12 -40 175

J

T

stg

-40 150

150 °C

Unit

°C/W

°C

DS13649 - Rev 2

page 7/47

2.3 Electrical characteristics

Values specified in this section are for VS = 2.15 V to 18 V, TJ = - 40 °C to +150 °C, unless otherwise stated.

Item Pin Symbol Parameter Test condition Min. Typ . Max. Unit

A.008

A.009

A.010

A.011

A.012

V

V

V

V

VS, V

O

O

O

O

O

V

O

I

O

I

short

I

short

∆VO / V

O

Table 5. Electrical characteristics

VS = 2.15 to 18 V
IO = 1 to 200 mA
SEL_CONF=[0;0;0]

VS = 2.15 to 18 V
IO = 1 to 200 mA
SEL_CONF=[0;0;1]

VS = 2.15 to 18 V
IO = 1 to 200 mA
SEL_CONF=[0;1;0]

VS = 2.45 to 18 V
IO = 1 to 200 mA

Output voltage

DC output current

Short-circuit
current lower

(1)

value

L99VR01J

L99VR01S

Short-circuit
current upper
value

L99VR01J

Static line regulation

Dynamic line regulation

SEL_CONF=[0;1;1]

VS = 3.15 to 18 V
IO = 1 to 200 mA
SEL_CONF=[1;0;0]

VS = 3.45 to 18 V
IO = 1 to 200 mA
SEL_CONF=[1;0;1]

VS = 3.95 to 18 V IO = 1
to 200 mA

SEL_CONF=[1;1;0]

VS = 5.65 to 18 V IO = 1
to 200 mA

SEL_CONF=[1;1;1]

VO=0.8 V; 1.2 V, 1.5 V;

1.8 V; 2.5 V; 2.8 V; 3.3 V;
5 V

VS = 4V for VO=3.3 V

VS = 5.8 V for VO=5 V
with I
to GND

VS = 4 V for VO=3.3 V
VS = 5.8 V for VO=5 V
I

short

VS = 4 V for VO=3.3 V

VS = 5.8 V for VO=5 V
with Ishort pin floating;

Ishort > I

VS is from V
V; IO = 1 mA; 100 mA;
200 mA

VO=3.3 V; VO=5 V

VS is from V
V,Tr,f=1ms; IO = 1 mA; 50

(3)

mA; 200 mA; VO= 3.3 V;
VO=5 V

pin connected

short

> I

O

O

s_low

S_low

(2)

to 18

(2)

L99VR01

Electrical characteristics

0.784 0.8 0.816

1.176 1.2 1.224

1.470 1.5 1.530

1.764 1.8 1.836

V

2.450 2.5 2.550

2.744 2.8 2.856

3.234 3.3 3.366

4.9 5 5.1

200 mA

30 65 100 mA

240 360 480 mA

1 %

to 18

3 %

DS13649 - Rev 2

page 8/47

L99VR01

Electrical characteristics

Item Pin Symbol Parameter Test condition Min. Typ . Max. Unit

IO = 1 mA to 100 mA
VO= 3.3 V for VS=5 V;
VO= 5 V for VS= 6 V

IO = 10 mA to 100 mA,
Tr, f=10 us VO=3.3 V for

(3) (4)

VS=5 V; VO= 5 V for VS=
6 V

IO = 150 mA
VO = 5 V

IO = 150 mA
VO = 3.3 V

1 %

3 %

A.013

Static load regulation

V

O

∆VO / V

O

(4)

Dynamic load regulation

A.014

A.015

A.017

A.058

A.018

A.019

A.020

A.021

VS, V

VS, V

VS, V

VS, V

VS, V

VS, V

VS, V

VS, V

IO = 150 mA
VO = 2.8 V

500 mV

IO = 150 mA
VO = 2.5 V

IO = 150 mA

O

V

dp

Drop voltage

(5)

VO = 1.8 V

IO = 200 mA
VO = 5 V

IO = 200 mA
VO = 3.3 V

IO = 200 mA
VO = 2.8 V

530 mV

IO = 200 mA
VO = 2.5 V

IO = 200 mA
VO = 1.8 V

VS = 13.5 V; VO = 5 V; I

O

PSRR Power supply rejection ratio

= 200 mA

O

75

(3)

dB

fr = 1 kHz

Current consumption with

O

I

qn

regulator disabled Iqn = IS –
I

O

Current consumption with

O

I

qn_LL

regulator enabled I
– I

O

qn_LL

Current consumption with

O

I

qn_O

regulator enabled
I

= Is – I

qn_O

O

Current consumption with

O

I

qn_50

regulator enabled
I

= Is – I

qn_50

O

Current consumption with

O

I

qn_100

regulator enabled
I

= Is – I

qn_100

O

Current consumption with

O

I

qn_200

regulator enabled
I

= Is – I

qn_200

O

VS = 3.5V; 13.5 V, EN =
low

VS = 3.5 V; 13.5 V, IO = 0

= I

S

µA; EN = high

VS = 3.5 V; 13.5 V, 0 < I
≤100 µA; EN = high

VS = 3.5 V; 13.5 V, IO =
50 mA

EN = high

VS = 3.5 V; 13.5 V, IO=
100 mA EN = high

VS = 3.5 V; 13.5 V, IO=
200 mA EN = high

1 µA

75 100 µA

O

100 130 µA

1 1.3 mA

1.7 2.0 mA

3.1 3.5 mA

DS13649 - Rev 2

page 9/47

L99VR01

Electrical characteristics

Item Pin Symbol Parameter Test condition Min. Typ . Max. Unit

VO= 0.8 V; 1.2 V; 1.5 V;

1.8 V

A.022

V

S

V

UVLO_fall

Undervoltage lockout, falling

VO = 2.5 V; 2.8 V; 3.3 V

VO = 5 V

VO = 0.8 V; 1.2 V; 1.5 V;

1.8 V

A.023

V

S

V

UVLO_ rise

Undervoltage lockout, rising

VO=2.5 V; 2.8 V; 3.3 V

VO=5 V

1. Ishort typical value of 120 mA for t= 400 µs during the power on

2. V

= 3.5 V@VO = 0.8 V, 1.2 V,1.5 V,1.8 V& 2.5 V; V

s_Low

=5 V@ VO= 2.8 V & 3.3 V, V

s_Low

3. Parameters are guaranteed by design

4. Referred to Figure 30. Maximum load variation response

5. Considering that the minimum operating input voltage is 2.15 V, the dropout voltage (Vdp) is not defined for output voltages
below 1.8 V.

Table 6. Fast output discharge

1.5 1.6 1.7

2.3 2.4 2.55

4.6 4.8 4.9

1.7 1.8 2.1

2.6 2.7 2.8

4.9 5.1 5.3

= 6 V@VO = 5 V

s_Low

V

V

Item Pin Symbol Parameter Test condition Min. Typ. Max. Unit

VS= 3.95 V; 13.5 V; VO =

3.3 V, VO = 5 V
EN = low

50 75 105 Ω

A.024

V

O

R

FD

Fast discharge - pull
down resistor

Table 7. Reset

Item

A.025 RST

A.026 RST

A.027 RST

A.055 RST

A.028 RST

Pin Symbol Parameter Test condition Min. Typ. Max. Unit

VS = 5 V; 13.5 V

V

rst_l

Reset output low voltage

Rext ≥ 4.7 KΩ to V

O

0.2 x
V

O

VO = 3.3 V, VO = 5 V

I

rst_lkg

Reset output high
leakage current

V

rst

= 0.8 V

1 µA

VS = 5 V; 13.5 V

V

O_th

VO out of regulation – low
threshold

VO decreasing

VO=3.3 V,

13.5% 10% 6.5%

Below

V

VO=5 V

V

O_th_hyst

T

VO out of regulation – low
threshold hysteresis

rr

Reset reaction time

VS = 5 V; 13.5 V; V
increasing; VO=3.3 V ;
VO=5 V

VS = 5 V; 13.5 V; VO=3.3
V ; VO=5 V

O

2%

V

10 16 37 µs

V

O

O_th

DS13649 - Rev 2

A.029 RST

T

rd

Reset delay time

VS = 5 V; 13.5 V ; VO=3.3
V ; VO = 5 V

160 250 300 µs

page 10/47

L99VR01

Electrical characteristics

Table 8. Watchdog (only for L99VR01J)

Item Pin Symbol Parameter Test condition Min. Typ. Max. Unit

A.030

W

i

V

ih

Input high voltage

(1)

VS=5 V; 13.5 V

VO=3.3 V; VO=5 V

0.7 x
V

O

V

A.031

A.033

A.034

A.035

W

i

W

i

V

CW

V

CW

V

V

V

I

Wi

wlth

whth

il

Input low voltage

Pull down current

Low threshold

High threshold

(1)

VS = 5 V; 13.5 V

VO=3.3 V; VO=5 V

Vwi = 3.3 V

VS = 5V; 13.5 V

Vo=3.3V; Vo=5V

VS = 5V; 13.5 V

Vo=3.3V; Vo=5V

VS = 5V; 13.5 V

A.036

V

CW

I

CWc

Charge current

VCW = 0.1V

Vo=3.3V; Vo=5V

VS = 5 V; 13.5 V

A.037

V

CW

I

CWd

Discharge current

VCW = 2.5 V

VO=3.3 V; VO=5 V

A.040

A.041

1. Watchdog input requires a square wave signal (duty cycle of 50 %)

V

CW

V

CW

I

w_off

I

w_on

Watchdog deactivation
current threshold

Watchdog activation
current threshold

VS = 5 V; 13.5 V

VO=3.3 V; VO=5 V

VS = 5 V; 13.5 V

VO=3.3 V; VO=5 V

0.25 x
V

O

6 10 μA

10 % 13 % 16 %

44 % 47 % 50 %

V

V

5 10 20 μA

1.25 2.5 5 μA

0.6 1.05 1.5 mA

2.2 3.35 4.5 mA

V

O

O

Item

A.042 EN

A.043 EN

A.045 EN

Item

Pin Symbol Parameter Test condition Min. Typ. Max. Unit

A.046 SELx

A.047 SELx

A.048 SELx

Item

Pin Symbol Parameter Test condition Min. Typ. Max. Unit

A.049 TW

Table 9. Enable

Pin Symbol Parameter Test condition Min. Typ. Max. Unit

V

En_low

V

En_high

EN input low voltage 0.6 V

EN input high voltage 1.5 V

I

En

Pull down current

VS = 13.5 V

4 12 µA

Table 10. Output voltages selectors

V

SELx_low

V

SELx_high

I

SELx

SELx input low voltage 0.3 V

SELx input high voltage 0.7 V

Pull down current

VS = 3.5V; 13.5 V

0.1 0.4 µA

Table 11. Thermal warning and protection (only for L99VR01J)

R

≥ 4.7 kΩ to V

V

Tw_low

Thermal warning output
low voltage

ext

VO=3.3 V; VO=5 V

O

0.2xVo V

DS13649 - Rev 2

page 11/47

L99VR01

Electrical characteristics

Item Pin Symbol Parameter Test condition Min. Typ. Max. Unit

A.050 TW

A.051 TW

A.052

V

T

warn

T

warn_hyst

O

OV

Thermal warning
temperature

Thermal warning
hysteresis

VO overvoltage

VS = 5 V; 13.5 V; V
increasing

VO=3.3 V; VO=5 V

140 150 160 °C

3 11 15 °C

O

6.5% 10% 13.5%

Above

VO

A.056

V

A.054 TW

O

O

V__hyst

T

w_per

VO overvoltage
hysteresis

Thermal warning square
wave period

VS = 5 V; 13.5 V; Vo
decreasing

V O=3.3 V; VO=5 V

VS = 5V; 13.5 V

VO=3.3 V; VO=5 V

2%

160 250 300 µs

Below

OV

Note: all parameters are guaranteed in the junction temperature range -40°C to 150°C (unless otherwise specified);

L99VR01J device is still operative and functional at higher temperatures (up to 175°C). Parameters limit
at higher junction temperature than 150°C may change respect to what is specified as per the standard
temperature range. device functionality at high junction temperature is guaranteed by characterization.

All parameters are guaranteed by design for Vo not reported in test condition.

Note: minimum input voltage values are achievable adopting an input ceramic capacitator: C5750X7R2A475M230KA

– ceramic capacitor multistrate SMD, 4.7 μF, 100 V, ±20%, X7R, C series TDK.

DS13649 - Rev 2

page 12/47

0.00

0.50

1.00

1.50

2.00

2.50

3.00

3.50

4.00

4.50

5.00

5.50

-60 -40 -20 0 20 40 60 80 100 120 140 160

V

0

(V)

Tj (⁰C)

Vo = 5 V

Vo = 3 V 3

Vo = 2 V 8

Vo = 2 V 5

Vo = 1 V 8

Vo = 1 V 5

Vo = 1 V 2

Vo = 0 V 8

Io = 1 mA
Vs = 13. 5 V

0.00

0.50

1.00

1.50

2.00

2.50

3.00

3.50

4.00

4.50

5.00

5.50

-60 -40 -20 0 20 40 60 80 100 120 140 160

V

0

(V)

Tj (⁰C)

Vo = 5 V

Vo = 3 V 3

Vo = 2 V 8

Vo = 2 V 5

Vo = 1 V 8

Vo = 1 V 5

Vo = 1 V 2

Vo = 0 V 8

Io = 1 mA
Vs = 13.5 V

-0.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

0 1 2 3 4 5 6 7 8 9 10

V

OUT

(V)

V

S

(V)

Vo = 5 V

Vo = 3.3 V

Vo =2.8 V

Vo = 2.5 V

Vo = 1.8 V

Vo = 1.5 V

Vo = 1.2 V

Vo = 0.8 V

IO= 100 mA
T

a

= 25 ⁰C

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0.45

0.50

0 20 40 60

80

100

120

140

160

180 200

V

dp

(V)

Io(mA)

Vo = 5 V

Vo = 3 V 3

Vo =2 V 8

Vo = 2 V 5

Vo = 1 V 8

T j = 25 ⁰C

-0.6

-0.3

0.0

0.3

0.6

0.9

1.2

1.5

1.8

2.1

2.4

2.7

3.0

3.3

3.6

3.9

0 20 40 60 80 100 120 140 160

180 200

I

qn

(mA)

Io(mA)

Vo=5 V

Vo=3 V 3

Vo=2 V 8

Vo=2 V 5

Vo=1 V 8

Vo=1 V 5

Vo=1 V 2

Vo=0 V 8

T

C

s

V

= 13.5 V

= 25 ⁰C

0.0

0.1

0.2

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

I

qn

(mA)

VS(V)

Vo = 5 V

Vo = 3.3 V

Vo = 2.8 V

Vo = 2.5 V

Vo = 1.8 V

Vo = 1.5 V

Vo = 1.2 V

Vo = 0.8 V

I

o

<

1mA

T

C

= 25 ⁰C

0.0

0.2

0.4

0.6

0.8

1.0

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

I

qn

(mA)

VS(V)

Vo=5V

Vo=3.3V

Vo=2.8V

Vo=2.5V

Vo=1.8V

Vo=1.5V

Vo=1.2V

Vo=0.8V

I

O

= 50 mA

T

C

= 25 ⁰C

L99VR01

Electrical characteristics curves

2.4 Electrical characteristics curves

Figure 4. Output voltage vs Tj

Figure 6. Drop voltage vs output current

Figure 5. Output voltage vs VS

Figure 7. Current consumption vs output current

Figure 8. Current consumption vs input voltage (Io < 1mA)

DS13649 - Rev 2

Figure 9. Current consumption vs input

voltage (Io = 50 mA)

page 13/47

Figure 10. Current consumption vs input

0.0

0.5

1.0

1.5

2.0

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

I

qn

(mA)

VS(V)

Vo = 5 V

Vo = 3.3 V

Vo = 2.8 V

Vo = 2.5 V

Vo = 1.8 V

Vo = 1.5 V

Vo = 1.2 V

Vo = 0.8 V

I

o

= 100 mA

Tc= 25 ⁰C

300.00

305.00

310.00

315.00

320.00

325.00

330.00

335.00

340.00

345.00

350.00

355.00

360.00

-60 -40 -20 0 20 40 60 80 100 120 140 160

I

sht

(mA)

Tj (⁰C)

5V

3V3

2V8

2V5

1V8

1V5

1V2

0V8

Vs = 13.5 V

45

50

55

60

65

-60 -40 -20 0 20 40 60 80 100 120 140 160

I

sht

(mA)

Tj (⁰C)

5 V

3 V 3

2 V 8

2 V 5

1 V 8

1 V 5

1 V 2

0 V 8

Vs = 13.5 V

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

0.40

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

I

SHT

(A)

VS(V)

5 V_Ishort_max

5 V_Ishort_min

3 V 3_Ishort_max

3 V 3_Ishort_min

2 V 8_Ishort_max

2 V 8_Ishort_min

2 V 5_Ishort_max

2 V 5_Ishort_min

1 V 8_Ishort_max

1 V 8_Ishort_min

1 V 5_Ishort_max

1 V 5_Ishort_min

1 V 2_Ishort_max

1 V 2_Ishort_min

0 V 8_Ishort_max

0 V 8_Ishort_min

RSH = Floating

T

C

= 25 ⁰C

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

V

OUT

(V)

V

EN

(V)

I

O

= 100 mA

T

a

= 25 ⁰C

V

S

= 13.5 V

Vo=0.8 V

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

1.2

1.3

0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8

0.0 2.0

V

OUT

(V)

VEN(V)

I
O

= 100 mA

T

a

= 25 ⁰C

V

S

= 13.5 V

Vo=1.2 V

1.0

voltage (Io= 100 mA)

L99VR01

Electrical characteristics curves

Figure 11. Short-circuit current vs Tj (Ishort pin floating)

Figure 12. Short-circuit current vs Tj (Ishort pin tied to

GND)

Figure 14. Output voltage vs enable voltage (VO =0.8 V)

Figure 13. Short-circuit current vs input voltage

Figure 15. Output voltage vs enable voltage (VO =1.2 V)

DS13649 - Rev 2

page 14/47

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

1.6

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

V

OUT

(V)

VEN(V)

Vo=1.5 V

I

O

= 100 mA

T

c

= 25 ⁰C

V

S

= 13.5 V

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

V

OUT

(V)

VEN(V)

Vo=1.8 V

IO= 100 mA
T

C

= 25 ⁰C

VS= 13.5 V

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

2.4

2.6

2.8

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

V

OUT

(V)

V

EN

(V)

Vo=2.5 V

IO= 100 mA
Ta= 25 ⁰C
VS= 13.5 V

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

2.4

2.6

2.8

3.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

Vo=2.8 V

IO= 100 mA

Ta = 25 ⁰C

VS= 13.5V

V

OUT

(V)

V

EN

(V)

-0.2

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

2.4

2.6

2.8

3.0

3.2

3.4

3.6

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

Vo=3.3V

IO= 100 mA

Ta= 25 ⁰C

VS= 13.5V

Vo=3.3 V

V

OUT

(V)

VEN(V)

V

OUT

(V)

VEN(V)

Vo=5 V

-0.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

IO= 100 mA
TC= 25 ⁰C
VS= 13.5 V

-60 -40 -20 0 20 40 60 80 100 120 140 160

0.95

1.00

1.05

1.10

1.15

1.20

1.25

1.30

1.35

1.40

1.45

0.90

1.50

V

En_I

(V)

Tj (⁰C

)

Vs = 13.5 V

0.60

0.65

0.70

0.75

0.80

0.85

0.90

0.95

1.00

1.05

1.10

1.15

1.20

-60 -40 -20 0 20 40 60 80 100 120 140 160

V

En_I

(V)

Tj (⁰C)

Vs = 13.5 V

L99VR01

Electrical characteristics curves

Figure 16. Output voltage vs enable voltage (VO =1.5 V)

Figure 18. Output voltage vs enable voltage (VO =2.5 V)

Figure 17. Output voltage vs enable voltage (VO =1.8 V)

Figure 19. Output voltage vs enable voltage (VO =2.8 V)

Figure 20. Output voltage vs enable voltage (VO =3.3 V)

Figure 22. VEn_high vs Tj

DS13649 - Rev 2

Figure 21. Output voltage vs enable voltage (VO =5 V)

Figure 23. VEn_low vs Tj

page 15/47

40.00

42.00

44.00

46.00

48.00

50.00

-60 -40 -20 0 20 40 60 80 100 120 140 160

V

whth

(%Vo (V))

Tj (⁰C)

Vo=5 V

Vo=0 V 8

Vs = 13.5 V

10.00

11.00

12.00

13.00

14.00

15.00

-60 -40 -20 0 20 40 60 80 100 120 140 160

V

wlth

(%Vo (

V))

Tj (⁰C)

Vo=5 V

Vo=0 V 8

Vs = 13.5 V

5.00

7.00

9.00

11.00

13.00

15.00

-60 -40 -20 0 20 40 60 80 100 120 140 160

I

cwc

(uA)

Tj (⁰C)

Vo=5 V

Vo=0 V 8

Vs = 13.5 V

0.00

1.00

2.00

3.00

4.00

-60 -40 -20 0 20 40 60 80 100 120 140 160

I

cwd

(uA)

Tj (⁰C

)

Vs = 13.5 V

Vo=5 V

Vo=0 V 8

0

25

50

75

100

125

150

1 10 100 1000 10000

PSRR (db)

FREQUENCY (KHz)

L99VR01

Electrical characteristics curves

Figure 24. Vwhth vs Tj

Figure 26. Icwc vs Tj

Figure 25. Vwlth vs Tj

Figure 27. Icwd vs Tj

DS13649 - Rev 2

Figure 28. PSRR

page 16/47

3 Test circuit and waveforms plot

Vs

E N

Ishort

R ST

SEL 1

Vcw

Wi

GND

C tw

R sh

Vo

SEL 2

TW

Vbat

SEL 3

C 1

C 2

R

RST

3.3 µF

ESR

LOAD

Vo

Io

+

-

0 250 750 1000

200

100

0

Time (µs)

Output current

Io (mA)

Step Change of Load

Current

0 250 750 1000

xx

x

0

Time (µs)

Output voltage

Vo (V)

Resultant

Output Voltage

Vo=5V Vo=3.3V

-2.50E-01

-2.00E-01

-1.50E-01

-1.00E-01

-5.00E-02

0.00E+00

5.00E-02

1.00E-01

1.50E-01

4.92

4.94

4.96

4.98

5

5.02

5.04

5.06

5.08

0 0.001 0.002 0.003 0.004 0.005

Vout_5V Iout_5V_100mA

-0.25

-0.2

-0.15

-0.1

-0.05

0

0.05

0.1

0.15

3.24

3.26

3.28

3.3

3.32

3.34

3.36

0 0.001 0.002 0.003 0.004 0.005

Vout_3.3V Iout_3.3V_100mA

3.1 Load regulation

Figure 29. Load regulation test circuit

L99VR01

Test circuit and waveforms plot

DS13649 - Rev 2

Figure 30. Maximum load variation response

page 17/47

4 Application information

L99VR01

Application information

Figure 31. Application schematic

Figure 32. Application schematic – Post regulation

Input ceramic capacitor C2 ≥ 4.7 μF is necessary for the regulator to operate properly. The other input capacitor
C1 can be used as backup supply for the application. The C0 capacitor, connected to the output pin, is for
bypassing to GND the high-frequency noise and it guarantees stability even during sudden line and load

variations.

Suggested value is C0 = 3.3 µF.

The ESR of the SMD output ceramic capacitor has a negligible effect on the stability of the L99VR01 family for
capacitors with low ESR. A ceramic SMD capacitor is recommended on Vo pin.

DS13649 - Rev 2

page 18/47

4.1 Voltage regulator

O

(A)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40

V

OUT

(V)

I

Vo_5V

Vo_3V3

Vo_2V8

Vo_2V5

Vo_1V8

Vo_1V5

Vo_1V2

Vo_0V8

Vs= 13.5V
Ta= 25 ⁰C

The voltage regulator uses a p-channel MOS transistor as a regulating element. With this structure, a very low
dropout voltage at current up to Io = 200 mA is obtained. The high-precision of the output voltage (±2%) is
obtained with a pre-trimmed reference voltage. The voltage regulator automatically adapts its own quiescent
current to the output current level. In light load conditions the quiescent current goes down to I

consumption mode). L99VR01 operates with reduced input voltage (post regulation) minimizing the internal power
dissipation and maximizing the output current.

L99VR01

Voltage regulator

qn_LL = 75

µA (low

4.2

Output current limitation

Output current limitation is present to protect the regulator and the application from overload condition, such as
short to ground.

Figure 33. Behavior of output current versus regulated voltage Vo

The Ishort current can be set in the range from 65 mA to 360 mA through an external resistor Rsh connected
between I

pin and ground (L99VR01J version only).

Short

DS13649 - Rev 2

page 19/47

L99VR01

Output voltage selection

Figure 34. Ishort versus Rsh

Open pin (no resistance on the Ishort pin), is seen as a max resistance corresponding to the maximum Ishort
current.

4.3 Output voltage selection

The L99VR01 can provide one out of 8 different output voltages. The combination of three digital input selectors
(SELx) determines the output voltage according to the following truth table.

V

O

5 1 1 1

3.3 1 1 0

2.8 1 0 1

2.5 1 0 0

1.8 0 1 1

1.5 0 1 0

1.2 0 0 1

0.8 (Default) 0 0 0

The SELx pins configuration is acquired at the device start-up (EN transition from low to high) and once
configuration is acknowledged, it cannot be changed until next EN transition.

When all the pins are left not connected, the default configuration will be selected.

Table 12. Truth table

SEL1 SEL2 SEL3

DS13649 - Rev 2

page 20/47

Figure 35. Example of output voltage selection

L99VR01

Enable

4.4

SELx pins are internally connected to GND via pull down current source.

Enable

The L99VR01 is enabled/disabled by the enable input; a high voltage signal switches the regulator ON. When the
enable pin is set low, the output is switched-off, the current consumption of the device becomes as low as 1 μA
and the Fast Output Discharge circuit is activated.

It may happen that the enable pin must be driven by components supplied at a voltage different from the regulator
supply voltage. In this case the EN input pin must be set high only once Vs > 1.5 V. A solution to drive the enable
pin is depicted in the following figure.

Figure 36. Typical example of enable control

DS13649 - Rev 2

In any case, since the enable input voltage is linked to the maximum DC supply voltage (VS) applied to the
L99VR01 (-0.3 V to Vs + 0.3 V), special care must be adopted in driving EN pin to avoid exceeding absolute

maximum rating.

page 21/47

L99VR01

Note: A diode (0.25 V < VF < 0.75 V) connected in series with EN pin is requested only if the regulator is directly

supplied by car battery.

4.5 Reset

The reset circuit supervises the output voltage VO. If the output voltage falls below V
with a reaction time Trr. When the output voltage rises above V

O_th

+ V

O_th_hyst

then RST is pulled high with a
delay time Trd. The delay is generated by an internal circuit. The reset circuit is active when En is high. Being
RST an open-drain output an external resistance (Rrst) is needed between the RST pin and the Vo pin. The

external resistance value can be in a range between 4.7 KΩ and 20 KΩ. Leave the RST pin floating if not used.
Be aware that the current flowing through the RST pin drawn from Vo when the RST pin is pulled low may affect
the watchdog activation/deactivation based on the regulator output current consumption monitoring.

Figure 37. Reset timing diagram

then RST is pulled low

O_th

Reset

4.6

Autonomous watchdog

A supplied microcontroller is monitored by the watchdog input Wi (L99VR01J version only). If pulses are missing,
the RST output pin is set low. The watchdog timeout can be set within a wide range with the external capacitor,
Ctw. The watchdog circuit discharges the capacitor Ctw, with the constant current I

is reached, a watchdog reset is generated. To prevent this from happening the microcontroller must generate a
positive edge during the discharge of the capacitor before the voltage reaches the threshold V

sawtooth period “Twop”, taking care that the microcontroller triggers the positive edge during the discharge phase
of Ctw (Td), the following equations can be used:

(V

whth-Vwlth

(V

whth-Vwlth

T

wop

) x Ctw = I

) x Ctw = I

= Td + Twol

CWd

CWc

x Td

x Twol

Every Wi positive edge switches the current source from discharging to charging. The same happens when the
lower threshold is reached. When the voltage reaches the upper threshold, V

whth

charging to discharging. The result is a saw-tooth voltage at the watchdog timer capacitor Ctw. If a microcontroller
operates in low power mode it will not be able to generate any pulse to refresh the voltage regulator watchdog,

triggering so the microcontroller reset. In such a case, to avoid generating the microcontroller reset, the watchdog
functionality will be automatically deactivated any time the microcontroller current consumption falls under the
I

threshold. On the other hand, when the current consumption rises above the I

w_off

functionality will be once again activated. Once the regulator is enabled for the first time, if Io < Iw_off the
watchdog will not be activated, while if Io > Iw_off the watchdog will be activated.

. If the lower threshold V

CWd

. To calculate the

wlth

, the current switches from

threshold the watchdog

w_on

wlth

DS13649 - Rev 2

page 22/47

W

i

V

CW

I

O

RST

V

whth

V

wlth

I

w_off

I

w_on

T

wol

T

wop

L99VR01

Thermal warning and thermal shutdown

Figure 38. Watchdog timing diagram

Since the RST output pin is shared between the watchdog circuit and the output voltage monitoring circuit, for
applications where the watchdog is not needed, to prevent the watchdog from generating RST pulses without
anyhow losing the reset functionality of the Vo monitoring, the Vcw pin has to be connected to Vo. Vcw pin must be

always tied to ground by an external capacitor (Ctw) when the watchdog is used.

Note: when the watchdog timer is used and the regulator recovers from a thermal shut-down event or recovers from

an output under-voltage event (including the recovery from output under-voltage event at the regulator output
turning on), the reset pin might be pulled back high with a delay longer than Trd, in the range between Trd
and Trd +Twol due to the watchdog that might affect the RST pin release. The watchdog will not affect the
RST pin release in the case where recovering from a thermal shut-down event or recovering from an output
under-voltage event (including the recovery from output under-voltage event at the regulator output turning on)
the Io drops below I

RST pin and the TW pin through the pull-down resistors connected to Vo when the RST and the TW pins are
asserted low and the current needed to charge/discharge the output capacitor Co.

Note: when the watchdog timer is used, in case of an output under-voltage event not making Vo drop to zero volt,

since the watchdog will still be running during the output under-voltage condition, the first watchdog timeout
after the reset pin is released coming out of the output under-voltage event might occur before expected
(0≤Timeout≤Twop-Twol).

before Trd. The output current Io consists in the load current, the current drawn from the

w_off

Table 13. Watchdog timer

Usage of watchdog timer

Watchdog timer is not used Connect to the Vo pin

Watchdog timer is used

Connection of Vcw Pin

Connect to an external capacitor C

tw

4.7 Thermal warning and thermal shutdown

To warn the microcontroller about a severe temperature increase, a thermal warning output has been
implemented (L99VR01J version only). If the device detects a junction temperature above T

thermal warning (TW) output pin is pulled low while the voltage regulator and its features remain all active. The
TW pin will return to its high logic level (equal to the Vo output value) once the temperature falls below the
threshold T

DS13649 - Rev 2

warn

- T

warn_hyst

.

, the advanced

warn

page 23/47

TW

t

T

w_per

Overvoltage detection by advanced thermal warning read-out

Figure 39. Thermal warning diagram

L99VR01

When junction temperature reaches the T
off through the internal Fast Output Discharge circuit; to be reactivated, junction temperature has to decrease

below T
pin and the Vo pin. The external resistance value can be in a range between 4.7 KΩ and 20 KΩ. Be aware that

the current flowing through the TW pin drawn from Vo when the TW pin is pulled low may affect the watchdog
activation/deactivation based on the regulator output current consumption monitoring. Leave floating if not used.

prot_j/s

- T

prot_hyst

. Being TW an open-drain output an external resistance (RTW) is needed between the TW

thermal shutdown threshold the regulator output is quickly shut-

prot_j/s

4.8 Overvoltage detection by advanced thermal warning read-out

The TW pin also provides diagnostics about output overvoltage (OV); to distinguish between a thermal warning
event and an output overvoltage event, two different signals are generated at the same TW output pin. How
reported in the previous paragraph a thermal warning event detection sets the TW pin LOW, instead an output
overvoltage event generates a square wave at the TW pin (Figure 40. Square wave on TW pin generated during

an overvoltage). Overvoltage detection has higher priority than thermal warning detection so that concurrence of

thermal warning and over voltage events leads to a square wave like in the case of overvoltage detection (as
shown in Figure 41. Warning signal caused by overvoltage and thermal warning on TW pin).

Figure 40. Square wave on TW pin generated during an overvoltage

DS13649 - Rev 2

A typical example of thermal warning and overvoltage failures management is depicted in Figure 41. Warning

signal caused by overvoltage and thermal warning on TW pin.

page 24/47

Vo

T

Vo_hth

TW

150ºC

t

t

t

Fast output discharge

Figure 41. Warning signal caused by overvoltage and thermal warning on TW pin

L99VR01

4.9 Fast output discharge

To assure a quick discharge of the external capacitor tied to the output pin down to around 1.3 V the L99VR01
uses an internal pulldown circuit. Activated each time the EN pin goes low, during thermal shut down and during
undervoltage lockout, the output current will flow through the pulldown resistor of the fast output discharge circuit
to ground. The fast output discharge feature is available for the output voltages Vo= 2.5 V (SELx = [1;0;0]) Vo=

2.8 V (SELx = [1;0;1]) Vo= 3.3 V (SELx = [1;1;0]) and Vo= 5 V (SELx = [1;1;1]).

4.10 Undervoltage lockout UVLO

The undervoltage lockout (UVLO) circuit allows a fast regulating element to turn off (activating the internal Fast
Output Discharge circuit) if the input voltage drops below the threshold, V

output state during low input voltage. When the input voltage is above the V
element is again turned on.

UVLO_fall

UVLO_rise

, avoiding undesired unknown

threshold, the regulating

DS13649 - Rev 2

page 25/47

Figure 42. Undervoltage lockout on output voltage

V

S

V

O

V

UVLO_rise

V

UVLO_fall

L99VR01

Functional safety management

4.11 Functional safety management

The device was designed to offer a set of features to support applications that need to fulfill functional
safety requirements as defined by ASIL classification in ISO26262-2018. The IC was developed for different
applications, hence can be considered a SEooC (Safety Element out of Context) as defined in the normative.
Analysis of the IC’s capability to reach the required safety level, should be made at system level under user
responsibility.

The following device safety requirements have been considered for a typical application:

Table 14. Safety requirement

ID Description

SR-001 Operation of the voltage regulator(s) is allowed till over temperature limit.

SR-002

SR-003

SR-004

Based on above requirements list the following safety mechanism has been implemented:

ID

SM1 Thermal sensor acting by TW pin SR-004

SM2 Overtemperature protection SR-001

SM3 Limitation on maximum output current SR-002

SM4

Operation of voltage regulator(s) is enabled until programmed current limit is
reached.

Output voltage of regulator(s) shall remain within programmed range when RST pin
is not asserted.

Output voltage of regulator(s) shall remain within programmed range when square
wave at TW pin is not generated.

Table 15. Implemented safety mechanism

Output voltage VO monitoring for
undervoltage detection

Description SR covered

SR-002

DS13649 - Rev 2

page 26/47

L99VR01

Functional safety management

ID Description SR covered

SM5

SM6

In addition to the internal watchdog for checking the correct operation of the microcontroller, it can be considered
a system-level safety mechanism.

More details about functional safety can be found in the device safety manual, provided on customer request.

Output voltage VO monitoring for
overvoltage detection

RST reset assertion in case ofV
undervoltage detection

SR-002

O

SR-003

DS13649 - Rev 2

page 27/47

5 Application

L99VR01

Application

Figure 43. Typical application

DS13649 - Rev 2

page 28/47

6 Package and PCB thermal data

6.1 PowerSSO-12 Thermal data

Figure 44. PowerSSO-12 PC board

L99VR01

Package and PCB thermal data

Note: layout condition of Rth and Zth measurements (PCB: Double layer and Four layers, Thermal Vias, FR4 area= 77

mm x 86 mm, PCB thickness=1.6 mm, Cu thickness=0.070 mm (front and back side), Cu thickness 0.035 mm
(inner layers). Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08 mm, Cu thickness on vias

0.025 mm, Footprint dimension 2.2 mm x 2.9 mm.

DS13649 - Rev 2

page 29/47

PowerSSO-12 Thermal data

Figure 45. Rthj-amb vs PCB copper area in open box free air condition (PowerSSO-12)

L99VR01

Figure 46. PowerSSO-12 thermal impedance junction ambient single pulse

DS13649 - Rev 2

Pulse calculation:

Z

THδ=RTH

.δ+ Z

THtp

where δ=tp/T

(1-δ)

page 30/47

L99VR01

PowerSSO-12 Thermal data

Figure 47. Thermal fitting model of a Vreg in PowerSSO-12

Table 16. PowerSSO-12 thermal parameter

Area/island (cm2) Footprint 2 8 4L

R1 (°C/W) 4.4

R2 (°C/W) 4.5

R3 (°C/W) 6

R4 (°C/W) 18 9 8 4.5

R5 (°C/W) 22 15 10 4

R6 (°C/W) 26 20 15 4

C1 (W.s/°C) 0.001

C2 (W.s/°C) 0.03

C3 (W.s/°C) 0.1

C4 (W.s/°C) 0.4 0.4 0.4 0.8

C5 (W.s/°C) 0.27 0.8 1 7

C6 (W.s/°C) 3 6 9 15

DS13649 - Rev 2

page 31/47

6.2 SO-8 thermal data

L99VR01

SO-8 thermal data

Figure 48. SO-8 PC board

Note: Layout condition of Rth and Zth measurements (PCB: double layer and four layers; FR4 area = 77 mm x 86 mm;

PCB thickness = 1.6 mm; Cu thickness = 0.070 mm (front and back side), Cu thickness 0.035mm (inner layers);
Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias of 0.025 mm,
Footprint dimension 2.2 mm x 2.9 mm.

DS13649 - Rev 2

page 32/47

Figure 49. Rthj-amb vs PCB copper area in open box free air condition

L99VR01

SO-8 thermal data

Figure 50. SO-8 thermal impedance junction ambient single pulse

DS13649 - Rev 2

Pulse calculation formula:

Z

= RTH.δ+ Z

THδ

Z

= RTH.δ+ Z

THδ

THtp

THtp

(1-δ)

(1-δ)

where δ = tp/T

page 33/47

L99VR01

SO-8 thermal data

Figure 51. Thermal fitting model of a Vreg in SO-8

Table 17. SO-8 thermal parameter

Area/island (cm2) Footprint 2 8 4L

R1 (°C/W) 4.4

R2 (°C/W) 4.5

R3 (°C/W) 6

R4 (°C/W) 28 23 23 23

R5 (°C/W) 30 24 21 19

R6 (°C/W) 41.6 25 21 14

C1 (W.s/°C) 0.0001

C2 (W.s/°C) 0.002

C3 (W.s/°C) 0.03

C4 (W.s/°C) 0.05

C5 (W.s/°C) 0.15

C6 (W.s/°C) 1.4 3 5 5.5

DS13649 - Rev 2

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7 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.

7.1 PowerSSO-12 package information

Figure 52. PowerSSO-12 package dimensions

L99VR01

Package information

DS13649 - Rev 2

Table 18. PowerSSO-12 package mechanical data

Symbol

Min Typ. Max

A 1.250 1.620

A1 0.000 0.100

A2 1.100 1.650

b 0.230 0.410

c 0.190 0.250

D 4.800 5.000

Millimeters

page 35/47

Symbol Millimeters

E 3.800 4.000

e 0.800

H 5.800 6.200

h 0.250 0.500

L 0.400 1.270

k 0° 8°

X 2.200 2.800

Y 2.900 3.500

ddd 0.100

7.2 SO-8 package information

L99VR01

SO-8 package information

Figure 53. SO-8 package dimension

DS13649 - Rev 2

Table 19. SO-8 package mechanical data

Symbol

Min Typ. Max

A 1.75

A1 0.10 0.25

A2 1.25

b 0.28 0.48

c 0.17 0.23

(1)

D

E 5.80 6.00 6.20

4.80 4.90 5.00

Millimeters

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L99VR01

SO-8 package information

Symbol Millimeters

(2)

E1

e 1.27

h 0.25 0.50

L 0.40 1.27

L1 1.04

k 0° 8°

ccc 0.10

1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed

0.15 mm in total (both side).

2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per

side.

3.80 3.90 4.00

DS13649 - Rev 2

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7.3 PowerSSO-12 packaging information

Figure 54. PowerSSO-12 tape and reel shipment (suffix “TR”)

L99VR01

PowerSSO-12 packaging information

DS13649 - Rev 2

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7.4 SO-8 packaging information

Figure 55. SO-8 tape and reel shipment (suffix “TR”)

L99VR01

SO-8 packaging information

DS13649 - Rev 2

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8 Order codes

Package Tape & reel

P/N Enable Reset

L99VR01STR X X - - -

L99VR01JTR X X X X X

Order codes

Order code L99VR01

SO-8 L99VR01STR

PowerSSO-12 L99VR01JTR

Autonomous

watchdog

Advanced

thermal warning

L99VR01

Order codes

Ishort CTRL

DS13649 - Rev 2

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Revision history

Table 20. Document revision history

Date Version Changes

02-Mar-2021 1 Initial release

13-Apr-2021 2

Updated Table 11. Thermal warning and protection (only for L99VR01J) ;

Section 2.4 Electrical characteristics curves.

L99VR01

DS13649 - Rev 2

page 41/47

L99VR01

Contents

Contents

1 Block diagram and pins description................................................3

2 Electrical specifications ...........................................................6

2.1 Absolute maximum ratings.......................................................6

2.2 Thermal data ..................................................................7

2.2.1 Thermal resistance .......................................................7

2.2.2 Thermal protection .......................................................7

2.3 Electrical characteristics.........................................................8

2.4 Electrical characteristics curves .................................................13

3 Test circuit and waveforms plot ...................................................17

3.1 Load regulation ...............................................................17

4 Application information ...........................................................18

4.1 Voltage regulator ..............................................................19

4.2 Output current limitation ........................................................19

4.3 Output voltage selection........................................................20

4.4 Enable ......................................................................21

4.5 Reset .......................................................................22

4.6 Autonomous watchdog.........................................................22

4.7 Thermal warning and thermal shutdown ..........................................23

4.8 Overvoltage detection by advanced thermal warning read-out ........................24

4.9 Fast output discharge ..........................................................25

4.10 Undervoltage lockout UVLO ....................................................25

4.11 Functional safety management ..................................................26

5 Application .......................................................................28

6 Package and PCB thermal data ...................................................29

6.1 PowerSSO-12 Thermal data ....................................................29

6.2 SO-8 thermal data.............................................................32

7 Package information ..............................................................35

7.1 PowerSSO-12 package information ..............................................35

7.2 SO-8 package information ......................................................36

DS13649 - Rev 2

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L99VR01

Contents

7.3 PowerSSO-12 packaging information.............................................38

7.4 SO-8 packaging information ....................................................39

8 Order codes ......................................................................40

Revision history .......................................................................41

Contents ..............................................................................42

List of tables ..........................................................................44

List of figures..........................................................................45

DS13649 - Rev 2

page 43/47

L99VR01

List of tables

List of tables

Table 1. Pins description ....................................................................4

Table 2. Absolute maximum ratings .............................................................6

Table 3. Operation junction temperature ..........................................................7

Table 4. Temperature threshold ................................................................7

Table 5. Electrical characteristics ...............................................................8

Table 6. Fast output discharge ................................................................ 10

Table 7. Reset ...........................................................................10

Table 8. Watchdog (only for L99VR01J) ......................................................... 11

Table 9. Enable .......................................................................... 11

Table 10. Output voltages selectors ............................................................. 11

Table 11. Thermal warning and protection (only for L99VR01J) .......................................... 11

Table 12. Truth table ....................................................................... 20

Table 13. Watchdog timer .................................................................... 23

Table 14. Safety requirement.................................................................. 26

Table 15. Implemented safety mechanism......................................................... 26

Table 16. PowerSSO-12 thermal parameter ....................................................... 31

Table 17. SO-8 thermal parameter .............................................................. 34

Table 18. PowerSSO-12 package mechanical data .................................................. 35

Table 19. SO-8 package mechanical data ......................................................... 36

Table 20. Document revision history ............................................................. 41

DS13649 - Rev 2

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L99VR01

List of figures

List of figures

Figure 1. Functional block diagram of L99VR01S ................................................... 3

Figure 2. Functional block diagram of L99VR01J ................................................... 4

Figure 3. Pins configuration ..................................................................5

Figure 4. Output voltage vs Tj ............................................................... 13

Figure 5. Output voltage vs VS .............................................................. 13

Figure 6. Drop voltage vs output current ........................................................13

Figure 7. Current consumption vs output current .................................................. 13

Figure 8. Current consumption vs input voltage (Io < 1mA) ........................................... 13

Figure 9. Current consumption vs input voltage (Io = 50 mA) ..........................................13

Figure 10. Current consumption vs input voltage (Io= 100 mA) .........................................14

Figure 11. Short-circuit current vs Tj (Ishort pin floating) ..............................................14

Figure 12. Short-circuit current vs Tj (Ishort pin tied to GND) ........................................... 14

Figure 13. Short-circuit current vs input voltage .................................................... 14

Figure 14. Output voltage vs enable voltage (VO =0.8 V) ............................................. 14

Figure 15. Output voltage vs enable voltage (VO =1.2 V) ............................................. 14

Figure 16. Output voltage vs enable voltage (VO =1.5 V) ..............................................15

Figure 17. Output voltage vs enable voltage (VO =1.8 V) ............................................. 15

Figure 18. Output voltage vs enable voltage (VO =2.5 V) ............................................. 15

Figure 19. Output voltage vs enable voltage (VO =2.8 V) ..............................................15

Figure 20. Output voltage vs enable voltage (VO =3.3 V) ............................................. 15

Figure 21. Output voltage vs enable voltage (VO =5 V) ............................................... 15

Figure 22. VEn_high vs Tj ..................................................................15

Figure 23. VEn_low vs Tj ................................................................... 15

Figure 24. Vwhth vs Tj ..................................................................... 16

Figure 25. Vwlth vs Tj ...................................................................... 16

Figure 26. Icwc vs Tj....................................................................... 16

Figure 27. Icwd vs Tj ...................................................................... 16

Figure 28. PSRR ......................................................................... 16

Figure 29. Load regulation test circuit ........................................................... 17

Figure 30. Maximum load variation response ..................................................... 17

Figure 31. Application schematic ..............................................................18

Figure 32. Application schematic – Post regulation .................................................. 18

Figure 33. Behavior of output current versus regulated voltage Vo .......................................19

Figure 34. Ishort versus Rsh .................................................................20

Figure 35. Example of output voltage selection .................................................... 21

Figure 36. Typical example of enable control ......................................................21

Figure 37. Reset timing diagram............................................................... 22

Figure 38. Watchdog timing diagram............................................................ 23

Figure 39. Thermal warning diagram............................................................ 24

Figure 40. Square wave on TW pin generated during an overvoltage ..................................... 24

Figure 41. Warning signal caused by overvoltage and thermal warning on TW pin ............................25

Figure 42. Undervoltage lockout on output voltage .................................................. 26

Figure 43. Typical application.................................................................28

Figure 44. PowerSSO-12 PC board ............................................................ 29

Figure 45. Rthj-amb vs PCB copper area in open box free air condition (PowerSSO-12) ........................ 30

Figure 46. PowerSSO-12 thermal impedance junction ambient single pulse................................. 30

Figure 47. Thermal fitting model of a Vreg in PowerSSO-12 ........................................... 31

Figure 48. SO-8 PC board................................................................... 32

Figure 49. Rthj-amb vs PCB copper area in open box free air condition.................................... 33

Figure 50. SO-8 thermal impedance junction ambient single pulse ....................................... 33

Figure 51. Thermal fitting model of a Vreg in SO-8 .................................................. 34

DS13649 - Rev 2

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L99VR01

List of figures

Figure 52. PowerSSO-12 package dimensions .................................................... 35

Figure 53. SO-8 package dimension............................................................ 36

Figure 54. PowerSSO-12 tape and reel shipment (suffix “TR”) .......................................... 38

Figure 55. SO-8 tape and reel shipment (suffix “TR”) ................................................39

DS13649 - Rev 2

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L99VR01

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DS13649 - Rev 2

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