STMicroelectronics L5973AD User Guide
L5973AD
Fi
2A SWITCH STEP DOWN SWITCHING REGULATOR
1 GENERAL FEATURES
■ 2A INTERNAL SWITCH
■
OPERATING INPUT VOLTAGE FROM 4.4V TO 36V
■ 3.3V / (±2%) REFERENCE VOLTAGE
■ OUTPUT VOLTAGE ADJUSTABLE FROM
1.235V TO 35V
■ LOW DROPOUT OPERATION: 100% DUTY
CYCLE
■ 500KHz INTERNALLY FIXED FREQUENCY
■ VOLTAGE FEEDFORWARD
■ ZERO LOAD CURRENT OPERATION
■ INTERNAL CURRENT LIMITING
■ INHIBIT FOR ZERO CURRENT
CONSUMPTION
■ SYNCHRONIZATION
■ PROTECTION AGAINST FEEDBACK
DISCONNECTION
■ THERMAL SHUTDOWN
1.1 APPLICATIONS:
■ CONSUMER: STB, DVD, TV, VCR,CAR
RADIO, LCD MONITORS
■ NETWORKING: XDSL, MODEMS,DC-DC
MODULES
■ COMPUTER: PRINTERS, AUDIO/GRAPHIC
CARDS, OPTICAL STORAGE, HARD DISK
DRIVE
■ INDUSTRIAL: CHARGERS, CAR BATTERY
DC-DC CONVERTERS
2 DESCRIPTION
The L5973AD is a step down monolithic power
gure 1. Package
HSOP8 (Exposed pad)
Table 1. Order Codes
Part Number Package
L5973AD HSOP8
L5973ADTR HSOP8 in Tape & Reel
switching regulator with a switch current limit of 2A so
it is able to deliver more than 1.5A DC current to the
load depending on the application conditions.
The output voltage can be set from 1.235V to 35V.
The high current level is also achieved thanks to an
SO8 package with exposed frame, that allows to reduce the R
th(j-amb)
down to approximately 40°C/W
The device uses an internal P-Channel D-MOS transistor (with a typical of 200m
Ω
) as switching element
to avoid the use of bootstrap capacitor and guarantee
high efficiency.
An internal oscillator fixes the switching frequency at
500KHz to minimize the size of external components.
Having a minimum input voltage of 4.4V only, it is
particularly suitable for 5V bus, available in all computer related applications.
Pulse by pulse current limit with the internal frequency modulation offers an effective constant current
short circuit protection.
Figure 2. Test and Application Circuit
VREF
3.3V
C4
22nF
C3
220pF
VCC
SYNC.
COMP
December 2004
VIN = 4.4V to 35V
C1
10µF
35V
CERAMIC
R3
4.7K
6
8
L5973AD
2
4
L1 15µH
OUT
1
D1
STPS340U
7
GNDINH
D03IN1453
5
FB
3
R1
5.6K
R2
3.3K
VOUT=3.3V
C2
330µF
10V
Rev. 3
1/14
L5973AD
Table 2. Thermal Data
Symbol Parameter Value Unit
R
th (j-amb)
(*) Package mounted on board
Figure 3. Pin Connection (top view)
Table 3. Pin Description
N. Name Description
1 OUT Regulator Output.
2 SYNC Master/Slave Synchronization. When it is open, a signal synchronous with the turn-off of the inter-
3INH
4 COMP E/A output to be used for frequency compensation.
5 FB Stepdown feedback input. Connecting the output voltage directly to this pin results in an output
6V
7 GND Ground.
8V
Thermal Resistance Junction to ambient Max. 40 (*) °C/W
VCC
OUT
SYNC
INH
COMP
1
2
3
4
D98IN955
8
GND
7
VREF
6
FB
5
nal power is present at the pin. When connected to an external signal at a frequency higher than
the internal one, then the device is synchronized by the external signal.
Connecting together the SYNC pin of two devices, the one with the higher frequency works as
master and the other one, works as slave.
A logical signal (active high) disables the device. With IHN higher than 2.2V the device is OFF and with
INH lower than 0.8V, the device is ON.
If INH is not used the pin must be grounded. When it is open, an internal pull-up disables the device.
voltage of 1.235V. An external resistor divider is required for higher output voltages (the typical
value for the resistor connected between this pin and ground is 4.7K).
Reference voltage of 3.3V. No filter capacitor is needed to stability.
REF
Unregulated DC input voltage.
CC
Table 4. Absolute Maximum Ratings
Symbol Parameter Value Unit
2/14
V
V
I
1
, V
V
4
V
V
P
tot
T
T
stg
Input Voltage 40 V
8
Output DC voltage
1
Output peak voltage at t = 0.1µs
-1 to 40
-5 to 40
Maximum output current int. limit.
Analog pins 4 V
5
INH -0.3V to V
3
SYNC -0.3 to 4 V
2
Power dissipation at T
Operating junction temperature range -40 to 150 °C
j
≤ 60°C 2.25 W
amb
Storage temperature range -55 to 150 °C
CC
V
V
L5973AD
Table 5. Electrical Characteristics (Tj = 25°C, VCC = 12V, unless otherwise specified.)
Symbol Parameter Test Condition Min. Typ. Max. Unit
V
R
DSON
DYNAMIC CHARACTERISTICS (see test circuit ).
V
DC CHARACTERISTICS
I
qop
I
qst-by
INHIBIT
ERROR AMPLIFIER
V
V
I
o source
I
o sink
gm Transconductance I
SYNC FUNCTION
REFERENCE SECTION
Note: 1. Guaranteed by design
Operating input voltage range Vo = 1.235V; Io = 2A 4.4 36 V
CC
Mosfet on Resistance 0.250 0.5 Ω
Maximum limiting current VCC = 4.4V to 36V 2 2.3 A
I
l
Switching frequency 500 KHz
f
s
Duty cycle 0 100 %
Voltage feedback 4.4V < VCC < 36V 1.220 1.235 1.25 V
5
η Efficiency V
= 5V, VCC = 12V 90 %
O
Total Operating Quiescent Current 5 7 mA
Quiescent current Duty Cycle = 0; VFB = 1.5V 2.7 mA
I
q
Total stand-by quiescent current V
> 2.2V 50 100 µA
inh
INH Threshold Voltage Device ON 0.8 V
Device OFF 2.2 V
High level output voltage VFB = 1V 3.5 V
OH
Low level output voltage VFB = 1.5V 0.4 V
OL
Source output current V
Sink output current V
Source bias current 2.5 4 µA
I
b
DC open loop gain R
High Input Voltage V
Low Input Voltage V
Slave Sink Current
Master Output Amplitude I
Output Pulse Width no load, V
= 1.9V; VFB = 1V 200 300 µA
COMP
= 1.9V; VFB = 1.5V 1 1.5 mA
COMP
= ∞ 50 57 dB
L
= -0.1mA to 0.1mA
comp
V
= 1.9V
COMP
= 4.4V to 36V 2.5 V
CC
= 4.4V to 36V 0.74 V
CC
= 0.74V
V
sync
V
= 2.33V
sync
= 3mA 2.75 3 V
source
(1)
= 1.65V 0.20 0.35 µs
sync
0.11
0.21
2.3 mS
Reference Voltage 3.234 3.3 3.366 V
I
= 0 to 5mA
REF
3.2 3.3 3.399 V
VCC = 4.4V to 36V
Line Regulation I
REF
= 0mA
510mV
VCC = 4.4V to 36V
Load Regulation I
= 0 to 5mA 8 15 mV
REF
Short Circuit Current 10 18 30 mA
REF
0.25
0.45mAmA
V
3/14
L5973AD
3 FUNCTIONAL DESCRIPTION
The main internal blocks are shown in Fig. 1, where is reported the device block diagram. They are:
● A voltage regulator that supplies the internal circuitry. From this regulator, a 3.3V reference
voltage is externally available.
● A voltage monitor circuit that checks the input and internal voltages.
● A fully integrated sawtooth oscillator whose frequency is500KHz
● Two embedded current limitations circuitries which control the current that flows through the
power switch. The Pulse by Pulse Current Limit forces the power switch OFF cycle by cycle
if the current reaches an internal threshold, while the Frequency Shifter reduces the switching frequency in order to strongly reduce the duty cycle.
● A transconductance error amplifier.
● A pulse width modulator (PWM) comparator and the relative logic circuitry necessary to drive
the internal power.
● An high side driver for the internal P-MOS switch.
● An inhibit block for stand-by operation.
● A circuit to realize the thermal protection function.
Figure 4. Block Diagram
VCC
VOLTAGES
MONITOR
PWM
+
-
THERMAL
SHUTDOWN
SUPPLY
1.235V 3.5V
PEAK TO PEAK
CURRENT LIMIT
DCkQ
DRIVER
FREQUENCY
SHIFTER
GND OUT
V
REF
BUFFER
LPDMOS
POWER
D00IN1125
V
REF
INH
COMP
FB
SYNC
TRIMMING
1.235V
INHIBIT
E/A
-
+
OSCILLATOR
3.1 POWER SUPPLY & VOLTAGE REFERENCE
The internal regulator circuit (shown in Figure 2) consists of a start-up circuit, an internal voltage Preregulator, the Bandgap voltage reference and the Bias block that provides current to all the blocks.
The Starter gives the start-up currents to the whole device when the input voltage goes high and the device is enabled (inhibit pin connected to ground).
The Preregulator block supplies the Bandgap cell with a preregulated voltage V
that has a very low
REG
supply voltage noise sensitivity.
4/14
3.2 VOLTAGES MONITOR
An internal block senses continuously the Vcc, V
and Vbg. If the voltages go higher than their thresholds, the
ref
regulator starts to work. There is also an hysteresis on the V
Figure 5. Internal Regulator Circuit
V
CC
(UVLO).
CC
L5973AD
STARTER
IC BIAS
D00IN1126
PREREGULATOR
VREG
BANDGAP
VREF
3.3 OSCILLATOR & SYNCHRONIZATOR
Figure 6 shows the block diagram of the oscillator circuit.
The Clock Generator provides the switching frequency of the device that is internally fixed at 500KHz. The frequency
shifter block acts reducing the switching frequency in case of strong overcurrent or short circuit. The clock signal is
then used in the internal logic circuitry and is the input of the Ramp Generator and Synchronizator blocks.
The Ramp Generator circuit provides the sawtooth signal, used to realize the PWM control and the internal voltage feed forward, while the Synchronizator circuit generates the synchronization signal. Infact the device has a
synchronization pin that can works both as Master and Slave.
As Master to synchronize external devices to the internal switching frequency.
As Slave to synchronize itself by external signal.
In particular, connecting together two devices, the one with the lower switching frequency works as Slave and
the other one works as Master.
To synchronize the device, the SYNC pin has to pass from a low level to a level higher than the synchronization
threshold with a duty cycle that can vary approximately from 10% to 90%, depending also on the signal frequency and amplitude.
The frequency of the synchronization signal must be at least higher than the internal switching frequency of the
device (500KHz).
5/14
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