Demonstration board for MASTERGAN5 high power density half-bridge high
voltage driver with two 650 V enhanced mode GaN HEMT
Features
•Half-bridge evaluation board equipped with MASTERGAN5 and able to
withstand 600 V
•VCC input on screw connector or pin strip configured for MASTERGAN5 supply
voltages
•Complete set of features to drive MASTERGAN5 with single or complementary
driving signal
•Embedded deadtime generator to convert single PWM signal into dual
complementary LIN and HIN signals with independently adjustable deadtimes
•On-board 3.3 V regulator for external circuitry supply (up to 50 mA)
•35°C/W junction to ambient thermal resistance to evaluate large power
topologies
•High frequency connector for MASTERGAN5 GL and GH pin monitoring
•Spare footprint for low-side shunt, external bootstrap capacitors and high
voltage high capacitance bulk capacitor
•RoHS compliant
Product status link
EVALMASTERGAN5
Description
The EVALMASTERGAN5 board is an easy to use and quick to adapt tool to evaluate
the characteristics of MASTERGAN5 and to quickly create new topologies without
the need of complete PCB design.
The EVALMASTERGAN5 provides an on-board programmable inputs deadtime
generator with a single VCC supply (typ. 6 V). An embedded linear voltage regulator
offers 3.3 V rail to supply low voltage logic circuit like microcontrollers or FPGA.
Some spare footprint is also included to customize the board to operate with final
application. These customizations include: use of separate input signal or single
PWM signal, use of external bootstrap diode, separate supply for VCC, PVCC or Vbo
and also the use of low-side shunt resistor for peak current mode topologies.
All pins of the MASTERGAN5 are accessible.
The EVALMASTERGAN5 is 56 x 70 mm wide, FR-4 PCB resulting in an R
35°C/W, without forced airflow.
th(J-A)
of
DB4463 - Rev 1 - April 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
Page 2
1Architecture and components placement
Figure 1. EVALMASTERGAN5 – top component placement
The following image shows how to supply the MASTERGAN5, how to provide LIN and HIN inputs and set the
programmable deadtime generator.
Figure 3. Supply and signal connection
EVALMASTERGAN5
Board power-up and input connection
The LIN, HIN inputs can be supplied form the on-board deadtime generator or directly from an external generator
(as DSP/MCU) with the following settings:
Table 1. Connector map
Ref
J2
J3
Pin #NameFunctionDescription
1VCCINPUT powerBoard supply voltage: set to a value between 4.5 V and 6 V
2VDD (3V3)OUT power
3GNDPWRBoard reference potential
4HIN_BOUT digitalBuffered HIN signal (0-3.3 V level output)
5LIN_BOUT digitalBuffered LIN signal (0-3.3 V level output)
6GNDPWRBoard reference potential
7PWMINPUT digitalPWM input signal (0 to 3.3 V or 5 V) – see Table 3
8SD_ININPUT digitalDisable input signal (0 to 3.3 V or 5 V) – see Table 3
9GNDPWRBoard reference potential
1HIN
2GNDPWRBoard reference potential
3GNDPWRBoard reference potential
OUT (INPUT)
digital
Output voltage of on-board 3.3 V regulator: it can be used to
supply external circuitry (50 mA max.)
The pin is connected to HIN pin of MASTERGAN5: the pin can
be used either to monitor the output of the deadtime generator or
to force the input to MASTERGAN5 according to the status of R4
(see Table 2)
DB4463 - Rev 1
page 3/13
Page 4
EVALMASTERGAN5
Board power-up and input connection
RefPin #NameFunctionDescription
J3
J41,2,3HVINPUT Power
J51,2,3OUTOUTPUT Power
J61,2,3LS_SPOWER
J12
CN1GHOUTPUT
CN2GLOUTPUT
4LIN
1VCCINPUT PowerBoard supply voltage: set to a value between 4.5 V and 6 V
2GNDPOWERBoard reference potential
OUT (INPUT)
digital
The pin is connected to LIN pin of MASTERGAN5: the pin can
be used either to monitor the output of the deadtime generator or
to force the input to MASTERGAN5 according to the status of R7
(see Table 2)
These three pins are connected to VS pins of MASTERGAN5:
connect high voltage potential to this pin according to
MASTERGAN5 recommended values (520 V)
These three pins are connected to OUT pins of MASTERGAN5:
connect the load to this terminal (resonant tanks, transformers,…)
These three pins are connected to SENSE pins of
MASTERGAN5: the board is configured with shorted sense
resistor (R15), therefore this pin can be connected to the
reference voltage of high voltage potential (GND_P)
To be used with proper MMCX male connector to monitor the
GH pin of MASTERGAN5 with high bandwidth, high voltage
differential probes (optically isolated probes are recommended)
To be used with proper MMCX male connector to monitor the
GL pin of MASTERGAN5 with high bandwidth differential probes
(optically isolated probes are recommended)
Table 2. Device input selection
R4, R7
0-47 Ω (closed)J2: PWM pin
OpenJ3: LIN & HIN pin
Input sourceFunction and description
LIN & HIN are generated by the on-board deadtime generator
from a single PWM signal on J2, PIN 7.
Direct connection to LIN & HIN MASTERGAN5 pins.
LIN, HIN input range: up to 20 V
Table 3. Input signal truth table
SD_IN
LXLL
HLHL
HHLH
PWMLINHIN
The recommended power-on sequence is to turn VCC on first, then apply the HV bus voltage. The recommended
power-off sequence is to turn off the HV bus supply first, then VCC.
DB4463 - Rev 1
page 4/13
Page 5
3Schematic diagram
P G N D
G N D _ P O W E R
BOOT_ I N
L S_ S
4 7 R
VCC
VCC
HV
PVCC
VCC
VCC
HV
PVCC
BOOT
HV
VCC
OUTb
GL
GH
LIN
HIN
SD_IN
PGND
LS_S
TP1 3
C19
33 0p F/X 7R
R130 R
J06 03
D5
BZ T58 5B6 V2T
SOD 523
TP1 4
TP8
C10
1u F/ 25 V/X 5R
C08 05
R10
1k
C15
4.7 uF/ 25V
C08 05
D3 A
N.M . TU M D2 SM
12
TP2
C17
47 nF/ 25 V/ X7R
C04 02
J9
N.M .
12
D4
BZ T58 5B6 V2T
SOD 523
R17
N.M .
J08 05
C14
N.M .
C04 02
C16
47 nF/ 25 V/ X7R
C04 02
R120R
J06 03
J4
123
TP9
C23
22 pF/ 25 V
TP1 5
C13
47 nF/ 25 V/ X7R
C04 02
TP3
J6
123
TP6
TP1 8
TP1 0
TP1 1
D3
N.M .SM A
12
TP4
J5
123
TP1 6
R211 0R
R06 03
R16
N.M .
J08 05
R14 10 R
R08 05
C18
N.M .
C04 02
R9
10 k
R15
0R
C22
1u F/ 10 V/X 7R
C06 03
TP1 2
JP3
CLO SED
J06 03
J1
N.M .
12
C11
1u F/ 25 V/X 5R
C08 05
J11
N.M .
1
2
J7
N.M .
12
JP1
OP EN
J06 03
U6
PVCC
1
GL
2
PGND
3
SENSE
4
SENSE
5
SENSE
6
SENSE
7
SENSE
8
SENSE
9
SENSE
10
SENSE
11
OUT12OUT13OUT
14
VS
15
VS
16
VS
17
VS
18
VS
19
GH
20
OUTb
21
BOOT
22
LIN
24
SD/OD
HIN
26
VCC27GND
28
EP1_GND
32
EP3_OUT
34
EP2_SNS
33
TP19
C20
22pF/25V
J10
N.M.
1
2
3
R110R
J0603
TP17
SD
SD
HIN
LIN
PGND
PGND
OUT
BOOTpin
VCCpin
PGND
PVCCpin
OUT
BOOTpin
OUTb
PVCCpin
LIN
HIN
OUTb
25
MASTERGAN5
Figure 4. EVALMASTERGAN5 schematic – High density power driver
EVALMASTERGAN5
Schematic diagram
DB4463 - Rev 1
page 5/13
Page 6
HS DT
NOTBUFFER
L S DT
BUFFERBUFFER
LS Vgs
HS Vgs
El ect r .
P 10
VDD
VDD
VDD
VDD
VDD
VDD
VCC
VCC
VCC
HV
HIN
LIN
GH
GL
OUTb
SD_IN
PGND
U4
74LVC1G17W5
NC
1A2
GND
3
Y
4
VCC
5
C7
330pF/X7R
C0603
C29
N.M.
C2225
C6
100nF/25V/X7R
C0603
R4 47R
R0603
R3N.M.
J0603
J2
123
45678
9
TR1
1K
R20 0R
J0603
U2
74LVC1G17W5
NC
1A2
GND
3
Y
4
VCC
5
CN1
BNC conn.
S
1
G1
2
G2
3
G3
4
G4
5
R6N.M.
J0603
C25
1uF/10V/X7R
C0603
R23 0R
J0603
R8
47k
R0603
C24
100nF/25V/X7R
C0603
C3
330pF/X7R
C0603
JP2 OPEN
J0603
C26
1uF/10V/X7R
C0603
R19 0R
J0603
J12
1
2
TR2
1K
C5
100nF/25V/X7R
C0603
C8
22pF/25V
C0603
U5
KF33BD-TR
Vout
1
GND3GND
2
GND
6
GND
7
Vin8INH
5
C28
470nF/630V/X7R
C2225
J3
123
4
D2 BAS70J
sod-323
12
CN2
BNC conn.
S
1
G1
2
G2
3
G3
4
G4
5
R1 0R R0402
+
C27
N.M.
U3
74LVC1G14W5
NC
1
A2GND
3
Y
4
VCC
5
R22 0R
J0603
U1
74LVC1G17W5
NC
1
A2GND
3
Y
4
VCC
5
C1
100nF/25V/X7R
C0603
R2 0R R0402
D1 BAS70J
sod-323
12
C2
100nF/25V/X7R
C0603
R18 0R
J0603
R7 47R
R0603
HIN_B
LIN_B
PWM
HIN_B
LIN_B
PWM
EVALMASTERGAN5
Schematic diagram
Figure 5. EVALMASTERGAN5 schematic – Deadtime generator and connectors
DB4463 - Rev 1
page 6/13
Page 7
4Bill of material
Item Q.tyRef.ValueDescriptionManufacturerPart Number
Figure 3. Supply and signal connection ..........................................................3
Figure 4. EVALMASTERGAN5 schematic – High density power driver ....................................5
Figure 5. EVALMASTERGAN5 schematic – Deadtime generator and connectors .............................6
DB4463 - Rev 1
page 12/13
Page 13
EVALMASTERGAN5
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