1
Micro QFN 16L 3.5 mm x 1.2 mm
(bottom view)
R1
DAT2_Ex
DAT3_Ex
CMD_Ex
CLK_Ex
DAT0_Ex
DAT1_Ex
Vcc
DAT2_In
DAT3_In
CMD_In
DAT0_In
DAT1_In
WP/CD
DAT3 pull-up
DAT3 pull-down
R2
R3
R4
R5
R6
R1
R8
R9
R10
R11
R7
DAT2_Ex
DAT3_Ex
CMD_Ex
CLK_Ex
DAT0_Ex
DAT1_Ex
Vcc
DAT2_In
DAT3_In
CLK_In
DAT0_In
DAT1_In
WP/CD
DAT3 pull-up
DAT3 pull-down
R12
R2
R3
R4
R5
R6
R13
GND
GND
EMIF06-MSD02N16
Datasheet
6-line IPAD EMI filter and ESD protection in micro QFN package
Features
• High design flexibility
• Lead free package
• Very low PCB space consuming: 3.5 mm x 1.2 mm
• Very thin package: 0.55 mm max.
• High efficiency in ESD suppression
• Complies with following standards:
– IEC 61000-4-2 level 4 externals pins
• High reliability offered by monolithic integration
• High reduction of parasitic elements through integration and μQFN packaging
Product status
EMIF06-MSD02N16
Product label
Applications
Where EMI filtering in ESD sensitive equipment is required:
• Mobile telephones
• Navigation systems
• Digital still cameras
• Portable devices
Description
The EMIF06-MSD02N16 is a 6-line, highly integrated device designed to suppress
EMI/RFI noise in all systems exposed to electromagnetic interference.
This filter includes an ESD protection circuitry, which prevents damage to the
application when subjected to ESD surges.
DS5979 - Rev 5 - January 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
1 Characteristics
EMIF06-MSD02N16
Characteristics
Figure 1. Pin configuration
DS5979 - Rev 5
Symbol
V
PP
T
j
T
op
T
stg
Table 1. Absolute maximum ratings (T
Parameter Value Unit
ESD IEC 61000-4-2
Contact discharge:
• on DATx_In, CMD_In and CLK_In pins
• On all other pins
Air discharge:
• on DATx_In, CMD_In and CLK_In pins
• On all other pins
Maximum junction temperature 125 °C
Operating temperature range - 30 to + 85 °C
Storage temperature range - 55 to + 150 °C
amb
= 25 °C)
±2
±8
±12
±15
kV
page 2/14
Figure 2. Electrical characteristics (definitions)
V
BR
I
PP
V
RM
V
F
I
F
I
I
RM
I
R
V
V
CL
Symbol Parameter
V
BR
Breakdown voltage
I
RM
Leakage current at VRM
V
RM
Stand-off voltage
VCL Clamping voltage
Rd Dynamic resistance
IPP Peak pulse current
R
I/O
Series resistance between Input and Output
C
line
Input capacitance per line
EMIF06-MSD02N16
Characteristics
Symbol
V
BR
I
RM
Table 2. Electrical characteristics (T
Test conditions Min. Typ. Max. Unit
IR = 1 mA
VRM = 3 V per line
amb
= 25 °C)
5 8 V
200 nA
R1, R2, R3, R4, R5, R6 Series resistors - tolerance ±20% 36 45 54 Ω
R7, R8, R9, R10, R11, R12 Pull-up resistors 80 90 100 kΩ
R13 Pull-down resistor - tolerance ±20% 375 470 565 kΩ
C
line
V
LINE
= 0 V dc, V
= 30 mV, F = 1 MHz
OSC
20 pF
DS5979 - Rev 5
page 3/14
1.1 Characteristics (curves)
dB
100.0k 1.0M 10.0M 100.0M 1.0G
-50.00
-40.00
-30.00
-20.00
-10.00
0.00
DAT0
DAT1
DAT2 DAT3
CLK
CMD
F (Hz)
100.0k 1.0M 10.0M 100.0M 1.0G
-140.00
-130.00
-120.00
-110.00
-100.00
-90.00
-80.00
-70.00
-60.00
-50.00
-40.00
-30.00
-20.00
-10.00
0.00
DAT2
-DAT3
DAT2
-DAT1
F (Hz)
IN
OUT
55V Max
39V Max
IN
OUT
-41V Max
-34V Max
C
LINE
(pF)
0
2
4
6
8
10
12
14
16
0.0 1.0 2.0 3.0 4.0 5.0
V
LINE
(V)
EMIF06-MSD02N16
Characteristics (curves)
Figure 3. S21 attenuation measurement
Figure 5. ESD response to IEC 61000-4-2 (+12 kV air
discharge) on one input (Vin) and on one output (V
out
Figure 4. Analog cross talk measurements
Figure 6. ESD response to IEC 61000-4-2 (- 12 kV air
)
discharge) on one input (Vin) and on one output (V
out
)
Figure 7. Line capacitance versus reverse voltage applied on DATx and CMD line
DS5979 - Rev 5
page 4/14
2 Application information
Contact when
insertingthe
card
SD card
Pull-up
resistor
V
DD
GND
WP/CD
GND
Host
controller
The EMIF06-mSD02N16 is a dedicated interface device for micro SD card/T-Flash card in mobile phones. The
device provides:
• ESD protection
• EMI filterering
• Pull-up resistors
• Card detection circuit
2.1 ESD protection
Each pin is connected to a TVS diode able to withstand 12 kV on all pins except on DATx_In, CMD_In and
CLK_In.
2.2 EMI filtering
DATx, CMD and CLK lines are immunized against EMI radiations thanks to pi-filters. To avoid any degradation
of the signal integrity at high frequency, the total line capacitance stays lower than 20 pF making the device
compatible with a clock frequency up to 52 MHz.
EMIF06-MSD02N16
Application information
2.3 Pull-up resistors
As recommended by the SD Specifications (Part 1 Physical Layer Version 2.00), all the data lines DATx and the
CMD line must be pulled-up with resistors of 10 to 100 kΩ to avoid bus floating not only in SD 4-bit mode but also
in SD 1-bit and SPI mode.
For the EMIF06-MSD02N16 device the pull-up resistor value has been fixed at 90 kΩ. This value makes the
EMIF06-MSD02N16 compatible with most of the level shifters that may be used in the circuit including auto
direction-sensing translators known to exhibit a weak current output.
2.4
Card detection circuit
The EMIF06-mSD02N16 provides the flexibility to use either mechanical card detection with a dedicated pin
connected to the memory card slot or the electrical card detection using the internal pull resistor of DAT3 of the
micro SD card/T-Flash card.
In case of mechanical card detection, the user must add a pull-up on the circuit connected to the CD (Card
Detect) of the micro-SD/T-Flash slot as shown in Figure 8.
Figure 8. Mechanical card detection
DS5979 - Rev 5
page 5/14
Card detect pin Card detect host input
Pin 1–DAT2
Pin 2–CD/DAT3
Pin 3–CMD
Pin 5–CLK
Pin 6–GND
Pin 7–DAT0
Pin 8–DAT1
Card detect pul l
-
up
Top level
DAT3 pull-up
Pin 4–VCC
NC
HO ST CO NT ROLLE RHO ST CO NT ROLLE R
Card detect pull- up
Top level
DAT3 pull-up
Card detect pinCard detect host input
Pin 1–DAT2
Pin 2–CD/DAT3
Pin 3–CMD
Pin 5–CLK
Pin 6–GND
Pin 7–DAT0
Pin 8–DAT1
Pin 4–VCC
NC
HO ST CO NT ROLL ERHO ST CO NT ROLL ER
Bottom view Top view
SD card
DAT3 (CD)
50 kΩ
0
GND
Host
contr oller
Pull -d own
resistor
V
DD
Pin 1–DAT2
Pin 2–CD/DAT3
Pin 3–
CMD
Pin 5–
CLK
Pin 6–
GND
Pin 7–DAT0
Pin 8–DAT1
Top level
DAT3 pull
Pin 4–
VCC
Pin 1–DAT2
Pin 2–CD/DAT3
Pin 3–
CMD
Pin 5–
CLK
Pin 6–
GND
Pin 7–DAT0
Pin 8–DAT1
Top level
DAT3 pull- down
Pin 4–
VCC
NC
HO ST CO NT ROLLE RHO ST CO NT ROLLE R
Top level
DAT3 pull- down
Pin 1–DAT2
Pin 2–CD/DAT3
Pin 3–CMD
Pin 5–CLK
Pin 6–GND
Pin 7–DAT0
Pin 8–DAT1
Pin 4–VCC
Top level
DAT3 pull- down
Pin 1–DAT2
Pin 2–CD/DAT3
Pin 3–CMD
Pin 5–CLK
Pin 6–GND
Pin 7–DAT0
Pin 8–DAT1
Pin 4–VCC
NC
HO ST CO NT ROLLE RHO ST CO NT ROLLE R
Bottom view Top vie w
EMIF06-MSD02N16
Card detection circuit
A pull-up of 90 kΩ is embedded into the EMIF06-MSD02N16. The routing corresponding to the mechanical card
detection configuration is shown in Figure 9.
Figure 9. Circuit routing for mechanical card detection
In case of electrical card detection, the user must add a pull-down on the circuit connected to the CD/DAT3 pin of
the micro-SD/T-Flash pin as shown in Figure 10.
Figure 10. Electrical card detection
A pull-down of 470k is embedded into the EMIF06-mSD02N16. The routing corresponding to the electrical card
detection configuration is shown in Figure 11.
Figure 11. Circuit routing for electrical card detection
DS5979 - Rev 5
page 6/14
3 Package information
1
1
Pin 1
Index area
A
A1
L
L1
M
b1
b
e
k
E2
E
D
D2
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
3.1 Micro QFN 3.5x1.2-16L package information
• Epoxy meets UL94, V0
Figure 12. Micro QFN 3.5x1.2-16L package outline
EMIF06-MSD02N16
Package information
DS5979 - Rev 5
page 7/14
0.30
0.45
0.20
0.40
1.6 0.70
2.30
3.00
N6
Dot : Pin 1 Identification
N6 = Marking
EMIF06-MSD02N16
Micro QFN 3.5x1.2-16L package information
Table 3. Micro QFN 3.5x1.2-16L package mechanical data
Dimensions
Ref.
Min. Typ. Max. Min. Typ. Max.
A
0.45 0.50 0.55 0.018 0.020 0.022
A1 0.00 0.05 0.000 0.002
b 0.15 0.20 0.25 0.006 0.008 0.010
b1 0.25 0.30 0.35 0.010 0.012 0.014
D 3.45 3.50 3.55 0.136 0.138 0.140
D2 2.70 2.80 2.90 0.106 0.110 0.114
E 1.15 1.20 1.25 0.045 0.047 0.049
E2 0.20 0.30 0.40 0.008 0.012 0.016
e 0.40 0.016
k 0.20 0.008
L 0.20 0.25 0.30 0.008 0.010 0.012
L1 0.15 0.006
M 0.20 0.008
Millimeters Inches
Figure 13. Micro QFN 3.5x1.2-16L footprint (dimensions in
mm)
Figure 14. Marking
DS5979 - Rev 5
page 8/14
Figure 15. Tape and reel outline
Dot identifying Pin A1 location
User direction of unreeling
All dimensions in mm
4.00 ± 0.1
2.00 ± 0.1
12.00 ± 0.3
3.70 ± 0.1
4.00 ± 0.1
1.75 ± 0.1
5.5 ± 0.1
Ø 1.55 ± 0.05
0.80 ± 0.1
1.70 ± 0.1
N6 N6
N6
N6
N6
N6
EMIF06-MSD02N16
Micro QFN 3.5x1.2-16L package information
Product marking may be rotated by 90° for assembly plant differentiation. In no case should this product marking
be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose.
DS5979 - Rev 5
page 9/14
4 Recommendation on PCB assembly
L
T
W
0.30
0.45
0.20
0.40
1.6 0.70
2.30
3.00
200
450 µm
µm
190
420 µm
µm
15 µm
15 µm
5 µ m 5 µ m
2800 µm
300 µm
2100
200 µm
µm
350 µm
350 µm
50 µm
50 µm
Footprint
Stencil window
Footprint
4.1 Stencil opening design
1. General recommendation on stencil opening design
a. Stencil opening dimensions: L (Length), W (Width), T (Thickness).
2. General design rule
a. Stencil thickness (T) = 75 ~ 125 μm
b. Aspect ratio =
c. Aspect area =
3. Reference design
a. Stencil opening thickness: 100 μm
b. Stencil opening for central exposed pad: Opening to footprint ratio is 50%.
c. Stencil opening for leads: Opening to footprint ratio is 90%
W
T
L × W
2T
≥ 1.5
L + W
≥ 0.66
EMIF06-MSD02N16
Recommendation on PCB assembly
Figure 16. Stencil opening dimensions
Figure 17. Recommended stencil window position
DS5979 - Rev 5
page 10/14
4.2 Solder paste
250
0
50
100
150
200
240210180150120906030 300270
-6 °C/s
240-245 °C
2 - 3 °C/s
Temperature (°C)
-2 °C/s
-3 °C/s
Time (s)
0.9 °C/s
60 sec
(90 max)
1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed.
4. Solder paste with fine particles: powder particle size is 20-45 μm.
4.3 Placement
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
3. Standard tolerance of ±0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste
and cause solder joints to short. Too low placement force can lead to insufficient contact between package
and solder paste that could cause open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be performed with a high
resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder
paste printing, pick and place and reflow soldering by using optimized tools.
EMIF06-MSD02N16
Solder paste
4.4 PCB design preference
1. To control the solder paste amount, the closed via is recommended instead of open vias.
2. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is
recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
4.5 Reflow profile
Figure 18. ST ECOPACK® recommended soldering reflow profile for PCB mounting
Note: Minimize air convection currents in the reflow oven to avoid component movement. Maximum soldering profile
DS5979 - Rev 5
corresponds to the latest IPC/JEDEC J-STD-020.
page 11/14
5 Ordering information
EMIF 06 - MSD02 N16
EMI Filter
Number of lines
Information
Package
MSD = application
02 = version
N = narrow micro QFN
16 = 16 leads
EMIF06-MSD02N16
Ordering information
Figure 19. Ordering information scheme
Table 4. Ordering information
Part number
EMIF06-MSDN16
1. The marking can be rotated by 90° to differentiate assembly location
Marking Package Weight Base qty. Delivery mode
N16
(1)
Micro QFN 6.17 mg 3000 Tape and reel (7”)
DS5979 - Rev 5
page 12/14
Revision history
T
able 5. Document revision history
Date Version Changes
21-Nov-2008 1 Initial release.
06-Sep-2019 2 Updated Table 3. Minor text changed.
11-May-2020 3 Updated product links and product label.
05-Nov-2020 4 Updated Figure 1.
20-Jan-2021 5 Updated Table 1.
EMIF06-MSD02N16
DS5979 - Rev 5
page 13/14
EMIF06-MSD02N16
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DS5979 - Rev 5
page 14/14
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