Standard Software Driver for C90LC Flash module embedded on
SPC56 M, B, C, D and P lines microcontroller
Introduction
This document is the user manual for the Standard Software Driver (SSD) for C90LC Flash
module.
The SSD is a set of API’s that enables user application to operate on the Flash module
embedded on a microcontroller. The C90LC SSD contains a set of functions to
program/erase C90LC Flash modules.
The C90LC Standard Software Driver (SSD) provides the following API’s:
This document is the user manual for the Standard Software Driver (SSD) for C90LC Flash
module. The roadmap for the document is as follows.
Section 1.2 shows the features of the driver. Appendix A: System requirements details the
system requirement for the driver development. Appendix B: Acronyms and Appendix C:
Documentation references list the documents referred and terms used in making of this
document. Appendix B: Acronyms lists the acronyms used.
Section 2 describes the API specifications. In this section there are many sub sections,
which describe the different aspects of the driver. Section 2.1 provides a general overview of
the driver. Section 2.2 mentions about the type definitions used for the driver. Section 2.3
mentions the driver configuration parameters. Section 2.4 and Section 2.5 describe the
CallBack notifications and return codes for the driver respectively. Section 2.6 and
Section 2.7 provides the detailed description of normal mode and special mode standard
software Flash Driver APIs’ respectively.
1.2 Features
The C90LC SSD provides the following features:
Two sets of driver binaries built with Variable-Length-Encoding (VLE) instruction set.
Three sets of driver binaries built with three different toolchains.
Drivers released in binary c-array format to provide compiler-independent support for
non-debug-mode embedded applications.
Drivers released in s-record format to provide compiler-independent support for debug-
mode/JTAG programming tools.
Each driver function is independent of each other so the end user can choose the
function subset to meet their particular needs.
Support page-wise programming for fast programming.
Position-independent and ROM-able
Ready-to-use demos illustrating the usage of the driver
Concurrency support via callback
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2 API specification
2.1 General overview
The C90LC SSD has APIs to handle the erase, program, erase verify and program verify
operations on the Flash. Apart from these, it also provides the feature for locking specific
blocks and calculating Check sum. This SSD also provides 3 user test APIs for checking the
Array Integrity and the ECC Logic.
2.2 General type definitions
Derived typeSizeC language type description
BOOL8-bitsunsigned char
INT88-bitssigned char
VINT88-bitsvolatile signed char
UINT88-bitsunsigned char
VUINT88-bitsvolatile unsigned char
INT1616-bitssigned short
VINT1616-bitsvolatile signed short
UINT1616-bitsunsigned short
VUINT1616-bitsvolatile unsigned short
INT3232-bitssigned long
VINT3232-bitsvolatile signed long
UINT3232-bitsunsigned long
VUINT3232-bitsvolatile unsigned long
INT6464-bitssigned long long
VINT6464-bitsvolatile signed long long
UINT6464-bitsunsigned long long
Table 1. Type definitions
VUINT6464-bitsvolatile unsigned long long
2.3 Configuration parameters and macros
The configuration parameter which is used for SSD operations is explained in this section.
The configuration parameters are handled as structure. The user should correctly initialize
the fields including c90flRegBase, mainArrayBase, shadowRowBase, shadowRowSize,
pageSize and BDMEnable before passing the structure to SSD functions. The pointer to
CallBack has to be initialized either to a null pointer or a valid CallBack function pointer.
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Parameter nameTypeParameter description
c90flRegBaseUINT32The base address of C90LC and BIU control registers.
mainArrayBaseUINT32The base address of Flash main array.
mainArraySizeUINT32The size of Flash main array.
shadowRowBaseUINT32The base address of shadow row
shadowRowSizeUINT32The size of shadow row in byte.
lowBlockNumUINT32Block number of the low address space.
midBlockNumUINT32Block number of the mid address space.
highBlockNumUINT32Block number of the high address space.
pageSizeUINT32The page size of the C90LC Flash
BDMEnableUINT32
Table 2. SSD configuration structure field definition
Defines the state of background debug mode (enable
/disable)
The type definition for the structure is given below.
typedef struct _ssd_config
{
UINT32 c90flRegBase;
UINT32 mainArrayBase;
UINT32 mainArraySize;
UINT32 shadowRowBase;
UINT32 shadowRowSize;
UINT32 lowBlockNum;
UINT32 midBlockNum;
UINT32 highBlockNum;
UINT32 pageSize;
UINT32 BDMEnable;
} SSD_CONFIG, *PSSD_CONFIG;
2.4 Callback notification
The Standard Software Driver facilitates the user to supply a pointer to ‘CallBack()’ function
so that time-critical events can be serviced during C90LC Standard Software driver
operations.
Servicing watchdog timers is one such time critical event. If it is not necessary to provide the
CallBack service, the user is able to disable it by a NULL function macro.
#define NULL_CALLBACK ((void *) 0xFFFFFFFF)
The job processing callback notifications shall have no parameters and no return value.
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2.5 Return codes
The return code is returned to the caller function to notify the success or errors of the API
execution. These are the possible values of return code:
NameValueDescription
C90FL_OK0x00000000The requested operation is successful.
C90FL_INFO_RWE 0x00000001RWE bit is set before Flash operations.
C90FL_INFO_EER0x00000002EER bit is set before Flash operations.
C90FL_ERROR_ALIGNMENT0x00000100Alignment error.
C90FL_ERROR_RANGE0x00000200Address range error.
C90FL_ERROR_BUSY0x00000300
C90FL_ERROR_PGOOD0x00000400The program operation is unsuccessful.
C90FL_ERROR_EGOOD0x00000500The erase operation is unsuccessful.
New program/erase cannot be preformed
while a high voltage operation is already in
progress.
There is a non-blank Flash memory location
within the checked Flash memory region.
There is a mismatch between the source
data and the content in the checked Flash
memory.
Read-while-write error occurred in previous
reads.
The password provided cannot unlock the
block lock register for register writes
C90FL_ERROR_AIC_MISMATCH0x00000B00
C90FL_ERROR_AIC_NO_BLOCK0x00000C00
C90FL_ERROR_FMR_MISMATCH0x00000D00
C90FL_ERROR_FMR_NO_BLOCK0x00000E00
C90FL_ERROR_ECC_LOGIC0x00000F00
C90FL_ERROR_SUSP0x00001000
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In ‘FlashArrayIntegrityCheck()’ the MISR
values generated by the hardware do not
match the values passed by the user.
In ‘FlashArrayIntegrityCheck()’ no blocks
have been enabled for Array Integrity check
In ‘FactoryMarginReadCheck()’ the MISR
values generated by the hardware do not
match the values passed by the user.
In ‘FactoryMarginReadCheck()’ no blocks
have been enabled for Array Integrity check
In ‘FlashECCLogicCheck()’ the simulated
ECC error has not occurred.
On going high voltage operation cannot be
suspended.
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2.6 Normal mode functions
2.6.1 FlashInit()
Description
This function reads the Flash configuration information from the Flash control registers and
initialize parameters in SSD configuration structure. ‘FlashIni()’ must be called prior to any
other Flash operations.
Prototype
UINT32 FlashInit (PSSD_CONFIG pSSDConfig);
Arguments
ArgumentDescriptionRange
pSSDConfig
Pointer to the SSD
Configuration Structure.
Table 4. Arguments for FlashInit()
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
Return values
TypeDescriptionPossible values
Indicates either success or failure type. It is a bit mapped
return code so that more than one condition can be
UINT32
returned with a single return code. Each bit in the returned
value, except for C90FL_OK, indicates a kind of current
status of C90LC module.
Table 5. Return values for FlashInit()
C90FL_OK
C90FL_INFO_EER
C90FL_INFO_RWE
Troubleshooting
Error codesPossible causesSolution
C90FL_INFO_EER
Table 6. Troubleshooting for FlashInit()
An ECC Error occurred during a
previous read.
Clear FLASH_MCR-EER bit.
C90FL_INFO_RWE
A Read While Write Error occurred
during a previous read
Clear the FLASH_MCR-RWE bit.
Comments
‘FlashIni()’ checks the C90FL_MCR_RWE and C90FL_MCR_EER bit, but does not clear
them when any of them is set. If RWE bit is set, Flash program/erase operations can still be
performed.
Assumptions
None.
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2.6.2 FlashErase()
Description
This function erases the enabled blocks in the main array or the shadow row. Input
arguments together with relevant Flash module status are checked, and relevant error code
is returned if there is any error.
Prototypse
UINT32 FlahErase (PSSD_CONFIG pSSDConfig,
BOOL shadowFlag,
UINT32 lowEnabledBlocks,
UINT32 midEnabledBlocks,
UINT32 highEnabledBlocks,
void (*CallBack)(void));
Arguments
ArgumentDescription Range
Table 7. Arguments for FlashErase()
pSSDConfig
shadowFlag
lowEnabledBlocks
midEnabledBlocks
highEnabledBlocks
Pointer to the SSD
Configuration Structure.
Indicate either the main
array or the shadow row
to be erased.
To select the array
blocks in low address
space for erasing.
To select the array
blocks in mid address
space for erasing.
To select the array
blocks in high address
space for erasing.
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
TRUE: the shadow row is erased. The
lowEnabledBlocks, midEnabledBlocks and
highEnabledBlocks are ignored;
FALSE: the main array is erased. Which blocks are
erased in low, mid and high address spaces are
specified by lowEnabledBlocks, midEnabledBlocks
and highEnabledBlocks respectively.
Bit-mapped value. Select the block in the low
address space to be erased by setting 1 to the
appropriate bit of lowEnabledBlocks. If there is not
any block to be erased in the low address space,
lowEnabledBlocks must be set to 0.
Bit-mapped value. Select the block in the middle
address space to be erased by setting 1 to the
appropriate bit of midEnabledBlocks. If there is not
any block to be erased in the middle address space,
midEnabledBlocks must be set to 0.
Bit-mapped value. Select the block in the high
address space to be erased by setting 1 to the
appropriate bit of highEnabledBlocks. If there is not
any block to be erased in the high address space,
highEnabledBlocks must be set to 0.
CallBack
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Address of void call
back function pointer.
Any addressable void function address. To disable it
use NULL_CALLBACK macro.
UM1627API specification
Return values
TypeDescriptionPossible values
UINT32Successful completion or error value.
Table 8. Return values for FlashErase()
C90FL_OK
C90FL_ERROR_BUSY
C90FL_ERROR_EGOOD
Troubleshooting
Error codesPossible causesSolution
C90FL_ERROR_BUSY
Table 9. Troubleshooting for FlashErase()
Wait until all previous program/erase
operations on the Flash module finish.
New erase operation cannot
be performed because there is
program/erase sequence in
progress on the Flash module.
Possible cases that erase cannot start
are:
– erase in progress (FLASH_MCR-
ERS is high);
– program in progress (FLASH_MCR-
PGM is high);
Check if the C90LC is available and
C90FL_ERROR_ EGOODErase operation failed.
high voltage is applied to C90LC. Then
try to do the erase operation again.
Comments
When shadowFlag is set to FALSE, the ‘FlashErase()’ function erases the blocks in the main
array. It is capable of erasing any combination of blocks in the low, mid and high address
spaces in one operation. If shadowFlag is TRUE, this function erases the shadow row.
The inputs lowEnabledBlocks, midEnabledBlocks and highEnabledBlocks are bit-mapped
arguments that are used to select the blocks to be erased in the Low/Mid/High address
spaces of main array. The selection of the blocks of the main array is determined by
setting/clearing the corresponding bit in lowEnabledBlocks, midEnabledBlocks or
highEnabledBlocks.
The bit allocations for blocks in one address space are: bit 0 is assigned to block 0, bit 1 to
block 1, etc. The following diagrams give an example of the formats of lowEnabledBlocks,
midEnabledBlocks and highEnabledBlocks for the C90LC module. Refer to Appendix C:
Documentation references for the valid bits configuration depending from the specific
microcontroller Flash module sectors.
MSBLSB
Table 10. Bit allocation for blocks in low address space
bit 31…bit 10bit 9bit 8…bit 1bit 0
reserved…reservedblock 9block 8…block 1block 0
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MSBLSB
bit 31…bit 4bit 3bit 2bit 1bit 0
reserved…reservedreservedreservedblock 1block 0
MSBLSB
bit 31…bit 6bit 5bit 4…bit 1bit 0
reserved…reservedblock 5block 4…Block 1Block 0
Table 11. Bit allocation for blocks in middle address space
Table 12. Bit allocation for blocks in high address space
If the selected main array blocks or the shadow row is locked for erasing, those blocks or
the shadow row are not erased, but ‘FlashErase()’ still returns C90FL_OK. User needs to
check the erasing result with the ‘BlankCheck()’ function.
It is impossible to erase any Flash block or shadow row when a program or erase operation
is already in progress on C90LC module. ‘FlashErase()’ returns C90FL_ERROR_BUSY
when trying to do so. Similarly, once an erasing operation has started on C90LC module, it
is impossible to run another program or erase operation.
In addition, when ‘FlashErase()’ is running, it is unsafe to read the data from the Flash
module having one or more blocks being erased. Otherwise, it causes a Read-While-Write
error.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
2.6.3 BlankCheck()
Description
This function checks on the specified Flash range in the main array or shadow row for blank
state. If the blank checking fails, the first failing address and the failing data in Flash block
are saved.
Prototype
UINT32 BlankCheck (PSSD_CONFIG pSSDConfig,
UINT32 dest,
UINT32 size,
UINT32 * pFailAddress,
UINT64 *pFailData,
void (*CallBack) (void ));
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Arguments
ArgumentDescription Range
Table 13. Arguments for BlankCheck()
pSSDConfig
dest
size
pFailAddress
pFailData
CallBack
Pointer to the SSD
Configuration Structure.
Destination address to be
checked.
Size, in bytes, of the Flash
region to check.
Return the address of the first
non-blank Flash location in
the checking region
Return the content of the first
non-blank Flash location in
the checking region.
Address of void callback
function
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
Any accessible address aligned on double word
boundary in main array or shadow row
If size = 0, the return value is C90FL_OK.
It should be multiple of 8 and its combination with
dest should fall in either main array or shadow row.
Only valid when this function returns
C90FL_ERROR_NOT_BLANK.
Only valid when this function returns
C90FL_ERROR_NOT_BLANK.
Any addressable void function address. To disable
it use NULL_CALLBACK macro.
The area specified by dest
and size is out of the valid
C90LC array ranges.
There is a non-blank
double word within the
area to be checked.
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Check if dest and size are aligned on
double word (64-bit) boundary.
Check dest and dest+size. The area
to be checked must be within main
array space or shadow space.
Erase the relevant blocks and check
again.
API specificationUM1627
Comments
If the blank checking fails, the first failing address is saved to *pFailAddress, and
the failing data in Flash is saved to *pFailData. The contents pointed by
pFailAddress and pFailData are updated only when there is a non-blank location in
the checked Flash range.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
2.6.4 FlashProgram()
Description
This function programs the specified Flash areas with the provided source data. Input
arguments together with relevant Flash module status are checked, and relevant error code
are returned if there is any error.
Prototype
UINT32 FlashProgram (PSSD_CONFIG pSSDConfig,
UINT32 dest,
UINT32 size,
UINT32 source,
void (*CallBack)(void));
Arguments
ArgumentDescriptionRange
pSSDConfig
Dest
Size
source
CallBack
Pointer to the SSD
Configuration Structure.
Destination address to be
programmed in Flash
memory.
Size, in bytes, of the Flash
region to be programmed.
Source program buffer
address.
Address of void call back
function pointer.
Table 16. Arguments for FlashProgram()
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
Any accessible address aligned on double word
boundary in main array or shadow row.
If size = 0, C90FL_OK is returned.
It should be multiple of 8 and its combination with dest
should fall in either main array or shadow row.
This address must reside on word boundary.
Any addressable void function address. To disable it
use NULL_CALLBACK macro.
Wait until the current operations finish.
New program
operation cannot be
performed because the
Flash module is busy
with some operation
and cannot meet the
condition for starting a
program operation.
This error indicates
that dest/size/source
isn’t properly aligned
The area specified by
dest and size is out of
the valid C90LC
address range.
Program operation
failed because this
operation cannot pass
PEG check.
Conditions that program cannot start are:
1. program in progress (MCR-PGM high);
2. program not in progress (MCR-PGM
low), but:
– erase in progress but not suspended;
– erase on main array is suspended but
program is targeted to shadow row;
– erase on shadow row is suspended.
Check if dest and size are aligned on
double word (64-bit) boundary. Check if
source is aligned on word boundary.
Check dest and dest+size. Both should fall
in the same C90LC address ranges, i.e.
both in main array or both in shadow row
Repeat the program operation. Check if the
C90LC is invalid or high voltage applied to
C90LC is unsuitable.
Comments
If the selected main array blocks or the shadow row is locked for programming, those blocks
or the shadow row are not programmed, and ‘FlashProgram()’ still returns C90FL_OK. User
needs to verify the programmed data with ‘ProgramVerify()’ function.
It is impossible to program any Flash block or shadow row when a program or erase
operation is already in progress on C90LC module. ‘FlashProgram()’ returns
C90FL_ERROR_BUSY when doing so. However, user can use the ‘FlashSuspend()’
function to suspend an on-going erase operation on one block to perform a program
operation on another block. An exception is that once the user has begun an erase
operation on the shadow row, it may not be suspended to program the main array and viceversa.
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It is unsafe to read the data from the Flash partitions having one or more blocks being
programmed when ‘FlashProgram()’ is running. Otherwise, it causes a Read-While-Write
error.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
2.6.5 ProgramVerify()
Description
This function checks if a programmed Flash range matches the corresponding source data
buffer. In case of mismatch, the failed address, destination value and source value are
saved and relevant error code is returned.
Prototype
UINT32 ProgramVerify (PSSD_CONFIG pSSDConfig,
UINT32 dest,
UINT32 size,
UINT32 source,
UINT32 *pFailAddress,
UINT64 *pFailData,
UINT64 *pFailSource,
void (*CallBack)(void));
Arguments
ArgumentDescriptionRange
pSSDConfig
Dest
Size
SourceVerify source buffer address.This address must reside on word boundary.
pFailAddress
pFailData
pFailSource
CallBack
Pointer to the SSD
Configuration Structure.
Destination address to be
verified in Flash memory.
Size, in byte, of the Flash region
to verify.
Return first failing address in
Flash.
Returns first mismatch data in
Flash.
Returns first mismatch data in
buffer.
Address of void call back
function pointer.
Table 19. Arguments for ProgramVerify()
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
Any accessible address aligned on double word
boundary in main array or shadow row.
If size = 0, C90FL_OK is returned. Its
combination with dest should fall within either
main array or shadow row.
Only valid when the function returns
C90FL_ERROR_VERIFY.
Only valid when this function returns
C90FL_ERROR_VERIFY.
Only valid when this function returns
C90FL_ERROR_VERIFY.
Any addressable void function address. To
disable it use NULL_CALLBACK macro.
The contents pointed by pFailLoc, pFailData and pFailSource are updated only when there
is a mismatch between the source and destination regions.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
2.6.6 CheckSum()
Table 21. Troubleshooting for ProgramVerify()
This error indicates
that dest/size/source
isn’t properly aligned
The area specified by
dest and size is out of
the valid C90LC
address range.
The content in C90LC
and source data
mismatch.
Check if dest and size are aligned on
double word (64-bit) boundary. Check if
source is aligned on word boundary
Check dest and dest+size, both should fall
in the same C90LC address ranges, i.e.
both in main array or both in shadow row
Check the correct source and destination
addresses, erase the block and reprogram
data into Flash.
Description
This function performs a 32-bit sum over the specified Flash memory range without carry,
which provides a rapid method for checking data integrity.
Prototype
UINT32 CheckSum (PSSD_CONFIG pSSDConfig,
UINT32 dest,
UINT32 size,
UINT32 *pSum,
void (*CallBack)(void));
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Arguments
ArgumentDescriptionRange
Table 22. Arguments for CheckSum()
pSSDConfig
Dest
Size
Pointer to the SSD
Configuration Structure.
Destination address to be
summed in Flash memory.
Size, in bytes, of the Flash
region to check sum.
pSumReturns the sum value.
CallBack
Address of void call back
function pointer.
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
Any accessible address aligned on double word
boundary in either main array or shadow row.
If size is 0 and the other parameters are all valid,
C90FL_OK is returned. Its combination with dest
should fall within either main array or shadow row.
0x00000000 - 0xFFFFFFFF. Note that this value is
only valid when the function returns C90FL_OK.
Any addressable void function address. To disable it
use NULL_CALLBACK macro.
Return values
TypeDescriptionPossible values
UINT32Successful completion or error value.
Table 23. Return values for CheckSum()
C90FL_OK
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
Troubleshooting
Table 24. Troubleshooting for CheckSum()
Returned error bits DescriptionSolution
C90FL_ERROR_ALIGNMENT
C90FL_ERROR_RANGE
This error indicates that
dest/size isn’t properly
aligned
The area specified by dest
and size is out of the valid
C90LC address range.
Check if dest and size are aligned on
double word (64-bit) boundary. Check
if source is aligned on word boundary
Check dest and dest+size, both should
fall in the same C90LC address
ranges, i.e. both in main array or both
in shadow row
Comments
None.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API
.
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2.6.7 FlashSuspend()
Description
This function checks if there is any high voltage operation, erase or program, in progress on
the C90LC module and if the operation can be suspended. This function suspends the
ongoing operation if it can be suspended (for C90LC modules it applies only to erase
operation).
Prototype
UINT32 FlashSuspend (PSSD_CONFIG pSSDConfig,
UINT8 *suspendState,
BOOL *suspendFlag);
Arguments
ArgumentDescriptionRange
Table 25. Arguments for FlashSuspend()
pSSDConfig
suspendState
suspendFlag
Pointer to the SSD
Configuration Structure.
Indicate the suspend state
of C90LC module after the
function being called.
Return whether the
suspended operation, if
there is any, is suspended
by this call.
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
All return values are enumerated in Table 27.
TRUE: the operation is suspended by this call;
FALSE: either no operation to be suspended or the
operation is suspended not by this call.
Return values
TypeDescriptionPossible values
UINT32Successful completion.C90FL_OK
UINT32Ongoing operation cannot be suspended.C90FL_ERROR_SUSP
Table 26. Return values for FlashSuspend()
Troubleshooting
None.
Comments
After calling ‘FlashSuspend()’, if no error is returned, read is allowed on both main array
space and shadow row without any Read-While-Write error. But data read from the blocks
targeted for programming or erasing is indeterminate even if the operation is suspended.
This function should be used together with ‘FlashResume()’. The suspendFlag returned by
‘FlashSuspend()’ determine whether ‘FlashResume()’ needs to be called or not. If suspendFlag is TRUE, ‘FlashResume()’ must be called symmetrically to resume the
suspended operation.
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Following table defines and describes various suspend states and associated suspend
codes.
ArgumentCodeDescriptionValid operation after suspend
NO_OPERTION0
Table 27. suspendState definitions
Erasing operation, programming
There is no
program/erase operation.
operation and read are valid on
both main array space and shadow
row.
PGM_WRITE1
ERS_WRITE2
ERS_SUS_PGM_WRITE 3
PGM_SUS4
ERS_SUS5
SHADOW_ERS_SUS6
ERS_SUS_PGM_SUS7
NO_SUS8
There is a program
sequence in interlock
write stage.
There is an erase
sequence in interlock
write stage.
There is an erasesuspend program
sequence in interlock
write stage.
The program operation is
in suspended state.
The erase operation on
main array is in
suspended state.
The erase operation on
shadow row is in
suspended state.
The erase-suspended
program operation is in
suspended state.
The ongoing high voltage
operation has not been
suspended.
Only read is valid on both main
array space and shadow row.
Only read is valid on both main
array space and shadow row.
Only read is valid on both main
array space and shadow row.
Only read is valid on both main
array space and shadow row.
Programming operation is valid only
on main array space. Read is valid
on both main array space and
shadow row.
Read is valid on both main array
space and shadow space.
Only read is valid on both main
array space and shadow row.
No operation is valid on both main
array space and shadow row.
The table below lists the Suspend Flag values returned against the Suspend State and the
Flash block status.
suspendStateEHVERSESUSPGMPSUSPEASsuspendFlag
NO_OPERATIONX0X0XXFALSE
PGM_WRITE00X10XFALSE
ERS_WRITE0100XXFALSE
ESUS_PGM_WRITE01110XFALSE
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Table 28. Suspending state and flag vs. C90LC status
10 X 1 0 XTRUE
PGM_SUS
X0 X 1 1 XFALSE
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Table 28. Suspending state and flag vs. C90LC status (continued)
suspendStateEHVERSESUSPGMPSUSPEASsuspendFlag
ERS_SUS
SHADOW_ERS_SUS
ERS_SUS_PGM_SUS
ERS_SUS1001XXFALSE
The values of EHV, ERS, ESUS, PGM, PSUS and PEAS represent the C90LC status at the
entry of FlashSuspend;
0: Logic zero; 1: Logic one; X: Do-not-care
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
2.6.8 FlashResume()
Description
This function checks if there is any suspended erase or program operation on the C90LC
module, and resumes the suspended operation if there is any.
11 0 0 X 0TRUE
X1 1 0 X 0FALSE
11 0 0 X 1TRUE
X1 1 0 X 1FALSE
11 1 1 0 XTRUE
X1 1 1 1 XFALSE
.
Prototype
UINT32 FlashResume (PSSD_CONFIG pSSDConfig,
UINT8 *resumeState);
Arguments
ArgumentDescription Range
pSSDConfig
resumeState
Table 29. Arguments for FlashResume()
Pointer to the SSD
Configuration Structure.
Indicate the resume state of
C90LC module after the
function being called.
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
All return values are listed in Table 31.
Return values
TypeDescriptionPossible values
UINT32Successful completion.C90FL_OK
Table 30. Return values for FlashResume()
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API specificationUM1627
Troubleshooting
None.
Comments
This function resumes one operation if there is any operation is suspended. For instance, if
a program operation is in suspended state, it is resumed. If an erase operation is in
suspended state, it is resumed too. If an erase-suspended program operation is in
suspended state, the program operation is resumed prior to resuming the erase operation. It
is better to call this function based on suspendFlag returned from ‘FlashSupend()’.
Following table defines and describes various resume states and associated resume codes.
Code NameValueDescription
RES_NOTHING0No program/erase operation to be resumed
RES_PGM1A program operation is resumed
RES_ERS2A erase operation is resumed
RES_ERS_PGM3A suspended erase-suspended program operation is resumed
Table 31. resumeState definitions
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
2.6.9 GetLock()
Description
This function checks the block locking status of Shadow/Low/Middle/High address spaces in
the C90LC module.
Prototype
UINT32 GetLock (PSSD_CONFIG pSSDConfig,
UINT8 blkLockIndicator,
BOOL *blkLockEnabled,
UINT32 *blkLockState);
Arguments
ArgumentDescription Range
pSSDConfig
blkLockIndicator
Table 32. Arguments for GetLock()
Pointer to the SSD
Configuration Structure.
Indicating the address
space and the block locking
level, which determines the
address space block locking
register to be checked.
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
Refer to Table 35 for valid values for this
parameter.
22/38UM1627 Rev3
UM1627API specification
Table 32. Arguments for GetLock() (continued)
ArgumentDescription Range
TRUE – The address space block locking register
is enabled for register writes.
FALSE – The address space block locking register
is disabled for register writes.
Bit mapped value indicating the locking status of
the specified locking level and address space.
1: The block is locked from program/erase.
0: The block is ready for program/erase
blkLockEnabled
blkLockState
Indicate whether the
address space block locking
register is enabled for
register writes
Returns the blocks’ locking
status of indicated locking
level in the given address
space
Return values
TypeDescriptionPossible values
UINT32Successful completion or error value.
Table 33. Return values for GetLock()
C90FL_OK
C90FL_ERROR_LOCK_INDICATOR
Troubleshooting
Returned error bits Possible causesSolution
C90FL_ERROR_LOCK_INDICATOR
Table 34. Troubleshooting for GetLock()
The input blkLockIndicator is
invalid.
Set this argument to correct
value listed in Table 35.
Comments
Following table defines and describes various blkLockIndicator values.
Code NameValueDescription
LOCK_SHADOW_PRIMARY0Primary block lock protection of shadow address space
LOCK_SHADOW_SECONDARY1
LOCK_LOW_PRIMARY2Primary block lock protection of low address space
LOCK_LOW_SECONDARY3Secondary block lock protection of low address space
LOCK_MID_PRIMARY4Primary block lock protection of mid address space
LOCK_MID_SECONDARY5Secondary block lock protection of mid address space
LOCK_HIGH6Block lock protection of high address space
For Shadow/Low/Mid address spaces, there are two block lock levels. The secondary level
of block locking provides an alternative means to protect blocks from being modified. A
logical “OR” of the corresponding bits in the primary and secondary lock registers for a block
Table 35. blkLockIndicator definitions
Secondary block lock protection of shadow address
space
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API specificationUM1627
determines the final lock status for that block. For high address space there is only one
block lock level.
The output parameter blkLockState returns a bit-mapped value indicating the block lock
status of the specified locking level and address space. A main array block or shadow row is
locked from program/erase if its corresponding bit is set.
The indicated address space determines the valid bits of blkLockState. For either
Low/Mid/High address spaces, if blocks corresponding to valid block lock state bits are not
present (due to configuration or total memory size), values for these block lock state bits are
always 1 because such blocks are locked by hardware on reset. These blocks cannot be
unlocked by software with ‘SetLock()’ function.
The following diagrams give an example of the block bitmap definitions of blkLockState for
shadow/Low/Mid/High address spaces. Refer to Appendix C: Documentation referencesfor
the valid bits configuration depending from the specific microcontroller Flash module
sectors.
MSBLSB
bit 31…bit 1bit 0
reserved …reservedshadow row
Table 36. blkLockState bit allocation for shadow address space
Table 37. blkLockState bit allocation for low address space
MSBLSB
bit 31…bit 10bit 9bit 8…bit 1bit 0
reserved…reservedblock 9block 8…block 1block 0
Table 38. blkLockState bit allocation for mid address space
MSBLSB
bit 31…bit 4bit 3bit 2bit 1bit 0
reserved…reserved reserved reservedblock 1block 0
Table 39. blkLockState bit allocation for high address space
MSBLSB
bit 31…bit 6bit 5bit 4…bit 1bit 0
reserved…reservedblock 5block 4…block 1block 0
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
24/38UM1627 Rev3
UM1627API specification
2.6.10 SetLock()
Description
This function sets the block lock state for Shadow/Low/Middle/High address space on the
C90LC module to protect them from program/erase. The API provides password to enable
block lock register writes when needed and write the block lock value to block lock register
for the requested address space.
Prototype
UINT32 SetLock (PSSD_CONFIG pSSDConfig,
UINT8 blkLockIndicator,
UINT32 blkLockState,
UINT32 password);
Arguments
ArgumentDescriptionRange
pSSDConfig
blkLockIndicator
blkLockState
password
Pointer to the SSD
Configuration Structure.
Indicating the address
space and the protection
level of the block lock
register to be read.
The block locks to be set to
the specified address
space and protection level.
A password is required to
enable the block lock
register for register write.
Table 40. Arguments for SetLock()
The values in this structure are chip-dependent.
Please refer to Section 2.3 for more details.
Refer to Table 35 for valid codes for this parameter.
Bit mapped value indicating the lock status of the
specified protection level and address space.
1: The block is locked from program/erase.
0: The block is ready for program/erase
Correct passwords for block lock registers are
0xA1A1_1111 for Low/Mid Address Space Block
Locking Register, 0xC3C3_3333 for Secondary
Low/Mid Address Space Block Locking Register,
and 0xB2B2_2222 for High Address Space Block
Select Register.
Return values
Table 41. Return values for SetLock()
TypeDescriptionPossible values
C90FL_OK
UINT32Successful completion or error value.
UM1627 Rev325/38
C90FL_ERROR_LOCK_INDICATOR
C90FL_ERROR_PASSWORD
API specificationUM1627
Troubleshooting
The troubleshooting mentioned below comprises of hardware errors due to both P Flash
block erase verify and P Flash section erase verify command. Apart from these the input
based error handling is also mentioned.
Returned error bits Possible causesSolution
Table 42. Troubleshooting for SetLock()
C90FL_ERROR_LOCK_INDICATOR
C90FL_ERROR_PASSWORD
Comments
The bit field allocation for blkLockState is same as that in ‘GetLock()’ function.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
2.7 User test mode functions
2.7.1 FlashArrayIntegrityCheck()
Description
This function checks the array integrity of the Flash. The user specified address sequence is
used for array integrity reads and the operation is done on the specified blocks. The MISR
values calculated by the hardware is compared to the values passed by the user, if they are
not the same, then an error code is returned.
The input blkLockIndicator
is invalid.
The given password cannot
enable the block lock
register for register writes.
The trouble shooting given here comprises of hardware errors and input parameter error.
Returned error bits Possible causesSolution
Table 45. Troubleshooting for FlashArrayIntegrityCheck()
The MISR value calculated by
the user is incorrect.
C90FL_ERROR_AIC_MISMATCH
The MISR calculated by the
Hardware is incorrect.
Re-calculate the MISR values
using the correct Data and
addrSeq.
Hardware Error.
Enable any of the blocks using
C90FL_ERROR_AIC_NO_BLOCK
None of the Blocks are enabled
for Array Integrity Check
variables lowEnabledBlocks,
midEnabledBlocks and
highEnabledBlock.
Comments
The inputs lowEnabledBlocks, midEnabledBlocks and highEnabledBlocks are bit-mapped
arguments that are used to select the blocks to be evaluated in the Low/Mid/High address
spaces of main array. The selection of the blocks of the main array is determined by
setting/clearing the corresponding bit in lowEnabledBlocks, midEnabledBlocks or
highEnabledBlocks.
The bit allocations for blocks in one address space are: bit 0 is assigned to block 0, bit 1 to
block 1, etc. The following diagrams give an example of the formats of lowEnabledBlocks,
midEnabledBlocks and highEnabledBlocks for the C90LC module.
Refer to Appendix C: Documentation references for the valid bits configuration depending
from the specific microcontroller Flash module sectors.
Table 46. Bit allocation for blocks in low address space
MSBLSB
bit 31…bit 10bit 9bit 8…bit 1bit 0
reserved…reservedblock 9block 8…block 1block 0
Table 47. Bit allocation for blocks in middle address space
MSBLSB
bit 31…bit 4bit 3bit 2bit 1bit 0
reserved…reservedreservedreservedblock 1block 0
Table 48. Bit allocation for blocks in high address space
MSBLSB
bit 31…bit 6bit 5bit 4…bit 1bit 0
reserved…reservedblock 5block 4…Block 1Block 0
28/38UM1627 Rev3
UM1627API specification
If no blocks are enabled the C90FL_ERROR_AIC_NO_BLOCK error code is returned.
Depending on the address sequence specified the MISR values are calculated for the
enabled blocks using the corresponding sequence. If the MISR values calculated by the
hardware is not the same as the values passed to this API by the user then the API returns
the error code C90FL_ERROR_AIC_MISMATCH.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
2.7.2 FlashECCLogicCheck()
Description
This function checks the ECC logic of the Flash. The API simulates a single or double bit
fault depending on the user input. If the simulated ECC error is not detected, then the error
code C90FL_ERROR_ECC_LOGIC is returned.
Table 51. Troubleshooting for FlashECCLogicCheck()
Comments
Depending on the errBits value, a single or double bit faults are simulated. When a Flash
read is done, if the simulated error has not occurred, then the API returns the error code
C90FL_ERROR_ECC_LOGIC.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
2.7.3 FactoryMarginReadCheck()
C90FL_OK
C90FL_ERROR_ECC_LOGIC
Description
This function checks the Factory Margin reads of the Flash. The user specified margin level
is used for reads and the operation is done on the specified blocks. The MISR values
calculated by the hardware is compared to the values passed by the user, if they are not the
same, then an error code is returned.
The trouble shooting given here comprises of hardware errors and input parameter error.
UM1627 Rev331/38
API specificationUM1627
Table 54. Troubleshooting for FactoryMarginReadCheck()
Returned error bits Possible causesSolution
C90FL_ERROR_FMR_
MISMATCH
The MISR value calculated by the
user is incorrect.
The MISR calculated by the
Hardware is incorrect.
Re-calculate the MISR values using
the correct Data and address.
Hardware Error.
Enable any of the blocks using
C90FL_ERROR_FMR_
NO_BLOCK
None of the Blocks are enabled for
Factory Margin Read Check
variables lowEnabledBlocks,
midEnabledBlocks and
highEnabledBlock.
Comments
The inputs lowEnabledBlocks, midEnabledBlocks and highEnabledBlocks are bit-mapped
arguments that are used to select the blocks to be evaluated in the Low/Mid/High address
spaces of main array. The selection of the blocks of the main array is determined by
setting/clearing the corresponding bit in lowEnabledBlocks, midEnabledBlocks or
highEnabledBlocks.
The bit allocations for blocks in one address space are: bit 0 is assigned to block 0, bit 1 to
block 1, etc. The following diagrams give an example of the formats of lowEnabledBlocks,
midEnabledBlocks and highEnabledBlocks for the C90LC module.
Refer to Appendix C: Documentation references for the valid bits configuration depending
from the specific microcontroller Flash module sectors.
MSBLSB
bit 31…bit 10bit 9bit 8…bit 1bit 0
reserved…reservedblock 9block 8…block 1block 0
MSBLSB
bit 31…bit 4bit 3bit 2bit 1bit 0
reserved…reservedreservedreservedblock 1block 0
MSBLSB
bit 31…bit 6bit 5bit 4…bit 1bit 0
reserved…reservedblock 5block 4…Block 1Block 0
Table 55. Bit allocation for blocks in low address space
Table 56. Bit allocation for blocks in middle address space
Table 57. Bit allocation for blocks in high address space
If no blocks are enabled the C90FL_ERROR_FMR_NO_BLOCK error code is returned.
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UM1627API specification
The MISR values are calculated for the enabled blocks using the logical sequence. If the
MISR values calculated by the hardware is not the same as the values passed to this API by
the user then the API returns the error code C90FL_ERROR_FMR_MISMATCH.
Assumptions
It assumes that the Flash block is initialized using a ‘FlashInit()’ API.
UM1627 Rev333/38
System requirementsUM1627
Appendix A System requirements
The C90LC SSD is designed to support C90LC Flash module embedded on
microcontrollers. Before using this SSD on a different derivative microcontroller, user has to
provide the information specific to the derivative through a configuration structure.
Tool nameDescriptionVersion number
CodeWarrior IDE Development tool2.5
Diab PowerPC compilerCompiler5.7.0.0
Green Hills PowerPC compilerCompiler5.1.7
Lauterbach ICD toolJtag Debuggern.a
Table 58. System requirements
34/38UM1627 Rev3
UM1627Acronyms
Appendix B Acronyms
AbbreviationComplete name
APIApplication Programming Interface
BIUBus Interface Unit
ECCError Correction Code
EVBEvaluation Board
RWWRead While Write
SSDStandard Software Driver
Table 59. Acronyms
UM1627 Rev335/38
Documentation referencesUM1627
Appendix C Documentation references
1.SPC560D30L1, SPC560D30L3, SPC560D40L1, SPC560D40L3 32-bit MCU family
®
built on the embedded Power Architecture
2. SPC560B40x, SPC560B50x, SPC560C40x, SPC560C50x 32-bit MCU family built on
the embedded Power Architecture
®
(RM0017, DocID14629)
(RM0045, DocID16886)
3. Support microcontrollers SPC560B54x, SPC560B60x and SPC560B64x (RM0037,
DocID15700)
4. SPC564Bxx, SPC56ECxx 32-bit MCU family built on the embedded Power
Architecture
5. SPC560P34/SPC560P40 32-bit MCU family built on the embedded Power
Architecture
6. 32-bit MCU family built on the Power Architecture
®
(RM0070, DocID18196)
®
(RM0046, DocID16912)
®
embedded category for automotive
chassis and safety electronics applications (RM0022, DocID14891)
®
7. 32-bit MCU family built on the Power Architecture
embedded category for automotive
chassis and safety electronics applications (RM0083, DocID018714)
®
8. SPC563Mxx - 32-bit Power Architecture
based MCU with up to 1.5 Mbyte Flash and
111 Kbyte RAM memories (RM0015, DocID14499)
36/38UM1627 Rev3
UM1627Revision history
Revision history
DateRevisionChanges
10-Apr-20131Initial release.
17-Sep-20132Updated Disclaimer.
13-Jul-20203Updated title.
Table 60. Document revision history
UM1627 Rev337/38
UM1627
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