ST MICROELECTRONICS BUZ 71A Datasheet

Page 1
G
D
S
BUZ71A
Data Sheet December 2001
13A, 50V, 0.120 Ohm, N-Channel Power MOSFET
Formerly developmental type TA9770.
Ordering Information
PART NUMBER PACKAGE BRAND
BUZ71A TO-220AB BUZ71A
NOTE: When ordering, use the entire part number.
Features
• 13A, 50V
•r
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 0.120
DS(ON)
Components to PC Boards”
Symbol
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
©2001 Fairchild Semiconductor Corporation BUZ71A Rev. B
Page 2
±
µ
µ
θ
θ
µ
BUZ71A
Absolute Maximum Ratings
o
T
= 25
C, Unless Otherwise Specified
C
BUZ71A UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (R Continuous Drain Current, T
= 20k Ω) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
o
= 55
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
DS
DGR
D
DM
GS
D
AS
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.32 W/
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
STG
, T
J
50 V 50 V 13 A 48 A
20 V
40 W
100 mJ
-55 to 150
o
C
o
C
DIN Humidity Category - DIN 40040 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E
IEC Climatic Category - DIN IEC 68-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55/150/56
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
300 260
o
C
o
C
NOTE:
= 25
J
o
C to 125
1. T
Electrical Specifications
o
C.
o
T
= 25
C, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V
GS(TH)
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r
DS(ON)
Forward Transconductance (Note 2) g
Turn-On Delay Time t
d(ON)
Rise Time t
Turn-Off Delay Time t
d(OFF)
Fall Time t
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R
DSS
GSS
OSS
RSS
DSS
fs
r
f
ISS
JC
JA
I
= 250 µ A, V
D
V
= V
GS
o
T
= 25
J
T
= 125
J
V
= 20V, V
GS
I
= 9A, V
D
V
= 25V, I
DS
V
= 30V, I
CC
R
= 10
L
V
= 25V, V
DS
= 0V 50 - - V
GS
, I
= 1mA (Figure 9) 2.1 3 4 V
DS
D
C, V
= 50V, V
DS
o
C, V
= 50V, V
DS
= 0V - 10 100 nA
DS
= 10V (Figure 8) - 0.11 0.12
GS
= 9A (Figure 11) 3.0 5.2 - S
D
3A, V
D
= 0V - 20 250
GS
= 0V - 100 1000
GS
= 10V, R
GS
GS
= 50 Ω,
-2030 ns
-5585 ns
-7090 ns
- 80 110 ns
= 0V, f = 1MHz (Figure 10) - 480 650 pF
GS
- 280 450 pF
- 160 280 pF
3.1
75
o
o
A
A
C/W
C/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current I
Pulsed Source to Drain Current I
Source to Drain Diode Voltage V
Reverse Recovery Time t
Reverse Recovery Charge Q
SD
SDM
SD
rr
RR
NOTES:
2. Pulse Test: Pulse width 300 µ s, duty cycle 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. V
= 10V, T
DD
©2001 Fairchild Semiconductor Corporation BUZ71A Rev. B
= 25
J
o
C, L = 820 µ H, I
= 14A. (See Figures 14 and 15).
PEAK
T
C
T
C
T
J
T
J
V
R
o
= 25
C--13A
o
= 25
C--52A
o
= 25
C, I
= 25
= 30V
o
C, I
= 26A, V
SD
= 13, dI
SD
= 0V, (Figure 12) - 1.6 2.2 V
GS
/dt = 100A/ µ s,
SD
- 120 - ns
- 0.15 -
C
Page 3
5
0
0 50 100 150
T
C
, CASE TEMPERATURE (oC)
I
D
, DRAIN CURRENT (A)
10
VGS 10V
15
30
20
10
0
02 8
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
VGS = 20V
10V
PD = 40W
46
VGS = 6.0V
VGS = 5.5V
V
GS
= 5.0V
V
GS
= 4.5V
V
GS
= 4.0V
V
GS
= 6.5V
V
GS
= 7.0V
V
GS
= 7.5V
V
GS
= 8.0V
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
BUZ71A
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0 25 50 75 100 150
TC, CASE TEMPERATURE (oC)
Unless Otherwise Specified
125
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
0.5
1
0.2
0.1
0.05
0.02
0.01
0.1
TRANSIENT THERMAL IMPEDANCE
θJC,
Z
0.01 10
-5
SINGLE PULSE
10
-4
-3
10
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
-2
t, RECTANGULAR PULSE DURATION (s)
10
NOTES: DUTY FACTOR: D = t
PEAK TJ = PDM x Z
-1
10
P
DM
t
1
t
2
1/t2
+ T
θJC
C
0
10
1
10
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
2
10
1
10
©2001 Fairchild Semiconductor Corporation BUZ71A Rev. B
OPERATION IN THIS
0
AREA MAY BE LIMITED
10
, DRAIN CURRENT (A)
BY r
D
I
10
DS(ON)
-1 0
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
1
10
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
5µs
10µs
100µs
1ms
10ms 100ms
DC
2
10
TJ = MAX RATED TC = 25oC SINGLE PULSE
3
10
Page 4
010 2015
0.3
0.2
0.1
0
I
D
, DRAIN CURRENT (A)
NORMALIZED ON RESISTANCE
0.4
5
VGS = 5V
5.5V 6V 6.5V 7V 7.5V 8V
10V
20V
9V
25 30
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
-50 0 50 100 150
V
GS(TH)
, GATE THRESHOLD VOLTAGE (V)
4
3
2
1
0
T
J
, JUNCTION TEMPERATURE (oC)
ID = 1mA
V
DS
= V
GS
6
3
4
2
1
0
0 5 10 15
I
D
, DRAIN CURRENT (A)
g
fs
, TRANSCONDUCTANCE (S)
PULSE DURATION = 80µs
VDS = 25V, TJ = 25oC
5
DUTY CYCLE = 0.5% MAX
BUZ71A
Typical Performance Curves Unless Otherwise Specified (Continued)
15
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
= 25V
V
DS
= 25oC
T
J
10
5
, DRAIN TO SOURCE CURRENT (A)
DS(ON)
I
0
0510
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 6. TRANSFER CHARACTERISTICS FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE
0.30 VGS = 10V, ID = 9A
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
VOLTAGE AND DRAIN CURRENT
0.20
, DRAIN TO SOURCE
0.10
ON RESISTANCE ()
DS(ON)
r
0
-40 0 40
T
, JUNCTION TEMPERATURE (oC)
J
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs
JUNCTION TEMPERATURE
1
10
VGS = 0, f = 1MHz C
= CGS +C
ISS
C
= C
RSS
C
CDS + C
OSS
0
10
-1
10
C, CAPACITANCE (nF)
-2
10
0 10203040
FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT
©2001 Fairchild Semiconductor Corporation BUZ71A Rev. B
GD
GD
GS
, DRAIN TO SOURCE VOLTAGE (V)
V
DS
80
120
C
C
C
160
FIGURE 9. GATE THRESHOLD VOLTAGE vs JUNCTION
TEMPERATURE
ISS
OSS
RSS
Page 5
15
10
5
0
0510
Q
g
, GATE CHARGE (nC)
V
GS
, GATE TO SOURCE VOLTAGE (V)
ID = 18A
VDS = 40V
15 20 25
VDS = 10V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
BUZ71A
Typical Performance Curves Unless Otherwise Specified (Continued)
2
10
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
1
10
10
TJ = 150oC
0
TJ = 25oC
, SOURCE TO DRAIN CURRENT (A)
SD
I
-1
10
0 0.5 1.0 1.5 2.0
V
, SOURCE TO DRAIN VOLTAGE (V)
SD
2.5 3.0
FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Test Circuits and Waveforms
VARY t
REQUIRED PEAK I
0V
V
DS
L
TO OBTAIN
P
AS
V
GS
R
G
+
V
DD
-
DUT
t
P
I
AS
0.01
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
R
L
+
V
R
G
DUT
V
GS
FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
DD
-
©2001 Fairchild Semiconductor Corporation BUZ71A Rev. B
Page 6
Test Circuits and Waveforms (Continued)
Q
g(TOT)
Q
gd
Q
gs
V
DS
0
V
GS
V
DD
I
g(REF)
0
V
DS
(ISOLATED SUPPLY)
SAME TYPE AS DUT
D
12V
BATTERY
0.2µF
50k
CURRENT
REGULATOR
0.3µF
BUZ71A
G
I
0
g(REF)
IG CURRENT
SAMPLING
RESISTOR RESISTOR
FIGURE 18. GATE CHARGE TEST CIRCUIT
S
CURRENT
I
D
SAMPLING
DUT
V
DS
FIGURE 19. GATE CHARGE WAVEFORMS
©2001 Fairchild Semiconductor Corporation BUZ71A Rev. B
Page 7
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PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or In Design
First Production
Full Production
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effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
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Rev. H4
Page 8
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