Figure 13.TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Outline . . . . . . . . . . . 21
4/24
M27C4001Summary description
1 Summary description
The M27C4001 is a 4 Mbit EPROM offered in the two ranges UV (ultra violet erase) and
OTP (one time programmable). It is ideally suited for microprocessor systems requiring
large programs and is organised as 524,288 by 8 bits.
The FDIP32W (window ceramic frit-seal package) has a transparent lid which allows the
user to expose the chip to ultra viol et light to er ase the bit pattern. A ne w pattern can then be
written to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not
required, the M27C4001 is off er ed in PDIP32 , PLCC32 an d TSOP32 ( 8 x 20 mm) p ac kages .
In order to meet environmental requirements, ST offers the M27C4001 in ECOPACK®
packages.
ECOPACK packages are Lead-free. The category of second Level Interconnect is marked
on the package and on the inner box label, in compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 1.Logic Diagram
V
CC
19
A0-A18Q0-Q7
E
G
Table 1.Signal names
A0-A18Address Inputs
Q0-Q7Data Outputs
EChip Enable
G
V
PP
V
CC
V
SS
M27C4001
V
SS
Output Enable
Program Supply
Supply Voltage
Ground
V
PP
8
AI00721B
5/25
Summary descriptionM27C4001
Figure 2.DIP Connections
1
V
PP
A15
A12
Q0
Q2
SS
A7
A6
A5
A4
A3
A2
A1
A0
2
3
4
5
6
7
8
M27C4001
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AI00722
V
CC
A18A16
A17
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
Figure 3.LCC Connections
A7
A6
A5
A4
A3
A2
A1
A0
Q0
9
A12
A15
M27C4001
Q1
Q2
A16
1
17
SS
V
VPPV
32
Q3
CC
Q4
A18
Q5
A17
25
Q6
A14
A13
A8
A9
A11
G
A10
E
Q7
AI00723
6/25
M27C4001Summary description
Figure 4.TSOP Connections
A11G
1
32
A9
A8
A13
A14
A17
A18
V
CC
V
PP
8
9
M27C4001
(Normal)
25
24
A16
A15
A12
A7
A6
A5
A4A3
1617
AI01155B
A10
E
Q7
Q6
Q5
Q4
Q3
V
SS
Q2
Q1
Q0
A0
A1
A2
7/25
Device operationM27C4001
2 Device operation
The operating modes of the M27C4001 are listed in the Operating Modes table. A single
power supply is required in t he read mod e. All inputs are TTL levels except for V
on A9 for Electronic Signature.
2.1 Read Mode
The M27C4001 has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E
device selection. Out put Enable (G
the output pins, independent of device selection. Assuming that the addresses are stable,
the address access time (t
availab le a t th e outpu t aft er a de lay of t
been low and the addresses have been stable f or at least t
2.2 Standby Mode
The M27C4001 has a standby mode which reduces the supply curr ent from 30mA t o 100µA.
The M27C4001 is placed in the standby mode by applying a CMOS high signal to the E
input. When in the standby mo de, the ou tputs are in a high impedance stat e, indepe ndent of
the G
input.
) is the power control and should be u sed for
) is the output control and should be used to gate data to
) is equal to the delay from E to output (t
AVQV
from the falling edge of G, assuming that E has
GLQV
AVQV-tGLQV
ELQV
.
and 12V
PP
). Data is
2.3 Two Line Output Control
Because EPROMs are usually used in larger memory arrays, this product features a 2 line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
a) the lowest possible memory power dissipation,
b) complete assurance that output bus contention will not occur.
For the most efficient use of these two control lines, E
primary device selecting function, while G
devices in the array and connected to the READ
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.
should be decoded and used as the
should be made a common connection to all
line from the system control bus. This
8/25
M27C4001Device operation
2.4 System Considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the devices. The supply current, I
, has three segments that are of interest to
CC
the system designer: the standby current le v el, the activ e cur rent le v el, a nd tran sient current
peaks that are produced by the f alling an d rising edges of E
. The magnitude of the tra nsient
current peaks is dependent on the capacitive and inductive loading of the device at the
output. The associated transient voltage peaks can be suppressed by complying with the
two line output control and by properly selected decoupling capacitors. It is recommended
that a 0.1µF ceramic capacitor be used on every de vice be tween V
and VSS. This should
CC
be a high frequency capacitor of low inherent inductance and should be placed as close to
the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used
between V
and VSS for ev ery eight devices . The bulk capacitor sh ould be located near the
CC
power supply connection point. The purpose of the bulk capacitor is to o v ercome the v oltage
drop caused by the inductive effects of PCB traces.
2.5 Programming
When delivered (and after each erasur e f or UV EPR OM), all bits of t he M27C4001 are in the
'1' state. Data is introduced by selectively programming '0's into the desired bit locations.
Although only '0's will be programmed, both '1's and '0's can be present in the data word.
The only way to change a ' 0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The
M27C4001 is in the programming mode when V
pulsed to V
. The data to be programmed is applied to 8 bits in parallel to the data output
IL
pins. The levels required for the address and data inputs are TTL. V
6.25V ± 0.25V.
input is at 12.75V, G is at VIH and E is
PP
is specified to be
CC
2.6 PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the whole array to be programmed with a
guaranteed margin, in a typical time of 52.5 seconds. Programming with PRESTO II
consists of applying a sequence of 100µs program pulses to each byte until a correct verify
occurs (see Figure 5). During programming and verify oper ation, a MARGIN MODE circuit is
automatically activated in order to guarantee that each cell is programmed with enough
margin. No overprogram pulse is applied since the verify in MARGIN MODE provides the
necessary margin to each programmed cell.
9/25
Device operationM27C4001
Figure 5.Programming Flowchart
VCC = 6.25V, VPP = 12.75V
n = 0
E = 100µs Pulse
NO
NO
VERIFY
YES
Last
NO
Addr
YES
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
++ Addr
AI00760B
YES
++n
= 25
FAIL
2.7 Program Inhibit
Programming of multiple M27C4001s in parallel with different data is also easily
accomplished. Except for E
, all like inputs including G of the parallel M27C4001 may be
common. A TTL low level pulse applied to a M27C4001's E
program that M27C4001. A high level E
programmed.
2.8 Program Verify
A verify (read) should be performed on the programmed bits to determine that they were
correctly programmed. The v erify is accomplished with G
V
at 6.25V.
CC
2.9 Electronic Signature
The Electronic Signature (ES) mode allows the reading out of a binary code from an
EPROM that will identify its manufacturer and type. This mode is intended for use by
programming equipment to automatically match the device to be programmed with its
corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C
ambient temperature range that is required when programming the M27C4001. To activate
the ES mode, the progr amm ing e qui pme nt must force 11.5V to 12.5V on address line A9 of
the M27C4001 with V
device outputs by toggling address line A0 from V
held at V
during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer
IL
code and byte 1 (A0 = V
M27C4001, these two identifier bytes are given in Table 3 and can be read-out on outputs
Q7 to Q0.
= V
PP
CC
) the device identifier code. For the STMicroelectronics
IH
input, with VPP at 12.75V, will
input inhibits the other M27C4001s from being
at VIL, E at VIH, VPP at 12.75V and
= 5V. Two identifier bytes may then be sequenced from the
to VIH. All other address lines must be
IL
10/25
M27C4001Device operation
2.10 Erasure operation (applies to UV EPROM)
The erasure characteristics of the M27 C4001 are such that erasure begins when the cells
are exposed to light with w a velen gths shorter than approximately 400 0 Å. It should be noted
that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å
range. Data shows that constant exposure to room level fluorescent lighting could erase a
typical M27C4001 in about 3 years, while it would take approximately 1 week to cause
erasure when exposed t o direct sunlight. If the M27C4001 is to be e xposed to these types of
lighting conditions for extended periods of time, it is suggested that opaque labels be put
over the M27C4001 window to prevent unintentional erasure. The recommended erasure
procedure for the M27C4001 is exposure to short wave ultraviolet light which has
wavelength of 2537 Å. The integrated dose (i.e. UV intensity x exposure time) for erasure
should be a minimum of 15 W-sec/cm
15 to 20 minutes using an ultrav iolet lamp with 1200 0 µW/cm
should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps
have a filter on their tubes which should be removed before erasure.
Table 2.Operating Modes
(1)
2
. The erasure time with this dosage is approximately
2
power rating. The M27C4001
ModeEGA9V
Read V
Output DisableV
ProgramV
VerifyV
Program InhibitV
StandbyV
Electronic SignatureV
1. X = V
Table 3.Electronic Signature
or VIL, VID = 12V ± 0.5V.
IH
IL
IL
PulseV
IL
IH
IH
IH
IL
V
IL
V
IH
IH
V
IL
V
IH
XV
XV
XVPPData In
XVPPData Out
XVPPHi-Z
XXV
V
IL
V
ID
CC
CC
CC
pp
or V
or V
or V
V
CC
SS
SS
SS
IdentifierA0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data
Manufacturer’s
Code
Electronic
Signature
V
V
00100000 20h
IL
01000001 41h
IH
Q7 - Q0
Data Out
Hi-Z
Hi-Z
Codes
11/25
Maximum ratingM27C4001
3 Maximum rating
Stressing the device above the rating listed in the Absolute Maximum Ratings table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any ot her conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may aff ect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 4.Absolute Maximum Ratings
SymbolParameterValueUnit
(1)
–40 to 125 °C
T
T
V
V
V
V
T
A
BIAS
STG
IO
CC
A9
PP
Ambient Operating Temperature
Temp eratu re U nder Bias–50 to 125 °C
Storage Temperature–65 to 150 °C
(2)
Input or Output Voltage (except A9)–2 to 7 V
Supply Voltage–2 to 7 V
(2)
A9 Voltage–2 to 13.5V
Program Supply Voltage–2 to 14V
1. Depends on range.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period
less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC
+2V for a period less than 20ns.
12/25
M27C4001DC and AC parameters
4 DC and AC parameters
This section summarizes the operating and measurement conditions, and the DC and AC
characteristics of the device. The parameters in the DC and AC Characteristic tables that
follow are derived from tests performed under the Measurement Conditions summarized in
the relevant tables. Designers should check that the operating conditions in their circuit
match the measurement conditions when relying on the quoted parameters.
Table 5.AC Measurement Conditions
High SpeedStandard
Input Rise and Fall Times≤ 10ns≤ 20ns
Input Pulse Voltages0 to 3V0.4 to 2.4V
Input and Output Timing Ref. Voltages1.5V0.8 and 2V
Figure 6.AC Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Figure 7.AC Testing Load Circuit
DEVICE
UNDER
TEST
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
2.0V
0.8V
AI01822
1.3V
1N914
3.3kΩ
OUT
CL
AI01823B
13/25
DC and AC parametersM27C4001
Table 6.Capacitance
(1) (2)
SymbolParameterTest ConditionMinMaxUnit
C
IN
C
OUT
= 25 °C, f = 1 MHz.
1. T
A
2. Sampled only, not 100% tested.
.
Table 7.Read Mode DC Characteristics
Input CapacitanceVIN = 0V6pF
Output CapacitanceV
= 0V12pF
OUT
(1) (2)
SymbolParameterTest ConditionMinMaxUnit
I
V
I
I
I
CC1
I
CC2
I
V
IH
V
Input Leakage Current0V ≤ VIN ≤ V
LI
Output Leakage Current0V ≤ V
LO
E
CC
Supply Current
= VIL, G = VIL,
I
= 0mA, f = 5MHz
OUT
Supply Current (Standby) TTLE = V
Supply Current (Standby)
CMOS
Program CurrentVPP = V
PP
Input Low Voltage–0.30.8V
IL
(3)
Input High Voltage2VCC + 1V
Output Low VoltageIOL = 2.1mA0.4V
OL
> VCC – 0.2V100µA
E
OUT
≤ V
IH
CC
CC
CC
±10µA
±10µA
30mA
1mA
10µA
Output High Voltage TTLIOH = –400µA2.4V
V
OH
Output High Voltage CMOSI
1. T
= 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = V
A
2. VCC must be applied simultaneously with or before VPP and removed simultaneously or after V
F = FDIP32W
B = PDIP32
C = PLCC32
N = TSOP32: 8 x 20 mm
Temperature Range
1 = 0 to 70 °C
6 = –40 to 85 °C
1. High Speed, see AC Characteristics section for further information.
For a list of available options (Speed, Package, etc...) or for further information on any
aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.
Document converted to new template (sections added, information
moved). LCCC32W package removed. Package specifications
28-Mar-20064
updated (see Section 5: Package mechanical). Packages are
ECOPACK® compliant. X and TR options removed from Table 16:
Ordering Information Scheme.
23/25
M27C4001
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