ST MICROELECTRONICS 27C2001-100 Datasheet

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Page 1

Features

M27C2001

2 Mbit (256Kb x 8) UV EPROM and OTP EPROM

■ 5V ± 10% supply voltage in Read operation

■ Access time: 55ns

■ Low power consumption:

– Active Current 30mA at 5MHz – St andby Current 100µA

■ Programming voltage: 12.75V ± 0.25V

■ Programming time: 100µs/word

■ Electronic signature

– Manufacturer Code: 20h – Device Code: 61h

■ Packages

– ECO PACK

packages available.

FDIP32W (F) PDIP32 (B)

PLCC32 (C) TSOP32 (N)

8 x 20 mm

May 2006 Rev 4 1/25

www.st.com

Page 2

M27C2001 Contents

Contents

1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1 Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.2 Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.4 System Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.5 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.6 PRESTO II Programming Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.7 Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.8 Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.9 Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.10 Erasure operation (applies to UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 10

3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

6 Part numbering scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

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List of tabl es M27C2001

List of tables

Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 3. Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 4. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 5. AC Measurem ent condi tions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 6. Capacitance (T Table 7. Read Mode DC Characteristics

= 0 to 70°C or –40 to 85°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC) . . . . . . . . . . . . 14

Table 8. Programming Mode DC C haracteristics

= 25°C; VCC = 6.25V ± 0.25V; VPP = 12.75 V ± 0 .2 5V) . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 9. Read Mode AC Characteristics

= 0 to 70°C or –40 to 85°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC) . . . . . . . . . . . . 15

Table 10. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Table 11. Programming Mode AC Characteristics

= 25°C; VCC = 6.25 ± 0.25V; VPP = 12.75 ± 0.25V). . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Table 12. FDIP32W - 32 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data. . . . . . 19

Table 13. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Mechanical Data . . . . . . . . . . . . . 20

Table 14. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data. . . . . . . . . . . . 21

Table 15. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Mechanical Data. . . . 22

Table 16. Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

= 25°C, f = 1 MHz). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

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M27C2001 List of figures

List of figures

Figure 1. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. DIP Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. LCC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 4. TSOP Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 5. Programming Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 6. AC Testing Input Output Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. AC Testing Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 8. Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 9. Programming and Verify Modes AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 10. FDIP32W - 32 pin Ceramic Frit-seal DIP, with window, Package Outline . . . . . . . . . . . . . 19

Figure 11. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Outline . . . . . . . . . . . . . . . . . . . . . 20

Figure 12. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline . . . . . . . . . . . . . . . . . . . 21

Figure 13. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Outline . . . . . . . . . . . 22

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Summary descrip tion M27C2001

1 Summary description

The M27C2001 is a high speed 2 Mbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor systems requiring large programs and is organized as 262,144 by 8 bits.

The FDIP32W (window ceramic frit-seal package) has a transparent lids which allow the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure.

For applications where the content is programmed only one time and erasure is not required, the M27C2001 is offered in PDIP32, PLCC32 and TSOP32 (8 x 20 mm) packages.

In order to meet environmental requirements, ST offers the M27C2001 in ECOPACK packages.

ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.

ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Figure 1. Logic Diagram

Table 1. Signal Names

A0-A17

M27C2001

A0-A17 Address Inputs Q0-Q7 Data Outputs E G P V

Chip Enable Output Enable Program Program Supply Supply Voltage Ground

Q0-Q7

AI00716B

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M27C2001 Summary description

Figure 2. DIP Connections

A15 A12

A7 A6 A5 A4 A3 A2 A1 A0

Q2 SS

2 3 4 5 6 7 8

M27C2001

9 10 11 12 13 14 15 16

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

AI00717

PA16 A17 A14 A13 A8 A9 A11 G A10 E Q7 Q6 Q5Q1 Q4 Q3V

Figure 3. LCC Connections

A7 A6 A5 A4 A3 A2 A1 A0

A12

A15

M27C2001

A16

VPPV

A17

A14 A13 A8 A9 A11 G A10 E Q7

AI00718

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Summary descrip tion M27C2001

Figure 4. TSOP Connections

A11 G

A13 A14 A17

A16 A15 A12

1 A9 A8

M27C2001

(Normal)

A7 A6 A5 A4 A3

16 17

25 24

AI01153B

A10 E Q7 Q6 Q5 Q4 Q3 V

Q2 Q1 Q0 A0 A1 A2

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M27C2001 Device operation

2 Device operation

The operating modes of the M27C2001 are listed in the Table 2. A single power supply is required in the read mode. All inputs are TTL levels except for V Electronic Signature.

2.1 Read Mode

The M27C2001 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E device selection. Output Enable (G the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (t available at t he output after a delay of t been low and the addresses have been stable for at least t

AVQV

2.2 Standby Mode

The M27C2001 has a standby mode which reduces the supply current from 30mA to 100µA. The M27C2001 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby m ode, the outputs are in a high impedance state, i ndependent of the G

input.

) is the power control and should be used for

) is the output control and should be used to gate data to

) is equal to the delay from E to output (t

from the falling edge of G, assuming that E has

GLQV

AVQV-tGLQV

and 12V on A9 for

). Data is

ELQV

2.3 Two Line Output Control

Because EPROM devices are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows:

a) the lowest possible memory power dissipation, b) complete assuranc e th at o utput bus conte n ti o n w ill n ot occ u r.

For the most efficient use of these two control lines, E primary device selecting function, while G devices in the array and connected to the READ ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular mem ory device.

should be made a common connection to all

2.4 System Considerations

The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices. The supply current, I the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between V

should be decoded and used as the

line from the system control bus. This

, has three segments that are of interest to

. The magnitude of the transient

and VSS. This should

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Device operation M27C2001

be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between V

and VSS for ev ery eight devices. The bulk capacitor should be located near the

power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.

2.5 Programming

When delivered (and after each erasure for UV EPROM), all bits of the M27C2001 are in the '1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The M27C2001 is in the programming mode when V pulsed to V

. The data to be programmed is applied to 8 bits in parallel to the data output

pins. The levels required for the address and data inputs are TTL. V

input is at 12.75V, E is at VIL and P is

is specified to be

6.25 ± 0.25V.

2.6 PRESTO II Programming Algorithm

PRESTO II Programming Algorithm allows the whole array to be programmed with a guaranteed margin, in a typical time of 26.5 seconds. Programming with PRESTO II consists of applying a sequence of 100µs program pulses to each byte until a correct verify occurs (see Figure 5). During programming and verify operation, a MARGIN MODE circuit is automatically activated in order to guarantee that each cell is programmed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides the necessary margin to each programmed cell.

Figure 5. Programming Flowchart

VCC = 6.25V, VPP = 12.75V

++n

= 25

YES

FAIL

n = 0

P = 100µs Pulse

VERIFY

YES

Last

Addr

YES

CHECK ALL BYTES

1st: VCC = 6V

2nd: VCC = 4.2V

++ Addr

AI00715C

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M27C2001 Device operation

2.7 Program Inhibit

Programming of multiple M27C2001s in parallel with different data is also easily accomplished. Except for E common. A TTL low level pulse applied to a M27C2001's P

12.75V, will program that M27C2001. A high level E being programmed.

, all like inputs including G of the parallel M27C2001 may be

input, with E low and VPP at

input inhibits the other M27C2001s from

2.8 Program Verify

A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with E

12.75V and V

at 6.25V.

and G at VIL, P at VIH, VPP at

2.9 Electronic Signature

The Electronic Signature (ES) mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. The ES mode is functional in the 25 ± 5°C ambient temperature range that is required when programming the M27C2001. To activate the ES mode, the programming equipment must force 11.5 to 12.5V on address line A9 of the M27C2001 with V device outputs by toggling address line A0 from V held at V code and byte 1 (A0 = V M27C2001, these two identifier bytes are given in Table 3 and can be read-out on outputs Q7 to Q0.

during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer

= VCC = 5V. Two identifier bytes may then be sequenced from the

) the device identifier code. For the STMicroelectronics

to VIH. All other address lines must be

2.10 Erasure operation (applies to UV EPROM)

The erasure characteristics of the M27C2001 are such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000Å. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000Å range. Data shows that constant exposure to room level fluorescent lighting could erase a typical M27C2001 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M27C2001 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M27C2001 window to prevent unintentional erasure. The recommended erasure procedure for the M27C2001 is exposure to short wave ultraviolet light which has wavel ength of 2537Å. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 15W-s/cm2. The erasure time with this dosage is approximately 15 to 20 minutes using an ultraviolet lamp with 12000µW/cm2 power rating. The M27C2001 should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubes which should be removed before erasure.

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Device operation M27C2001

Table 2. Operating Modes

Mode E G P A9 V

Read V Output Disable V Program V Verify V Program Inhib it V Standby V Electronic Signature V

Note: X = VIH or VIL, VID = 12 ± 0.5V.

Table 3. Electronic Signature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0

Manufacturer’s Code

Device Code V

SS SS

Q7-Q0

Data Out

Hi-Z

Data In

Hi-Z

Codes

IL IL IL

IL IH IH

XXXVPPHi-Z XXXV

XXV XXV

CC CC

VIL Pulse X V

XVPPData Out

or V or V

or V

0 0 1 0 0 0 0 0 20h

0 1 1 0 0 0 0 1 61h

Hex

Data

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M27C2001 Maximum ratings

3 Maximum ratings

Except for the rating "Operating Temperature Range", stresses above those listed in the

Table 4 may cause permanent dam age to the device. These are stress ratings only and

operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

Table 4. Absolute Maximum Ratings

Symbol Parameter Value Unit

BIAS

STG

1. Depends on range.

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DCvoltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns .

Ambient Operating Temperature Temperature Under Bias –50 to 125 °C Storage Temperature –65 to 150 °C

(2)

Input or Output Voltage (except A9) –2 to 7 V Supply Voltage –2 to 7 V

(2)

A9 Voltage –2 to 13.5 V Program Supply Voltage –2 to 14 V

(1)

–40 to 125 °C

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DC and AC parameters M27C2001

4 DC and AC para me ters

This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed under the Measurement Conditions summarized in

Table 5, Operating and AC Measurement Conditions. Designers should check that the

operating conditions in their circuit match the operating conditions when relying on the quoted parameters.

Table 5. AC Measurement conditions

High Speed Standard

Input Rise and Fall Times ≤ 10ns ≤ 20ns Input Pulse Voltages 0 to 3V 0.4V to 2.4V Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

T able 6. Capacitance

Symbol Parameter Test Condition Min Max Unit

(1)

= 25°C, f = 1 MHz)

OUT

1. Sampled only, not 100% tested

Input Capacitance VIN = 0V 6 pF Output Capacitance V

Figure 6. AC Testi ng Input Output Waveform

High Speed

Standard

2.4V

0.4V

= 0V 12 pF

OUT

1.5V

2.0V

0.8V

AI01822

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M27C2001 DC and AC parameters

Figure 7. AC Testing Load Circuit

1.3V

1N914

3.3kΩ

DEVICE UNDER

TEST

CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance

OUT

AI01823B

Table 7. Read Mode DC Characteristics

(1)

(TA = 0 to 70°C or –40 to 85°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)

Symbol Parameter Test Condition Min Max Unit

CC1

CC2

1. VCC must be applied simultaneously with or before VPP and removed simult aneously or after VPP.

2. Maximum DC voltage on Output is V

Input Leakage Current 0V ≤ VIN ≤ V Output Leakage Current 0V ≤ V Supply Current

= VIL, G = VIL,

= 0mA, f = 5MHz

OUT

Supply Current (Stand by) TTL E = V

OUT

≤ V

Supply Current (Standby) CMOS E > VCC – 0.2V 100 µA Program Current VPP = V

Input Low Voltage –0.3 0.8 V

(2)

Input High Voltage 2 VCC + 1 V Output Low Voltage IOL = 2.1mA 0.4 V Output High Voltage TTL IOH = –400µA 2.4 V Output High Voltage CMOS I

+0.5V.

= –100µA VCC – 0.7V V

±10 µA ±10 µA

30 mA

1mA

10 µA

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DC and AC parameters M27C2001

Table 8. Programming Mode DC Characteristics

(1)

(TA = 25°C; VCC = 6.25V ± 0.25V; VPP = 12.75V ± 0.25V)

Symbol Parameter Test Condition Min Max Unit

1. VCC must be applied simultaneously with or before VPP and removed simult aneously or after VPP.

Table 9. Read Mode AC Characteristics

Input Leakage Current 0 ≤ VIN ≤ V

Supply Current 50 mA Program Current E = V

Input Low Voltage –0.3 0.8 V Input High Voltage 2 VCC + 0.5 V Output Low Voltage IOL = 2.1mA 0.4 V Output High Voltage TTL IOH = –400µA 2.4 V A9 Voltage 11.5 12.5 V

(1)

±10 µA

50 mA

(TA = 0 to 70°C or –40 to 85°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)

M27C2001

Symbol Alt Parameter

Test

Condition

(2)

-70 -80 -90

Min Max Min Max Min Max Min Max

Unit-55

AVQV

ACC

Address Valid to Output

= VIL,

= V

55 70 80 90 ns

Valid

ELQV

Chip Enable

= V

55 70 80 90 ns

Low to Output Valid

GLQV

Output Enabl e

= V

30 35 40 40 ns

Low to Output Valid

(3)

EHQZ

Chip Enable

High to Output

= V

0 30 0 30 0 30 0 30 ns

Hi-Z

GHQZ

(3)

Output Enabl e

= V

0 30 0 30 0 30 0 30 ns

High to Output Hi-Z

AXQX

Address Transition to

= VIL,

= V

0000ns

Output Transition

1. VCC must be applied simultaneously with or before VPP and removed simult aneously or after VPP.

2. In case of 55ns spe ed see High Speed AC measurement conditions.

3. Sampled only, not 100% tested.

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M27C2001 DC and AC parameters

Table 10. Read Mode AC Characteristics

(1)

(TA = 0 to 70°C or –40 to 85°C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)

M27C2001

Symbol Alt Parameter Test Condition

Min Max Min Max Min Max

AVQVtACC

ELQV

GLQV

(2)

EHQZ

(2)

GHQZ

Address V alid to Output Valid

Chip Enable Lo w

to Output Valid

Output Enable

Low to Output Valid

Chip Enable

High to Output Hi-Z

Output Enable

High to Output Hi-Z

= VIL, G = V

= V

100 120 150 ns

50 50 60 ns

030040 0 50ns

0300 40 0 50 ns

Unit-10 - 12 -15/-20/-25

AXQX

Address

= VIL, G = V

00 0 ns

Transit ion to Output Transi tion

1. VCC must be applied simultaneously wi th or before VPP and removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

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DC and AC parameters M27C2001

Figure 8. Read Mode AC Waveforms

A0-A17

Q0-Q7

VALID

tAVQV

tGLQV

tELQV

Table 11. Programming Mode AC Characteristics

(TA = 25°C; VCC = 6.25 ± 0.25V; VPP = 12.75 ± 0.25V)

Symbol Alt Parameter

(1)

tAXQX

Condition

VALID

tEHQZ

tGHQZ

Test

Hi-Z

AI00719B

Min Max Unit

AVPL

QVPL

VPHPL

VCHPL

ELPL

PLPH

PHQX

QXGL

GLQV

GHQZ

GHAX

1. VCC must be applied simultaneously with or before VPP and removed simult aneously or after VPP.

2. Sampled only, not 100% tested.

(2)

t t t

Address Valid to Program Low 2 µs

Input Valid to Program Low 2 µs

VPSVPP VCSVCC CES

OES

DFP

High to Program Low 2 µs

High to Program Low 2 µs Chip Enable Low to Program Low 2 µs Program Pulse Width 95 10 5 µs Program High to Input Transition 2 µs Input Transition to Output Enable Low 2 µs Output Enable Lo w to Output Vali d 100 ns Output Enable High to Output Hi-Z 0 130 ns Output Enable Hig h to Addr ess Transition 0 ns

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M27C2001 DC and AC parameters

Figure 9. Programming and Verify Modes AC Waveforms

A0-A17

Q0-Q7

VALID

tAVPL

DATA IN DATA OUT

tQVPL

tVPHPL

tVCHPL

tELPL

tPLPH

PROGRAM VERIFY

tPHQX

tQXGL

tGLQV

tGHQZ

tGHAX

AI00720

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Package mechanical data M27C2001

5 Package mechanical data

T abl e 12. FDIP32W - 32 pin Ceramic Frit-seal DIP, with window , Packa ge Mechanical

Data

Symbol

Typ Min Max Typ Min Max

A 5.72 0.225 A1 0.51 1.40 0.020 0.055 A2 3.91 4.57 0.154 0.180 A3 3.89 4.50 0.153 0.177

B 0.41 0.56 0.016 0.022 B1 1.45 — — 0.057 — —

C 0.23 0.30 0.009 0.012

D 41.73 42.04 1.643 1.655 D2 38.10 — — 1.500 — —

E 15.24 — — 0.600 — — E1 13.06 13.36 0.514 0.526

e 2.54 — — 0.100 — — eA 14.99 — — 0.590 — — eB 16.18 18.03 0.637 0.710

L 3.18 0.125

S 1.52 2.49 0.060 0.098

∅ 7.11 — — 0.280 — —

α 4° 11° 4° 11°

N32 32

mm inches

Figure 10. FDIP32W - 32 pin Ceramic Frit-seal DIP , with window, Package Outline

B1 B

∅

1. Drawing is not to scale.

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A1AL e

E1 E

eA eB

FDIPW-a

Page 20

M27C2001 Package mechanical data

Table 13. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Mechanical Data

Symbol

Typ Min Max Typ Min Max

A — 5.08 — 0.200 A1 0.38 — 0.015 — A2 3.56 4.06 0.140 0.160

B 0.38 0.51 0.015 0.020 B1 1.52 — — 0.060 — —

C 0.20 0.30 0.008 0.012

D 41.78 42.04 1.645 1.655 D2 38.10 — — 1.500 — —

E 15.24 — — 0.600 — — E1 13.59 13.84 0.535 0.545

e1 2.54 — — 0.100 — — eA 15.24 — — 0.600 — — eB 15.24 17.78 0.600 0.700

L 3.18 3.43 0.125 0.135 S 1.78 2.03 0.070 0.080 α 0° 10° 0° 10° N32 32

mm inches

Figure 11. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Outline

A1AL

B1 B e1

E1 E

1. Drawing is not to scale.

eA eB

PDIP

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Page 21

Package mechanical data M27C2001

Table 14. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data

Symbol

Typ Min Max Typ Min Max

A 2.54 3.56 0.100 0.140 A1 1.52 2.41 0.060 0.095 A2 0.38 0.015

B 0.33 0.53 0.013 0.021 B1 0.66 0.81 0.026 0.032

D 12.32 12.57 0.485 0.495 D1 11.35 11.56 0.447 0.455 D2 9.91 10.92 0.390 0.430

e 1.27 0.050

E 14.86 15.11 0.585 0.595 E1 13.89 14.10 0.547 0.555 E2 12.45 13.46 0.490 0.530

F 0.00 0.25 0.000 0.010

R 0.89 0.035

N32 32 Nd 7 7 Ne 9 9 CP 0.10 0.004

millimeters inches

Figure 12. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline

D2 D2

1. Drawing is not to scale.

1 N

E1 E

0.51 (.020)

1.14 (.045)

A1 A2

PLCC-B

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Page 22

M27C2001 Package mechanical data

Table 15. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package

Mechanical Data

Symb

Typ Min Max Typ Min Max

A 1.20 0.047 A1 0.05 0.15 0.002 0.007 A2 0.95 1.05 0.037 0.041

B 0.15 0.27 0.006 0.011

C 0.10 0.21 0.004 0.008

D 19.80 20.20 0.780 0.795 D1 18.30 18.50 0.720 0.728

E 7.90 8.10 0.311 0.319

e 0.50 — — 0.020 — —

L 0.50 0.70 0.020 0.028

α 0° 5° 0° 5°

N32 32 CP 0.10 0.004

mm inches

Figure 13. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Outline

N/2

DIE

TSOP-a

1. Drawing is not to scale.

LA1 α

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Page 23

Part numbering scheme M27C2001

6 Part numbering scheme

T abl e 16. Ordering Information Scheme

Example: M27C2001 -55 X C 1 TR

Device Type

M27

Supply Voltage

C = 5V

Device Functi on

2001 = 2 Mbit (256Kb x 8)

Speed

(1)

= 55 ns

– 55 – 70 = 70 ns – 80 = 80 ns – 90 = 90 ns – 10 = 100 ns

Not For New Design

– 12 = 120 ns – 15 = 150 ns – 20 = 200 ns – 25 = 250 ns

Tolerance

X = ± 5% blank = ± 10%

Package

F = FDIP32W B = PDI P 32 C = PLCC32 N = TSOP32: 8 x 20 mm

T em perature Range

1 = 0 to 70°C 6 = –40 to 85°C

Options

TR = Tape & Reel Packing

1. High Sp eed, see AC Charact eristic s section f or further inform ation.

2. These speeds are replaced by the 100ns.

(2)

For a list of available options (Speed, Package, etc....) or for further information on any

aspect of this de-vice, please contact the STMicroelectronics Sales Office nearest to you.

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Page 24

M27C2001 Revision history

7 Revision history

Structure

Table 17. Document revision history

Date Revision Changes

June 1998 1 First Issue. 20-Sep-2000 2 AN620 Reference removed. 29-Nov-2000 3 PLCC codification changed (Table 14). 10-May-2006 4

Structure modified, ECOPACK text added. LCCC32W package and t he additional burn-in opt ion (X) from

Ordering information scheme remov ed.

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Page 25

M27C2001

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