ST MICROELECTRONICS 27C160-100 Datasheet

Download

Page 1

M27C160

16 Mbit (2Mb x 8 or 1Mb x 16) UV EPROM and OTP EPROM

■ 5V ± 10% SUPPLY VOLTAGE inREAD

OPERATION

■ ACCESS TIME: 70ns

■ BYTE-WIDE or WORD-WIDE

CONFIGURABLE

■ 16 Mbit MASK ROM REPLACEMENT

■ LOW POWER CONSUMPTION

– Active Current 70mA at 8MHz – Standby Current 100µA

■ PROGRAMMING VOLTAGE: 12.5V ± 0.25V

■ PROGRAMMING TIME: 100µs/word

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h – Device Code: B1h

FDIP42W (F)

PDIP42 (B)

SDIP42 (S)

DESCRIPTION

The M27C160 is a 16 Mbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor systemsrequiring large data orprogram storage and is organised as either 2 Mbitwords of 8 bit or 1 Mbitwords of 16 bit. Thepin-out is compatible with a 16 Mbit Mask ROM.

The FDIP42W (window ceramic frit-seal package) has a transparent lid which allows the user to expose thechip to ultravioletlight toerase the bit pattern. A new pattern can then be written rapidly to the device by following the programming procedure.

For applications where the contentis programmed only one time and erasure is not required, the M27C160 is offered in PDIP42, SDIP42, PLCC44 and SO44 packages.

PLCC44 (K)

Figure 1. Logic Diagram

A0-A19

BYTEV

M27C160

SO44 (M)

Q15A–1

Q0-Q14

AI00739B

1/18July 2001

Page 2

M27C160

Figure 2A. DIP Connections

A18 A19

1 2

3 4

A5 A4

M27C160

11 12 13 14 15 16 17 18 19 20 21

Q0 Q8 Q1 Q9

Q10

Q11

42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22

AI00740

A8A17 A9 A10 A11 A12 A13 A14 A15 A16 BYTEV V

Q15A-1 Q7 Q14 Q6 Q13 Q5Q2 Q12 Q4 V

Figure 2B. PLCC Connections

A18

A17

A4 A3 A2 A1 A15 A0

Q0 Q8 Q1

Q10

M27C160

Q11

A19

Q12

A10

A11

Q13

A12 A13 A14

A16 BYTEV V

Q15A–1G Q7 Q14 Q6

AI03012

Figure 2C. SO Connections

NC NC

A17 A8

Q0 Q8

Q10

Q11

A7 A6 A5 A4 A3 A2 A1 A0

1 2 3 4 5 6 7 8 9 10 11

M27C160

12 13

14 15 16 17Q1 18 19 20 21

44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 2322

AI01264

A19A18

A9 A10 A11 A12 A13 A14 A15 A16 BYTEV V

Q15A-1 Q7 Q14 Q6 Q13 Q5Q2 Q12 Q4 V

Table 1. Signal Names

A0-A19 Address Inputs Q0-Q7 Data Outputs Q8-Q14 Data Outputs Q15A–1 Data Output / Address Input E Chip Enable G BYTEV

NC Not Connected Internally

Output Enable Byte Mode / Program Supply Supply Voltage Ground

2/18

Page 3

M27C160

Table 2. Absolute Maximum Ratings

(1)

Symbol Parameter Value Unit

A Ambient Operating Temperature

BIAS

STG

(2)

Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods mayaffect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is V

3. Depends on range.

Temperature Under Bias –50 to 125 °C Storage Temperature –65 to 150 °C Input or Output Voltage (except A9) –2 to 7 V Supply Voltage –2 to 7 V A9 Voltage –2 to 13.5 V Program Supply Voltage –2 to 14 V

+0.5V with possible overshoot to VCC+2V for a period less than 20ns.

(3)

–40 to 125 °C

Table 3. Operating Modes

Mode E G BYTEV

Read Word-wide Read Byte-wide Upper Read Byte-wide Lower Output Disable Program

V Verify Program Inhibit Standby Electronic Signature V

Note: X = VIHor VIL,VID= 12V ± 0.5V.

Pulse V

X X Hi-Z Hi-Z Hi-Z

X X X Hi-Z Hi-Z Hi-Z

A9 Q15A–1 Q8-Q14 Q7-Q0

X Data Out Data Out Data Out X X

Hi-Z Data Out Hi-Z Data Out

X Data In Data In Data In X Data Out Data Out Data Out X Hi-Z Hi-Z Hi-Z

Code Codes Codes

Table 4. Electronic Signature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

Manufacturer’s Code Device Code

Note: Outputs Q15-Q8 areset to ’0’.

00100000 20h 10110001 B1h

3/18

Page 4

M27C160

Table 5. AC Measurement Conditions

High Speed Standard

Input Rise and Fall Times ≤ 10ns ≤ 20ns Input Pulse Voltages 0 to 3V 0.4V to 2.4V Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

Figure 3. AC Testing Input Output Waveform

High Speed

1.5V

Standard

2.4V

0.4V

Table 6. Capacitance

Symbol Parameter Test Condition Min Max Unit

OUT

Note: 1. Sampled only, not 100% tested.

(1)

(TA=25°C, f= 1 MHz)

Input Capacitance (except BYTEVPP)V Input Capacitance (BYTEV Output Capacitance V

2.0V

0.8V

AI01822

Figure 4. AC Testing Load Circuit

1.3V

1N914

3.3kΩ

DEVICE

UNDER

TEST

CL= 30pF forHigh Speed CL= 100pF for Standard CLincludes JIG capacitance

=0V

=0V 12 pF

OUT

10 pF

120 pF

OUT

AI01823B

DEVICE OPERATION

The operating modes of the M27C160are listed in the OperatingModes Table. Asingle powersupply is required in the read mode. All inputs are TTL compatible except for VPPand 12V on A9 for the Electronic Signature.

Read Mode

The M27C160 has two organisations, Word-wide and Byte-wide.The organisationis selected by the signal level on the BYTEVPPpin. When BYTEV

is at VIHthe Word-wide organisation is selected and the Q15A–1 pinis used for Q15 Data Output. When the BYTEVPPpin is at VILthe Byte-wide organisation is selected and the Q15A–1 pin is used for the Address Input A–1. When the memory is logically regarded as 16 bit wide, but read in the Byte-wide organisation, then with A–1 at VILthe

4/18

lower 8bits of the 16 bit data are selected and with A–1 at VIHthe upper 8 bits of the 16 bit data are selected.

The M27C160 has two control functions, both of which must be logically active in order to obtain data at the outputs. In addition the Word-wide or Byte- wide organisation must be selected.

Chip Enable(E) is the power control and should be used for deviceselection. Output Enable (G)is the output control and should be used to gate data to the output pins independent of device selection. Assuming that the addresses are stable, the address access time (t from E to output (t

ELQV

output after a delay of t

) is equal to the delay

AVQV

). Data is available at the

from the falling edge

GLQV

of G, assuming that E has been low and the addresses have been stableforat leastt

AVQV-tGLQV

Page 5

M27C160

Table 7. Read Mode DC Characteristics

(1)

(TA= 0 to 70 °C or –40 to 85 °C; VCC=5V±5% or 5V ± 10%; VPP=VCC)

Symbol Parameter Test Condition Min Max Unit

CC1

CC2

Note: 1. VCCmust be applied simultaneously withor before VPPand removed simultaneously or after VPP.

Input Leakage Current 0V ≤ VIN≤ V

Output Leakage Current

Supply Current

Supply Current (Standby)TTL E = V Supply Current (Standby)CMOS Program Current Input Low Voltage –0.3 0.8 V

(2)

Input High Voltage 2 Output Low Voltage

Output High Voltage TTL

2. Maximum DC voltage on Output is V

+0.5V.

0V ≤ V

E=V

= 0mA, f = 8MHz

OUT

E=V

= 0mA, f = 5MHz

OUT

E>V

PP=VCC

= –400µA

≤ V

OUT

,G=VIL,

– 0.2V

= 2.1mA

2.4 V

±1 µA

±10 µA

70 mA

50 mA

1mA

100 µA

10 µA

0.4 V

Standby Mode

The M27C160 has a standby mode which reduces the active current from 50mA to 100µA. The M27C160 is placed in the standby mode by applying aCMOS highsignal to the Einput. When inthe standby mode, the outputs are in a high impedance state, independent of the G input.

Two Line Output Control

Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows:

a. the lowest possible memory power dissipation, b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control lines, E should bedecoded and usedas theprimary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are intheir low power standby mode and that the output pins are only active when data is required from a particular memory device.

System Considerations

The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the supplies to the devices. The supply current I

has three segments of importance to the system designer: the standby current, the active current and the transient peaks that are produced by the falling and rising edges ofE.

The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device outputs. The associated transient voltage peaks can be suppressed by complying with the two line output control andby properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic capacitor is used on every device between VCCand VSS. This should be a high frequency type of low inherent inductance and should be placed as close as possible to the device. In addition, a 4.7µF electrolytic capacitor should be used between VCCand VSSfor every eight devices.

This capacitor should be mountednear the power supply connection point. The purpose of this capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.

5/18

Page 6

M27C160

Table 8. Read Mode AC Characteristics

(1)

(TA= 0 to 70 °C or –40 to 85 °C; VCC=5V±5% or 5V ± 10%; VPP=VCC)

M27C160

Symbol Alt Parameter TestCondition

AVQVtACC

BHQV

ELQV

GLQV

(2)

BLQZ

(2)

EHQZ

(2)

GHQZ

AXQX

BLQX

Note: 1. VCCmust be applied simultaneously withor before VPPand removed simultaneously or after V

2. Sampled only, not 100% tested.

3. Speed obtained with High Speed AC measurement conditions.

Address Validto Output Valid

BYTE High to

Output Valid Chip Enable Low to

Output Valid Output Enable Low

to Output Valid BYTE Low to Output

STD

Hi-Z Chip Enable High to

Output Hi-Z Output Enable High

to OutputHi-Z Address Transition

to Output Transition BYTE Low to

Output Transition

E=V

,G=V

E=V

G=V

E=V

G=V

E=V

,G=V

,G=VIL5555ns

,G=V

-70

(3)

-90 -100 -120/-150

Min Max Min Max Min Max Min Max

70 90 100 120 ns

35 45 50 60 ns

30 30 40 50 ns

025030040050ns

5555ns

Unit

PP.

Figure 5. Word-Wide Read Mode AC Waveforms

A0-A19

Q0-Q15

Note: BYTEVPP=VIH.

6/18

VALID

tAVQV

tGLQV

tELQV

VALID

tAXQX

tEHQZ

tGHQZ

Hi-Z

AI00741B

Page 7

Figure 6. Byte-Wide Read Mode AC Waveforms

M27C160

A–1,A0-A19

Q0-Q7

Note: BYTEVPP=VIL.

VALID

tAVQV

tGLQV

tELQV

Figure 7. BYTE Transition AC Waveforms

A0-A19

VALID

tAXQX

tEHQZ

tGHQZ

Hi-Z

AI00742B

VALID

A–1

tAVQV

BYTEV

Q0-Q7

tBLQX

Q8-Q15

tBLQZ

Note: Chip Enable (E) and Output Enable (G) = VIL.

VALID

tAXQX

tBHQV

DATA OUT

Hi-Z

DATA OUT

AI00743C

7/18

Page 8

M27C160

Table 9. ProgrammingMode DC Characteristics

(1)

(TA=25°C;VCC= 6.25V ± 0.25V; VPP= 12.5V ± 0.25V)

Symbol Parameter Test Condition Min Max Unit

Note: 1. VCCmust be applied simultaneously withor before VPPand removed simultaneously or after VPP.

Input Leakage Current Supply Current 50 mA Program Current E = V Input Low Voltage –0.3 0.8 V

Input High Voltage 2.4

Output Low Voltage Output High Voltage TTL A9 Voltage 11.5 12.5 V

Table 10. Programming Mode ACCharacteristics

0 ≤ V

(1)

≤ V

= 2.1mA

= –2.5mA

±1 µA

50 mA

+0.5

0.4 V

3.5 V

(TA=25°C;VCC= 6.25V ± 0.25V; VPP= 12.5V ± 0.25V)

Symbol Alt Parameter Test Condition Min Max Unit

AVEL

QVEL

VPHAV

VCHAV

ELEH

EHQX

QXGL

GLQV

(2)

GHQZ

GHAX

Note: 1. VCCmust be applied simultaneously withor before VPPand removed simultaneously or after VPP.

2. Sampled only, not 100% tested.

Address Valid to Chip Enable Low 2 µs

Input Valid to Chip Enable Low 2 µs

t t

VPPHigh to Address Valid

VPS

VCSVCC

Chip Enable Program Pulse Width 45 55 µs

Chip Enable High to Input Transition 2 µs

Input Transition to Output Enable Low 2 µs

OES

Output Enable Low to Output Valid 120 ns

Output Enable High toOutput Hi-Z 0 130 ns

DFP

Output Enable High toAddress

Transition

2 µs

High to Address Valid 2 µs

0ns

Programming

When delivered (and after each erasure for UV EPROM), all bits of the M27C160 are in the ’1’ state. Data is introduced by selectively programming ’0’s into the desired bit locations. Although only ’0’s will be programmed, both’1’s and ’0’s can be present in the data word. The only way to change a ’0’to a’1’ is by die exposure to ultraviolet

8/18

light (UV EPROM). The M27C160 is in the programming mode when VPPinput isat 12.5V, G is at VIHand E is pulsed to VIL. The data to be programmed isapplied to16bits in paralleltothe data output pins. The levels required for the address and data inputs are TTL. VCCis specified to be

6.25V ± 0.25V.

Page 9

Figure 8. Programming and Verify Modes AC Waveforms

M27C160

A0-A19

Q0-Q15

BYTEV

tVPHAV

tVCHAV

Figure 9. Programming Flowchart

VCC= 6.25V, VPP= 12.5V

n=0

E=50µs Pulse

VERIFY

YES

Last

Addr

YES

CHECK ALL WORDS

BYTEVPP=V

1st: VCC=6V

2nd: VCC= 4.2V

++ Addr

YES

++n

=25

FAIL

VALID

tAVEL

DATA IN DATA OUT

tQVEL

tELEH

PROGRAM VERIFY

tEHQX

tQXGL

PRESTO III Programming Algorithm

The PRESTO III Programming Algorithm allows the whole array to be programed with a guaranteed margin in a typical time of 52.5 seconds.Programming with PRESTO III consists of applying a sequence of 50µs program pulses to each word until a correct verify occurs (see Figure 9). During programing and verify operation a MARGIN MODE circuit is automatically activated toguarantee that each cell is programed with enough margin. No overprogram pulse is applied since the verify in MARGIN MODE provides the necessary margin to each programmed cell.

Program Inhibit

Programming of multiple M27C160s in parallel with different datais alsoeasily accomplished.Except for E, all like inputs includingG of the parallel M27C160 may be common. A TTL low level pulse applied to a M27C160’s E input and VPPat 12.5V, will programthat M27C160. Ahigh levelE inputinhibits the other M27C160s from being programmed.

Program Verify

A verify (read) should be performed on the programmed bits to determine that they were correct-

AI01044B

ly programmed. The verify is accomplished with E at VIHand G at VIL,VPPat 12.5V and VCCat

6.25V.

tGLQV

tGHQZ

tGHAX

AI00744

9/18

Page 10

M27C160

Electronic Signature

The Electronic Signature (ES) mode allows the reading out of abinary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match thedevice tobe programmed with its corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C ambient temperaturerange that isrequired whenprogramming the M27C160. To activate the ES mode, the programming equipment must force

11.5V to 12.5V on address line A9 of the M27C160, with VPP=VCC= 5V. Two identifier bytes maythen be sequenced from the deviceoutputs by toggling addresslineA0 fromVILtoVIH. All other address lines must be held at VILduring Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0=VIH) the device identifier code. For the STMicroelectronics M27C160, these two identifier bytes are given in Table 4 and can be read-out on outputs Q7 to Q0.

ERASURE OPERATION (appliesto UV EPROM)

The erasure characteristics of the M27C160 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted that sunlight and some type of fluorescentlamps have wavelengths in the3000-4000 Årange. Research shows that constant exposure to room level fluorescent lighting could erase a typical M27C160 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M27C160 is to be exposed tothese types of lighting conditions for extended periodsof time, itis suggestedthat opaque labelsbe putover the M27C160window toprevent unintentional erasure. The recommended erasure procedure for M27C160 is exposure to short wave ultraviolet light which has a wavelength of 2537 Å. The integrated dose (i.e. UVintensity x exposure time) for erasure should be a minimum of 30 W-sec/cm The erasure time with thisdosage is approximately 30 to 40 minutes using an ultraviolet lamp with 12000 µW/cm2power rating. The M27C160 should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure.Some lamps havea filter on their tubes which should be removed before erasure.

10/18

Page 11

Table 11. OrderingInformation Scheme

Example: M27C160 -70 X M 1 TR

Device Type

M27

Supply Voltage

C=5V

Device Function

160 = 16 Mbit (2mb x 8 or 1Mb x 16)

Speed

(1,2)

=70ns

-70

-90 = 90 ns

-100 = 100 ns

-120 = 120 ns

-150 = 150 ns

Tolerance

blank = ± 10% X=±5%

M27C160

Package

F = FDIP42W B = PDIP42 S = SDIP42

K = PLCC44

(3)

M = SO44

Temperature Range

1=0to70°C 6=–40to85°C

Options

TR = Tape& Reel Packing

Note: 1. High Speed, see AC Characteristics section for further information.

2. This speed is guaranteed at V

3. The M27C160 product PLCC44 package version is offered in the Temperature Range 0 to 70 °C only.

=5V ±5%.

For a list of available options (Speed, Package, etc...)or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest toyou.

11/18

Page 12

M27C160

Table 12. Revision History

Date Revision Details

January 1999 First Issue 09/20/00 AN620 Reference removed 19-Jul-2001 SDIP42 package added

12/18

Page 13

M27C160

Table 13. FDIP42W - 42 pinCeramic Frit-seal DIP, with window, Package Mechanical Data

Symbol

A 5.72 0.225 A1 0.51 1.40 0.020 0.055 A2 3.91 4.57 0.154 0.180 A3 3.89 4.50 0.153 0.177

B 0.41 0.56 0.016 0.022 B1 1.45 – – 0.057 – –

C 0.23 0.30 0.009 0.012

D 54.41 54.86 2.142 2.160

D2 50.80 – – 2.000 – –

E 15.24 – – 0.600 – – E1 14.50 14.90 0.571 0.587

e 2.54 – – 0.100 – – eA 14.99 – – 0.590 – – eB 16.18 18.03 0.637 0.710

L 3.18 0.125

S 1.52 2.49 0.060 0.098 K 9.40 – – 0.370 – –

K1 11.43 – – 0.450 – –

α 4° 11° 4° 11° N42 42

Typ Min Max Typ Min Max

mm inches

Figure 10. FDIP42W - 42 pin Ceramic Frit-sealDIP, with window, Package Outline

B1 B e1

A3A1A

E1 E

Drawing is not to scale.

FDIPW-b

13/18

Page 14

M27C160

Table 14. PDIP42 - 42 pin Plastic Dual In Line, 600 mils width, Package Mechanical Data

Symbol

A – 5.08 – 0.200 A1 0.25 – 0.010 – A2 3.56 4.06 0.140 0.160

B 0.38 0.53 0.015 0.021 B1 1.27 1.65 0.050 0.065

C 0.20 0.36 0.008 0.014

D 52.20 52.71 2.055 2.075

D2 50.80 – – 2.000 – –

E 15.24 – – 0.600 – – E1 13.59 13.84 0.535 0.545 e1 2.54 – – 0.100 – – eA 14.99 – – 0.590 – – eB 15.24 17.78 0.600 0.700

L 3.18 3.43 0.125 0.135 S 0.86 1.37 0.034 0.054 α 0° 10° 0° 10° N42 42

Typ Min Max Typ Min Max

mm inches

Figure 11. PDIP42 - 42 pinPlastic Dual In Line, 600 mils width, Package Outline

A2A1A

B1 B e1

eA eB

E1 E

Drawing is not to scale.

PDIP

14/18

Page 15

Table 15. SDIP42 - 42 pin Shrink PlasticDIP, 600mils width, Package Mechanical Data

millimeters inches

Symbol

Typ Min Max Typ Min Max

A 5.08 0.200

A1 0.51 0.020 A2 3.81 3.05 4.57 0.150 0.120 0.180

b 0.46 0.38 0.56 0.018 0.015 0.022

b2 1.02 0.89 1.14 0.040 0.035 0.045

c 0.25 0.23 0.38 0.010 0.009 0.015 D 36.83 36.58 37.08 1.450 1.440 1.460

e 1.78 – – 0.070 – – E 15.24 16.00 0.600 0.630

E1 13.72 12.70 14.48 0.540 0.500 0.570 eA 15.24 – – 0.600 – – eB 18.54 0.730

L 3.30 2.54 3.56 0.130 0.100 0.140 S 0.64 0.025

M27C160

N42 42

Figure 12. SDIP42 - 42 pinShrink Plastic DIP, 600 mils width, Package Outline

A2A1A

b2 b e

eA eB

E1 E

SDIP

Drawing is not to scale.

15/18

Page 16

M27C160

Table 16. PLCC44 - 44 lead Plastic Leaded Chip Carrier, Package Mechanical Data

Symbol

Typ Min Max Typ Min Max

A 4.20 4.70 0.165 0.185

A1 2.29 3.04 0.090 0.120 A2 – 0.51 – 0.020

B 0.33 0.53 0.013 0.021

B1 0.66 0.81 0.026 0.032

D 17.40 17.65 0.685 0.695

D1 16.51 16.66 0.650 0.656 D2 14.99 16.00 0.590 0.630

E 17.40 17.65 0.685 0.695

E1 16.51 16.66 0.650 0.656 E2 14.99 16.00 0.590 0.630

e 1.27 – – 0.050 – – F 0.00 0.25 0.000 0.010 R 0.89 – – 0.035 – –

mm inches

N44 44

CP 0.10 0.004

Figure 13. PLCC44 - 44 lead PlasticLeaded Chip Carrier, Package Outline

Ne E1 E

D2/E2

0.51 (.020)

1.14 (.045)

PLCC

Drawing is not to scale.

16/18

Page 17

M27C160

Table 17. SO44 -44 lead Plastic Small Outline, 525 mils body width, Package Mechanical Data

Symbol

Typ Min Max Typ Min Max

A 2.42 2.62 0.095 0.103

A1 0.22 0.23 0.009 0.010 A2 2.25 2.35 0.089 0.093

B 0.50 0.020 C 0.10 0.25 0.004 0.010 D 28.10 28.30 1.106 1.114 E 13.20 13.40 0.520 0.528

e 1.27 – – 0.050 – – H 15.90 16.10 0.626 0.634

L 0.80 – – 0.031 – – α 3° ––3°–– N44 44

CP 0.10 0.004

mm inches

Figure 14. SO44 - 44 lead Plastic Small Outline, 525 mils body width, Package Outline

LA1 α

SO-b

Drawing is not to scale.

17/18

Page 18

M27C160

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility forthe consequences of useof such information norfor any infringement of patents or other rightsof third parties whichmay result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication aresubject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo isregistered trademark of STMicroelectronics

All other names are the property of theirrespective owners

Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -

Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.

STMicroelectronics GROUP OF COMPANIES

www.st.com

18/18