The M27C1001 is a 1 Mbit EPROM offered in the two ranges: UV (ultra violet erase) and
OTP (one time programmable). It is ideally suited for microprocessor systems requiring
large programs and is organized as 131,072 words of 8 bits.
The FDIP32W (window ceramic frit-seal package) has a transparent lid that ena bles the
user to expose the chip to ultra viol et light to er ase the bit pattern. A ne w pattern can then be
written to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not
required, the M27C1001 is off er ed in PDIP32 , PLCC32 an d TSOP32 ( 8 x 20 mm) p ac kages .
In order to meet environmental requirements, ST offers the M27C1001 in ECOPACK®
packages. ECOPACK packages are Lead-free. The category of second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK® specifications are available at: www.st.com.
See Figure 1: Logic Diagram and Table 1: Signal Descriptions for a brief overview of the
signals connected to this device.
Figure 1.Logic Diagram
V
17
A0-A16
P
E
G
V
CC
M27C1001
PP
8
Q0-Q7
V
SS
5/24
AI00710B
Summary descriptionM27C1001
Table 1.Signal Descriptions
SignalDescription
A0-A16Address Inputs
Q0-Q7Data Outputs
E
Chip Enable
G
P
V
PP
V
CC
V
SS
Output Enable
Program
Program Supply
Supply Voltage
Ground
NCNot Connected Internally
Figure 2.DIP Connections
1
V
PP
A15
A12
Q0
Q2
SS
A7
A6
A5
A4
A3
A2
A1
A0
2
3
4
5
6
7
8
M27C1001
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AI00711
V
CC
PA16
NC
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
6/24
M27C1001Summary description
Figure 3.LCC Connections
CC
NC
VPPV
32
P
A14
A13
A8
A9
A11
25
G
A10
E
Q7
A7
A6
A5
A4
A3
A2
A1
A0
Q0
9
A12
A15
M27C1001
A16
1
17
Figure 4.TSOP Connections
A11G
A9
A8
A13
A14
NC
P
V
CC
V
PP
A16
A15
A12
A7
A6
A5
A4A3
Q1
1
8
9
Q2
SS
V
M27C1001
(Normal)
Q3
Q4
Q5
32
25
24
1617
AI01151B
Q6
AI00712
A10
E
Q7
Q6
Q5
Q4
Q3
V
SS
Q2
Q1
Q0
A0
A1
A2
7/24
Device descriptionM27C1001
2 Device description
Table 2 lists the operating modes of the M27C1001. A single power supply is required in
Read mode. All inputs are TTL lev els except f or V
Table 2.Operating Modes
and 12V on A9 for Electronic Signature .
PP
ModeEGPA9V
ReadV
Output DisableV
ProgramV
VerifyV
Program InhibitV
StandbyV
Electronic SignatureV
IL
IL
IL
IL
IH
IH
IL
Note:X = VIH or VIL, VID = 12V ± 0.5V.
2.1 Read mode
The M27C1001 has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E
device selection. Out put Enable (G
the output pins, independent of device selection. Assuming that the addresses are stable,
the address access time (t
availab le a t th e outpu t aft er a de lay of t
been low and the addresses have been stable for at least t
AVQV
SS
SS
Q7-Q0
Data Out
Data In
PP
V
IL
V
IH
V
IH
V
IL
XXV
XXV
CC
CC
VIL PulseXV
V
IH
XVPPData Out
or V
or V
PP
XXXVPPHi-Z
XXXV
V
IL
V
IH
V
ID
CC
or V
V
CC
SS
Codes
) is the power control and should be u sed for
) is the output control and should be used to gate data to
) is equal to the delay from E to output (t
from the falling edge of G, assuming that E has
GLQV
AVQV-tGLQV
.
ELQV
). Data is
Hi-Z
Hi-Z
2.2 Standby mode
The M27C1001 has a standby mode which reduces th e supply current from 30mA to 100µA.
The M27C1001 is placed in the standby mode by applying a CMOS high signal to the E
input. When in the standby mo de, the ou tputs are in a high impedance stat e, indepe ndent of
the G
input.
2.3 Two-line output control
Because EPROMs are usually used in larger memory arrays, this product features a 2-line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
●the lowest possible memory power dissipation,
●complete assurance that output bus contention will not occur.
For the most efficient use of these two control lines, E
primary device selecting function, while G
devices in the array and connected to the READ
8/24
should be decoded and used as the
should be made a common connection to all
line from the system control bus. This
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