The M27C1001 is a 1 Mbit EPROM offered in the two ranges: UV (ultra violet erase) and
OTP (one time programmable). It is ideally suited for microprocessor systems requiring
large programs and is organized as 131,072 words of 8 bits.
The FDIP32W (window ceramic frit-seal package) has a transparent lid that ena bles the
user to expose the chip to ultra viol et light to er ase the bit pattern. A ne w pattern can then be
written to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not
required, the M27C1001 is off er ed in PDIP32 , PLCC32 an d TSOP32 ( 8 x 20 mm) p ac kages .
In order to meet environmental requirements, ST offers the M27C1001 in ECOPACK®
packages. ECOPACK packages are Lead-free. The category of second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK® specifications are available at: www.st.com.
See Figure 1: Logic Diagram and Table 1: Signal Descriptions for a brief overview of the
signals connected to this device.
Figure 1.Logic Diagram
V
17
A0-A16
P
E
G
V
CC
M27C1001
PP
8
Q0-Q7
V
SS
5/24
AI00710B
Summary descriptionM27C1001
Table 1.Signal Descriptions
SignalDescription
A0-A16Address Inputs
Q0-Q7Data Outputs
E
Chip Enable
G
P
V
PP
V
CC
V
SS
Output Enable
Program
Program Supply
Supply Voltage
Ground
NCNot Connected Internally
Figure 2.DIP Connections
1
V
PP
A15
A12
Q0
Q2
SS
A7
A6
A5
A4
A3
A2
A1
A0
2
3
4
5
6
7
8
M27C1001
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AI00711
V
CC
PA16
NC
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5Q1
Q4
Q3V
6/24
M27C1001Summary description
Figure 3.LCC Connections
CC
NC
VPPV
32
P
A14
A13
A8
A9
A11
25
G
A10
E
Q7
A7
A6
A5
A4
A3
A2
A1
A0
Q0
9
A12
A15
M27C1001
A16
1
17
Figure 4.TSOP Connections
A11G
A9
A8
A13
A14
NC
P
V
CC
V
PP
A16
A15
A12
A7
A6
A5
A4A3
Q1
1
8
9
Q2
SS
V
M27C1001
(Normal)
Q3
Q4
Q5
32
25
24
1617
AI01151B
Q6
AI00712
A10
E
Q7
Q6
Q5
Q4
Q3
V
SS
Q2
Q1
Q0
A0
A1
A2
7/24
Device descriptionM27C1001
2 Device description
Table 2 lists the operating modes of the M27C1001. A single power supply is required in
Read mode. All inputs are TTL lev els except f or V
Table 2.Operating Modes
and 12V on A9 for Electronic Signature .
PP
ModeEGPA9V
ReadV
Output DisableV
ProgramV
VerifyV
Program InhibitV
StandbyV
Electronic SignatureV
IL
IL
IL
IL
IH
IH
IL
Note:X = VIH or VIL, VID = 12V ± 0.5V.
2.1 Read mode
The M27C1001 has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E
device selection. Out put Enable (G
the output pins, independent of device selection. Assuming that the addresses are stable,
the address access time (t
availab le a t th e outpu t aft er a de lay of t
been low and the addresses have been stable for at least t
AVQV
SS
SS
Q7-Q0
Data Out
Data In
PP
V
IL
V
IH
V
IH
V
IL
XXV
XXV
CC
CC
VIL PulseXV
V
IH
XVPPData Out
or V
or V
PP
XXXVPPHi-Z
XXXV
V
IL
V
IH
V
ID
CC
or V
V
CC
SS
Codes
) is the power control and should be u sed for
) is the output control and should be used to gate data to
) is equal to the delay from E to output (t
from the falling edge of G, assuming that E has
GLQV
AVQV-tGLQV
.
ELQV
). Data is
Hi-Z
Hi-Z
2.2 Standby mode
The M27C1001 has a standby mode which reduces th e supply current from 30mA to 100µA.
The M27C1001 is placed in the standby mode by applying a CMOS high signal to the E
input. When in the standby mo de, the ou tputs are in a high impedance stat e, indepe ndent of
the G
input.
2.3 Two-line output control
Because EPROMs are usually used in larger memory arrays, this product features a 2-line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
●the lowest possible memory power dissipation,
●complete assurance that output bus contention will not occur.
For the most efficient use of these two control lines, E
primary device selecting function, while G
devices in the array and connected to the READ
8/24
should be decoded and used as the
should be made a common connection to all
line from the system control bus. This
M27C1001Device description
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.
2.4 System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the devices. The supply current, I
, has three segments that are of interest to
CC
the system designer: the standby current le v el, the activ e cur rent le v el, a nd tran sient current
peaks that are produced by the f alling an d rising edges of E
. The magnitude of the tra nsient
current peaks is dependent on the capacitive and inductive loading of the device at the
output. The associated transient voltage peaks can be suppressed by complying with the
two line output control and by properly selected decoupling capacitors. It is recommended
that a 0.1µF ceramic capacitor b e used on every device between V
and VSS. This should
CC
be a high frequency capacitor of low inherent inductance and should be placed as close to
the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used
between V
and VSS for ev ery eight devices . The bulk capacitor sh ould be located near the
CC
power supply connection point. The purpose of the bulk capacitor is to o v ercome the v oltage
drop caused by the inductive effects of PCB traces.
2.5 Programming
When delivered (and after each erasur e f or UV EPR OM), all bits of t he M27C1001 are in the
'1' state. Data is introduced by selectively programming '0's into the desired bit locations.
Although only '0's will be programmed, both '1's and '0's can be present in the data word.
The only way to chang e a '0' to a '1' is b y die e xposition t o ultra violet light (UV EPRO M). The
M27C1001 is in the programming mode when V
pulsed to V
. The data to be programmed is applied to 8 bits in parallel to the data output
IL
PP
pins. The levels required for the address and data inputs are TTL. V
6.25V ± 0.25V.
2.6 Presto II programming algorithm
Presto II Programming Algorithm allows the whole array to be programmed, with a
guaranteed margin, in a typical time of 13 seconds. Programming with Presto II involves in
applying a sequence of 100µs program pulse s to each b yte unt il a correct v erify occurs (see
Figure 5). During programming and verify operation, a Margin mode circuit is automatically
activated in order to guarantee that each cell is programmed with enough margin. No
overprogram pulse is appli ed since the verify in Margin mode provides necessary margin to
each programmed cell.
input is at 12.75V, E is at VIL and P is
is specified to be
CC
9/24
Device descriptionM27C1001
Figure 5.Programming Flowchart
VCC = 6.25V, VPP = 12.75V
n = 0
P = 100µs Pulse
NO
NO
VERIFY
YES
Last
NO
Addr
YES
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
++ Addr
AI00715C
YES
++n
= 25
FAIL
2.7 Program Inhibit
Programming of multiple M27C1001s in parallel with different data is also easily
accomplished. Except for E
, all like inputs including G of the parallel M27C1001 may be
common. A TTL low level pulse applied to a M27C1001's P
12.75V, will program that M27C1001. A high level E
being programmed.
2.8 Program Verify
A verify (read) should be performed on the programmed bits to determine that they were
correctly programmed. The verify is accomplished with E
12.75V and V
at 6.25V.
CC
2.9 Electronic Signature
The Electronic Signature (ES) mode enables the reading out of a binary code from an
EPROM that will identify its manufacturer and type. This mode is intended for use by
programming equipment to automatically match the device to be programmed with its
corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C
ambient temperature range that is required when programming the M27C1001. To activate
the ES mode, the progr amm ing e qui pme nt must force 11.5V to 12.5V on address line A9 of
the M27C1001, with V
device outputs by toggling address line A0 from V
held at V
during Electronic Signature mode.
IL
PP
= V
= 5V. Two identifier bytes may then be sequenced from the
CC
input, with E low and VPP at
input inhibits the other M27C1001s from
and G at VIL, P at VIH, VPP at
to VIH. All other address lines must be
IL
10/24
M27C1001Device description
Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device
identifier code. For the STMicroelectronics M27C1001, these two identifier bytes are given
in Table 3 and can be read-out on outputs Q7 to Q0.
Table 3.Electronic Signature
IdentifierA0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data
Manufacturer’s CodeV
Device CodeV
00100000 20h
IL
00000101 05h
IH
2.10 Erasure operation (applies to UV EPROM)
The erasure characteristics of the M2 7C1001 is such tha t eras ure begins when t he cells are
exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted
that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å
range. Research shows that constant exposure to room level fluorescent lighting could
erase a typical M27C1001 in about 3 years, while it would take approximately 1 week to
cause erasure when exposed to direct sunlight. If the M27C1001 is to be exposed to these
types of lighting conditions for extended periods of time, it is suggested that opaque labels
be put over the M27C1001 window to prevent unintentional erasure. The recommended
erasure procedure for the M27C1001 is exposure to short wave ultraviolet light which has a
wavelength of 2537 Å. The integrated dose (i.e. UV intensity x exposure time) for erasure
should be a minimum of 15 W-sec/cm
15 to 20 minutes using an ultravi olet lamp with 12000 µW/cm
should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. Some lamps
have a filter on their tubes which should be removed before erasure.
2
. The erasure time with this dosage is approximately
2
power rating. The M27C1001
11/24
Maximum ratingsM27C1001
3 Maximum ratings
Table 4.Absolute Maximum Ratings
(1)
SymbolParameterValueUnit
T
A
T
BIAS
T
STG
V
IO
V
CC
V
A9
V
PP
1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute
Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods
may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality
documents.
2. Depends on range.
3. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than
20ns.
Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than
20ns.
Ambient Operating Temperature
Temperature Under Bias–50 to 125 °C
Storage Temp erature–65 to 150 °C
(3)
Input or Output Voltage (except A9)–2 to 7 V
Supply Voltage–2 to 7 V
(3)
A9 Voltage–2 to 13.5V
Program Supply Voltage–2 to 14V
(2)
–40 to 125 °C
12/24
M27C1001DC and AC characteristics
4 DC and AC characteristics
TA = 0 to 70°C, –40 to 85°C or –40 to 125°C; VCC = 5V ± 5% or 5V ± 10%; VPP = V
Table 5.Read Mode DC Characteristics
(1)
CC
SymbolParameterTest ConditionMin.Max.Unit
I
V
I
I
I
CC1
I
CC2
I
V
IH
V
Input Leakage Current0V ≤ VIN ≤ V
LI
Output Leakage Current0V ≤ V
LO
Supply Current
CC
Supply Current (Standby) TTLE = V
E
= VIL, G = VIL,
I
= 0mA, f = 5MHz
OUT
IH
OUT
≤ V
CC
CC
Supply Current (Standby) CMOS E > VCC – 0.2V100µA
Program CurrentVPP = V
PP
Input Low Voltage–0.30.8V
IL
(2)
Input High Voltage2VCC + 1V
Output Low VoltageIOL = 2.1mA0.4V
OL
CC
±10µA
±10µA
30mA
1mA
10µA
Output High Voltage TTLIOH = –400µA2.4V
V
OH
Output High Voltage CMOSI
must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
F = FDIP32WC = PLCC32
B = PDIP32N = TSOP32: 8 x 20 mm
Temperature Range
1 = 0 to 70 °C
3 = –40 to 125 °C
6 = –40 to 85 °C
Options
TR = ECOPACK® package, Tape & Reel Packing
1. High Speed, see AC Characteristics section for further information.
For a list of available options (Speed, Package, etc...) or for further information on any
aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.
PLCC32 Package mechanical data and drawing clarified
04-Jun-20024
(Table 14 and Figure 12)
TSOP32 Package mechanical data clarified (Table 15)
12-Apr-20065
Removed LCC32W package and Additional Burn-in option.
Converted to new template. Added ECOPACK® information.
23/24
M27C1001
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