ST VNB35NV04, VNP35NV04, VNV35NV04, VNW35NV04 User Manual

	VNB35NV04 / VNP35NV04
®	/ VNV35NV04 / VNW35NV04
	“OMNIFET II”:
	FULLY AUTOPROTECTED POWER MOSFET

	TYPE	RDS(on)	Ilim	Vclamp
	VNB35NV04
	VNP35NV04	10 mΩ (*)	30 A	40 V
	VNV35NV04
	VNW35NV04

(*) For PowerSO-10 only

nLINEAR CURRENT LIMITATION

nTHERMAL SHUT DOWN

nSHORT CIRCUIT PROTECTION

nINTEGRATED CLAMP

nLOW CURRENT DRAWN FROM INPUT PIN

nDIAGNOSTIC FEEDBACK THROUGH INPUT PIN

nESD PROTECTION

nDIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING)

nCOMPATIBLE WITH STANDARD POWER MOSFET

DESCRIPTION

The VNB35NV04, VNP35NV04, VNV35NV04, VNW35NV04 are monolithic devices designed in STMicroelectronics VIPower M0-3 Technology,

		10
	3	1
	1
	D2PAK	PowerSO-10™
	3	3
	2	2
	1	1
	TO-220	TO-247
	ORDER CODES:
	D2PAK	VNB35NV04
	TO-220	VNP35NV04
	PowerSO-10™	VNV35NV04
	TO-247	VNW35NV04

intended for replacement of standard Power MOSFETS from DC up to 25KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin.

BLOCK DIAGRAM

		DRAIN
		2
		Overvoltage
		Clamp
INPUT	Gate
1
	Control
		Linear
	Over	Current
		Limiter
	Temperature
		3
		SOURCE
		FC01000
March 2004		1/19

VNB35NV04 / VNP35NV04 / VNV35NV04 / VNW35NV04

ABSOLUTE MAXIMUM RATING

Symbol	Parameter				Value				Unit
			PowerSO-10™		D2PAK		TO-220	TO-247
VDS	Drain-source Voltage (VIN=0V)			Internally Clamped					V
VIN	Input Voltage			Internally Clamped					V
IIN	Input Current			+/-20					mA
RIN MIN	Minimum Input Series Impedance			4.7					Ω
ID	Drain Current				Internally Limited				A
IR	Reverse DC Output Current			-30					A
VESD1	Electrostatic Discharge (R=1.5KΩ, C=100pF)			4000					V
VESD2	Electrostatic Discharge on output pin only			16500					V
	(R=330Ω, C=150pF)
Ptot	Total Dissipation at Tc=25°C		125		125		125	208	W
Tj	Operating Junction Temperature				Internally limited				°C
Tc	Case Operating Temperature				Internally limited				°C
Tstg	Storage Temperature				-55 to 150				°C

CONNECTION DIAGRAM (TOP VIEW)

INPUT	6	5	SOURCE
INPUT	7	4	SOURCE
INPUT	8	3	N.C.
INPUT	9	2	SOURCE
INPUT	10	1	SOURCE
		11
	DRAIN

(*) For the pins configuration related to TO-220, TO-247, D2PAK, see outlines at page 1.

CURRENT AND VOLTAGE CONVENTIONS

ID

VDS

DRAIN

IIN RIN

INPUT

SOURCE

VIN

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VNB35NV04 / VNP35NV04 / VNV35NV04 / VNW35NV04

THERMAL DATA

Symbol	Parameter				Value			Unit
				PowerSO-10™	D2PAK	TO-220	TO-247
Rthj-case	Thermal Resistance Junction-case}}}	MAX		1	1	1	0.6	°C/W
Rthj-amb	Thermal Resistance Junction-ambient	MAX		50(*)	50(*)	50	30	°C/W

(*) When mounted on a standard single-sided FR4 board with 50mm2 of Cu (at least 35 μm thick) connected to all DRAIN pins.

ELECTRICAL CHARACTERISTICS (-40°C < T j < 150°C, unless otherwise specified) OFF

	Symbol	Parameter		Test Conditions	Min	Typ	Max	Unit
	VCLAMP	Drain-source Clamp	VIN=0V; ID=15A		40	45	55	V
		Voltage
	VCLTH	Drain-source Clamp	VIN=0V; ID=2mA		36			V
		Threshold Voltage
	VINTH	Input Threshold Voltage	VDS=VIN; ID=1mA		0.5		2.5	V
	I	Supply Current from Input	V	=0V; V =5V		100	150	μA
	ISS	Pin	DS	IN
	VINCL	Input-Source Clamp	IIN=1mA		6	6.8	8	V
		Voltage	IIN=-1mA		-1.0		-0.3
	IDSS	Zero Input Voltage Drain	VDS=13V; VIN=0V; Tj=25°C				30	μA
		Current (VIN=0V)	V	=25V; V =0V			75
			DS	IN

ON

					Max
Symbol	Parameter	Test Conditions		PowerSO-10		D2PAK	Unit
						TO-220 / TO-247
RDS(on)	Static Drain-source On	VIN=5V; ID=15A; Tj=25°C		10		13	mΩ
	Resistance	VIN=5V; ID=15A; Tj=150°C		20		24

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VNB35NV04 / VNP35NV04 / VNV35NV04 / VNW35NV04

ELECTRICAL CHARACTERISTICS (continued) (Tj=25°C, unless otherwise specified) DYNAMIC

Symbol	Parameter	Test Conditions	Min	Typ	Max	Unit
gfs (*)	Forward	VDD=13V; ID=15A		35		S
	Transconductance
COSS	Output Capacitance	VDS=13V; f=1MHz; VIN=0V		1300		pF

SWITCHING

Symbol	Parameter	Test Conditions		Min	Typ	Max	Unit
td(on)	Turn-on Delay Time	VDD=15V; ID=15A			150	500	ns
tr	Rise Time				840	2500	ns
		Vgen=5V; Rgen=RIN MIN=4.7Ω
td(off)	Turn-off Delay Time				980	3000	ns
		(see figure 1)
tf	Fall Time				600	1500	ns
td(on)	Turn-on Delay Time	VDD=15V; ID=15A			4	12	μs
tr	Rise Time				27	100	μs
		Vgen=5V; Rgen=2.2KΩ
td(off)	Turn-off Delay Time				34	120	μs
		(see figure 1)
tf	Fall Time				31	110	μs
(di/dt)on	Turn-on Current Slope	VDD=15V; ID=15A			18		A/μs
		Vgen=5V; Rgen=RIN MIN=4.7Ω
Qi	Total Input Charge	VDD=12V; ID=15A; VIN=5V			118		nC
		Igen =2.13mA (see figure 5)

SOURCE DRAIN DIODE

Symbol	Parameter	Test Conditions		Min	Typ	Max	Unit
VSD (*)	Forward On Voltage	ISD=15A; VIN=0V			0.8		V
trr	Reverse Recovery Time	ISD=15A; dI/dt=100A/μs			400		ns
Qrr	Reverse Recovery Charge	VDD=30V; L=200μH			1.4		μC
IRRM	Reverse Recovery Current	(see test circuit, figure 2)			7		A

PROTECTIONS (-40°C < T j < 150°C, unless otherwise specified)

Symbol	Parameter	Test Conditions	Min	Typ	Max	Unit
Ilim	Drain Current Limit	VIN=6V; VDS=13V	30	45	60	A
tdlim	Step Response Current	VIN=6V; VDS=13V		50		μs
	Limit
Tjsh	Overtemperature		150	175	200	°C
	Shutdown
Tjrs	Overtemperature Reset		135			°C
Igf	Fault Sink Current	VIN=5V; VDS=13V; Tj=Tjsh	10	15	20	mA
	Single Pulse	starting Tj=25°C; V DD=24V
Eas		VIN=5V; Rgen=RIN MIN=4.7Ω; L=24mH	1.7			J
	Avalanche Energy
		(see figures 3 & 4)
(*) Pulsed: Pulse duration = 300μs, duty cycle 1.5%

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VNB35NV04 / VNP35NV04 / VNV35NV04 / VNW35NV04

PROTECTION FEATURES

During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path.

The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 25KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100μA) flows into the INPUT pin in order to supply the internal circuitry.

The device integrates:

- OVERVOLTAGE CLAMP PROTECTION:

internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads.

- LINEAR CURRENT LIMITER CIRCUIT:

limits the drain current ID to Ilim whatever the INPUT pin voltages is. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh.

- OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION:

these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15°C below shut-down temperature.

- STATUS FEEDBACK:

in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS.

Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.

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VNB35NV04 / VNP35NV04 / VNV35NV04 / VNW35NV04

Fig.1: Switching Time Test Circuit for Resistive Load

		VD
		Rgen
		Vgen
ID
	90%
t	10%	tf
r
		t
td(on)		t
Vgen		d(off)
		t

Fig.2: Test Circuit for Diode Recovery Times

A

A

I

D

FAST

L=100uH

OMNIFET

DIODE

B

S

B

25 Ω

D

Rgen

VDD

Vgen

I

OMNIFET

S

8.5 Ω

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