ST VNB14N04, VNK14N04FM, VNV14N04 User Manual

April 2009 Rev 6 1/17
17
VNB14N04 - VNK14N04FM
VNV14N04
"OMNIFET"
fully autoprotected Power MOSFET
Features
Linear current limitation
Thermal shutdown
Short circuit protection
Integrated clamp
Low current drawn from input pin
Diagnostic feedback through input pin
ESD protection
Direct access to the gate of the power
MOSFET (analog driving)
Compatible with standard power MOSFET
Description
The VNB14N04, VNK14N04FM and VNV14N04
are monolithic devices made using
STMicroeletronics VIPower M0 Technology,
intended for replacement of standard power
MOSFETS in DC to 50 kHz applications. Built-in
thermal shutdown, linear current limitation and
overvoltage clamp protect the chip in harsh
environment.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Type V
clamp
R
DS(on)
I
lim
VNB14N04
VNK14N04FM
VNV14N04
42 V
42 V
42 V
0.07
0.07
0.07
14 A
14 A
14 A

Table 1. Device summary

Part number Order code
VNB14N04
VNB14N04, VNB14N04-E,
VNB14N0413TR, VNB14N04TR-E
VNK14N04FM VNK14N04FM
VNV14N04 VNV14N04, VNV14N04-E
www.st.com
Contents VNB14N04 - VNK14N04FM - VNV14N04
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Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
VNB14N04 - VNK14N04FM - VNV14N04 Block diagram
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1 Block diagram

Figure 1. Block diagram

1. PowerSO-10 pin configuration : INPUT = 6,7,8,9,10; SOURCE = 1,2,4,5; DRAIN = TAB
Electrical specification VNB14N04 - VNK14N04FM - VNV14N04
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2 Electrical specification

2.1 Absolute maximum rating

2.2 Thermal data

2.3 Electrical characteristics

T
case
=25 °C unless otherwise specified.

Table 2. Absolute maximum rating

Symbol Parameter
Value
Unit
PowerSO-10
D2PAK
SOT-82FM
V
DS
Drain-source voltage (V
in
= 0) Internally clamped V
V
in
Input voltage 18 V
I
D
Drain current Internally limited A
I
R
Reverse DC output current -14 A
V
esd
Electrostatic discharge (C = 100 pF,
R=1.5 K)
2000 V
P
tot
Total dissipation at T
c
= 25 °C 50 9.5 W
T
j
Operating junction temperature Internally limited °C
T
c
Case operating temperature Internally limited °C
T
stg
Storage temperature -55 to 150 °C

Table 3. Thermal data

Symbol Parameter PowerSO-10 SOT82-FM D2PAK Unit
R
thj-case
Thermal resistance junction-case max 2.5 13 2.5 °C/W
R
thj-amb
Thermal resistance junction-ambient
max
50 100 62.5 °C/W

Table 4. Electrical characteristics

Symbol Parameter Test conditions Min. Typ. Max. Unit
Off
V
CLAMP
Drain-source clamp voltage I
D
= 200 mA V
in
= 0 36 42 48 V
V
CLTH
Drain-source clamp threshold voltage I
D
= 2 mA V
in
= 0 35 V
V
INCL
Input-source reverse clamp voltage I
in
= -1 mA -1 -0.3 V
VNB14N04 - VNK14N04FM - VNV14N04 Electrical specification
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I
DSS
Zero input voltage drain current (V
in
= 0)
V
DS
= 13 V V
in
= 0
V
DS
= 25 V V
in
= 0
50
200
µA
µA
I
ISS
Supply current from input pin V
DS
= 0 V V
in
= 10 V 250 500 µA
On
(1)
V
IN(th)
Input threshold voltage V
DS
= V
in
I
D
+ I
in
= 1 mA 0.8 3 V
R
DS(on)
Static drain-source on resistance
V
in
= 10 V I
D
= 7 A
V
in
= 5 V I
D
= 7 A
0.7
0.1
Dynamic
g
fs
(1)
Forward transconductance V
DS
= 13 V I
D
= 7 A 8 10 S
C
oss
Output capacitance V
DS
= 13 V f = 1 MHz V
in
= 0 400 500 pF
Switching
(2)
t
d(on)
t
r
t
d(off)
t
f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 15 V I
d
= 7 A
V
gen
= 10 V R
gen
= 10
(see Figure 26)
60
160
250
100
120
300
400
200
ns
ns
ns
ns
t
d(on)
t
r
t
d(off)
t
f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V
DD
= 15 V I
d
= 7 A
V
gen
= 10 V R
gen
= 1000
(see Figure 26)
300
1.5
5.5
1.8
500
2.2
7.5
2.5
ns
µs
µs
µs
(di/dt)
on
Turn-on current slope
V
DD
= 15 V I
D
= 7 A
V
in
= 10 V R
gen
= 10
120 A/µs
Q
i
Total input charge V
DD
= 12 V I
D
= 7 A V
in
= 10 V 30 nC
Source drain diode
V
SD
(1)
Forward on voltage I
SD
= 7 A V
in
= 0 1.6 V
t
rr
(2)
Q
rr
(2)
I
RRM
(2)
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I
SD
= 7 A di/dt
= 100 A/µs
V
DD
= 30 V T
j
= 25 °C
(see test circuit, Figure 28)
110
0.34
6.1
ns
µC
A
Protection
I
lim
Drain current limit
V
in
= 10 V V
DS
= 13 V
V
in
= 5 V V
DS
= 13 V
10
10
14
14
20
20
A
A
t
dlim
(2)
Step response
Current limit
V
in
= 10 V
V
in
= 5 V
30
80
60
150
µs
µs
T
jsh
(2)
Overtemperature shutdown 150 °C
T
jrs
(2)
Overtemperature reset 135 °
C
Table 4. Electrical characteristics (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Electrical specification VNB14N04 - VNK14N04FM - VNV14N04
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I
gf
(2)
Fault sink current
V
in
= 10 V V
DS
= 13 V
V
in
= 5 V V
DS
= 13 V
50
20
mA
mA
E
as
(2)
Single pulse avalanche energy
starting T
j
= 25°C V
DD
= 20 V
V
in
= 10 V R
gen
= 1 K L = 10 mH
0.65 J
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
2. Parameters guaranteed by design/characterization
Table 4. Electrical characteristics (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
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