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VNS1NV04DP-E
User Manual
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ST VNS1NV04DP-E User Manual

Features
VNS1NV04DP-E
OMNIFET II
fully autoprotected Power MOSFET
Max On-state resistance
Current limitation (typ)
Drain-Source clamp voltage
1. Per each device.
■ Linear current limitation
■ Short circuit protection
■ Integrated clamp
■ Low current drawn from input pin
■ Diagnostic feedback through input pin
■ ESD protection
■ Direct access to the gate of the power mosfet
(1)
(1)
(1)
V
R
DS(ON)
I
LIMH
CLAMP
250mΩ
1.7A
40V
(analog driving)
■ Compatible with standard power mosfet
■ In compliance with the 2002/95/EC european
directive
SO-8
Description
The VNS1NV04DP-E is a device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPower™ M0-3 technology: they are intended for replacement of standard Power MOSFETs from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments.
Fault feedback can be detected by monitoring the voltage at the input pin.

Table 1. Device summary

Order codes
Package
Tube Tape and reel
SO-8 VNS1NV04DP-E VNS1NV04DPTR-E
April 2010 Doc ID 17344 Rev 2 1/24
www.st.com
1
Contents VNS1NV04DP-E
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.2 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16
3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.2 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/24 Doc ID 17344 Rev 2
VNS1NV04DP-E List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 7. Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. Source Drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 10. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 11. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Doc ID 17344 Rev 2 3/24
List of figures VNS1NV04DP-E
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 14. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15. Static drain-source on resistance vs id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 20. Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 21. Turn-off drain-source voltage slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 25. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 26. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 30. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 31. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 32. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 33. Thermal fitting model of a double channel HSD in SO-8
Figure 34. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 35. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 36. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
. . . . . . . . . . . . . . . . . . . . . . . . . . 18
4/24 Doc ID 17344 Rev 2
VNS1NV04DP-E Block diagram and pin description

1 Block diagram and pin description

Figure 1. Block diagram

DRAIN1
OVERVO LTAGE
CLAMP
INPUT1
GATE
CONTROL
OVER
TEMPERATURE
LINEAR
CURRENT
LIMITER
SOURCE1

Figure 2. Configuration diagram (top view)

SOURCE 1
INPUT 1
SOURCE 2
INPUT 2
1
4
DRAIN2
SOURCE2
8
5
OVERVO LTAGE
CLAMP
LINEAR
CURRENT
LIMITER
DRAIN 1
DRAIN 1
DRAIN 2
DRAIN 2
GATE
CONTROL
OVER
TEMPERATURE
INPUT2
Doc ID 17344 Rev 2 5/24
Electrical specifications VNS1NV04DP-E

2 Electrical specifications

Figure 3. Current and voltage conventions

IN2
R
IN1
INPUT 1
I
R
IN2
IN2
INPUT 2
SOURCE 1
I
IN1
V
IN1
V

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document.

Table 2. Absolute maximum ratings

DRAIN 1
DRAIN 2
SOURCE 2
I
D1
I
D2
V
DS1
V
DS1
Symbol Parameter Value Unit
V
V
I
R
IN MINn
I
I
V
ESD1
V
ESD2
P
T
DSn
INn
INn
Dn
Rn
tot
T
j
T
c
stg
Drain-source voltage (V
= 0 V) Internally clamped V
INn
Input voltage Internally clamped V
Input current +/-20 mA
Minimum input series impedance 330 Ω
Drain current Internally limited A
Reverse DC output current -3 A
Electrostatic discharge (R = 1.5 KΩ, C = 100 pF) 4000 V
Electrostatic discharge on output pins only (R = 330 Ω, C = 150 pF)
Total dissipation at Tc=25°C 4 W
Operating junction temperature Internally limited °C
Case operating temperature Internally limited °C
Storage temperature -55 to 150 °C
6/24 Doc ID 17344 Rev 2
16500 V
VNS1NV04DP-E Electrical specifications

2.2 Thermal data

Table 3. Thermal data

Symbol Parameter Max. value Unit
R
thj-lead
R
thj-amb
Thermal resistance junction-lead (per channel) 30 °C/W
Thermal resistance junction-ambient See Figure 31 °C/W

2.3 Electrical characteristics

Table 4. Off

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CLAMP
V
CLTH
V
INTH
I
ISS
V
INCL
I
DSS
1. -40 °C < T
(1)
Drain-source clamp voltage
Drain-source clamp threshold voltage
Input threshold voltage
Supply current from input pin
Input-source clamp voltage
Zero input voltage drain current
=0V)
(V
IN
< 150 °C, unless otherwise specified.
j
V
=0V; ID= 0.5 A 40 45 55 V
IN
V
=0V; ID=2mA 36 V
IN
V
DS=VIN
V
DS
=1mA
I
IN
=-1mA
I
IN
V
DS
V
DS
; ID=1mA 0.5 2.5 V
=0V; VIN= 5 V 100 150 µA
6
=13V; VIN=0V; Tj=25°C = 25V; VIN=0V
-1.0
6.8 8
-0.3
30 75
V V
µA µA

Table 5. On

(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
R
DS(on)
1. -40 °C < T

Table 6. Dynamic

Static drain-source on resistance
< 150 °C, unless otherwise specified.
j
(1)
=5V; ID= 0.5 A; Tj= 25°C
V
IN
=5V; ID=0.5A
V
IN
250 500mΩmΩ
Symbol Parameter Test conditions Min. Typ. Max. Unit
Forward
(1)
g
fs
C
1. T
transconductance
Output capacitance VDS=13V; f=1MHz; VIN= 0 V 90 pF
OSS
= 25 °C, unless otherwise specified.
j
V
=13V; ID=0.5A 2 S
DD
Doc ID 17344 Rev 2 7/24
Electrical specifications VNS1NV04DP-E

Table 7. Switching

(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
t
d(on)
t
d(off)
(dI/dt)
1. T

Table 8. Source Drain diode

Turn-on delay time
=15V; ID=0.5A;
V
Rise time 170 500 ns
t
r
Turn-off delay time 350 1000 ns
t
Fall time 200 600 ns
f
DD
=5V; R
V
gen
(see Figure 4)
gen=RIN MIN
=330Ω
Turn-on delay time
=15V; ID=0.5A
V
Rise time 1.3 4 µs
t
r
Turn-off delay time 1.8 5.5 µs
Fall time 1.2 4 µs
t
f
Turn-on current slope
on
Q
Total input charge
i
= 25 °C, unless otherwise specified.
j
DD
V
gen
=5V; R
gen
=2.2KΩ
(see Figure 4)
V
=15V; ID=1.5A
DD
=5V; R
V
gen
V
=12V; ID= 0.5 A; VIN=5V
DD
= 2.13 mA (see Figure 7)
I
gen
(1)
gen=RIN MIN
=330Ω
70 200 ns
0.25 1 µs
5A/µs
5nC
Symbol Parameter Test conditions Min. Typ. Max. Unit
(2)
V
SD
Qrr Reverse recovery charge - 100 - nC
I
RRM
1. T
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%.
Forward on voltage ISD= 0.5 A; VIN=0V - 0.8 - V
Reverse recovery time
t
rr
Reverse recovery current - 0.75 - A
= 25 °C, unless otherwise specified.
j
= 0.5 A; dI/dt = 6 A/µs
I
SD
= 30 V; L = 200 µH
V
DD
(see Figure 5)
- 205 - ns

Table 9. Protections

(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
Drain current limit VIN=5V; VDS=13V 1.7 3.5 A
lim
t
T
T
Eas
Step response current
dlim
limit
Overtemperature
jsh
shutdown
Overtemperature reset 135 °C
jrs
Fault sink current VIN=5V; VDS=13V; Tj=T
I
gf
Single pulse avalanche energy
VIN=5V; VDS=13V 2 µs
Starting T V
IN
=25°C; VDD=24V
j
=5V R
gen=RIN MIN
L=50mH (see Figure 6 and Figure 8)
1. -40 °C < T
< 150 °C, unless otherwise specified.
j
8/24 Doc ID 17344 Rev 2
jsh
= 330 Ω;
150 175 200 °C
10 15 20 mA
55 mJ
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